2 * linux/sound/soc/codecs/tlv320aic326x.h
4 * Copyright (C) 2011 TI Solutions Pvt Ltd.
6 * Based on sound/soc/codecs/tlv320aic3262.c
8 * This package is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
13 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
14 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
16 * The TLV320AIC3262 is a flexible, low-power, low-voltage stereo audio
17 * codec with digital microphone inputs and programmable outputs.
21 * Rev 0.1 ASoC driver support TI 20-01-2011
23 * The AIC325x ASoC driver is ported for the codec AIC3262.
24 * Rev 0.2 ASoC driver support TI 21-03-2011
25 * The AIC326x ASoC driver is updated for linux 2.6.32 Kernel.
26 * Rev 0.3 ASoC driver support TI 20-04-2011
27 * The AIC326x ASoC driver is ported to 2.6.35 omap4 kernel
30 #ifndef _TLV320AIC3262_H
31 #define _TLV320AIC3262_H
32 #include "aic3xxx_cfw.h"
33 #include "aic3xxx_cfw_ops.h"
34 #include <linux/switch.h>
37 #define dprintk(x...) printk(x)
38 #define DBG(x...) printk(x)
45 #define AUDIO_NAME "aic3262"
46 #define AIC3262_VERSION "1.1"
47 /* Macro to enable the inclusion of tiload kernel driver */
48 #define AIC3262_TiLoad
52 //#define AIC3262_SYNC_MODE
53 #undef AIC3262_SYNC_MODE
55 #define AIC3262_ASI1_MASTER
56 //#undef AIC3262_ASI1_MASTER
57 //#define AIC3262_ASI2_MASTER
58 #undef AIC3262_ASI2_MASTER
59 //#define AIC3262_ASI3_MASTER
60 #undef AIC3262_ASI3_MASTER
61 /* Macro for McBsp master / slave configuration */
62 #define AIC3262_MCBSP_SLAVE /*3262 master*/
63 //#undef AIC3262_MCBSP_SLAVE
65 /* Enable this macro allow for different ASI formats */
66 //#define ASI_MULTI_FMT
68 /* Enable register caching on write */
69 //#define EN_REG_CACHE
72 /* Enable or disable controls to have Input routing*/
73 //#define FULL_IN_CNTL
75 /* AIC3262 supported sample rate are 8k to 192k */
76 #define AIC3262_RATES SNDRV_PCM_RATE_8000_192000
78 /* AIC3262 supports the word formats 16bits, 20bits, 24bits and 32 bits */
79 #define AIC3262_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \
80 | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
82 #define AIC3262_FREQ_12000000 12000000
83 #define AIC3262_FREQ_19200000 19200000
84 #define AIC3262_FREQ_24000000 24000000
85 #define AIC3262_FREQ_38400000 38400000
86 /* Audio data word length = 16-bits (default setting) */
87 #define AIC3262_WORD_LEN_16BITS 0x00
88 #define AIC3262_WORD_LEN_20BITS 0x01
89 #define AIC3262_WORD_LEN_24BITS 0x02
90 #define AIC3262_WORD_LEN_32BITS 0x03
92 /* sink: name of target widget */
93 #define AIC3262_WIDGET_NAME 0
94 /* control: mixer control name */
95 #define AIC3262_CONTROL_NAME 1
96 /* source: name of source name */
97 #define AIC3262_SOURCE_NAME 2
99 /* D15..D8 aic3262 register offset */
100 #define AIC3262_REG_OFFSET_INDEX 0
101 /* D7...D0 register data */
102 #define AIC3262_REG_DATA_INDEX 1
104 /* Serial data bus uses I2S mode (Default mode) */
105 #define AIC3262_I2S_MODE 0x00
106 #define AIC3262_DSP_MODE 0x01
107 #define AIC3262_RIGHT_JUSTIFIED_MODE 0x02
108 #define AIC3262_LEFT_JUSTIFIED_MODE 0x03
110 /* 8 bit mask value */
111 #define AIC3262_8BITS_MASK 0xFF
113 /* shift value for CLK_REG_3 register */
114 #define CLK_REG_3_SHIFT 6
115 /* shift value for DAC_OSR_MSB register */
116 #define DAC_OSR_MSB_SHIFT 4
118 /* number of codec specific register for configuration */
119 #define NO_FEATURE_REGS 2
121 /* AIC3262 register space */
122 #define AIC3262_CACHEREGNUM 1024 /* Updated from 256 to support Page 3 registers */
126 #define DSP_NON_SYNC_MODE(state) (!( (state & 0x03) && (state & 0x30) ))
128 *----------------------------------------------------------------------------
129 * @struct aic3262_setup_data |
130 * i2c specific data setup for AIC3262.
131 * @field unsigned short |i2c_address |
132 * Unsigned short for i2c address.
133 *----------------------------------------------------------------------------
135 /*struct aic3262_setup_data {
136 unsigned short i2c_address;
138 struct aic3262_jack_data {
139 struct snd_soc_jack *jack;
141 struct switch_dev sdev;
144 * AIC3262 initialization data which has register offset and register
146 * @field u8 | book_no |
147 * AIC3262 Book Number Offsets required for initialization..
148 * @field u16 | reg_offset |
149 * AIC3262 Register offsets required for initialization..
150 * @field u8 | reg_val |
151 * value to set the AIC3262 register to initialize the AIC3262.
152 *----------------------------------------------------------------------------
154 struct aic3262_priv {
162 int current_dac_config[2];
163 int current_adc_config[2];
164 struct aic3262_jack_data hs_jack;
165 struct workqueue_struct *workqueue;
166 struct delayed_work delayed_work;
167 struct snd_soc_codec *codec;
169 struct mutex cfw_mutex;
170 struct cfw_state cfw_ps;
171 struct cfw_state *cfw_p;
172 struct aic3262_pdata *pdata;
173 int mute_asi; // Bit 0 -> ASI1, Bit 1-> ASI2, Bit 2 -> ASI3
175 struct firmware *cur_fw;
178 /*struct aic3262_configs {
185 *----------------------------------------------------------------------------
186 * @struct aic3262_rate_divs |
187 * Setting up the values to get different freqencies
189 * @field u32 | mclk |
191 * @field u32 | rate |
193 * @field u8 | p_val |
195 * @field u32 | pll_j |
197 * @field u32 | pll_d |
199 * @field u32 | dosr |
200 * value to store dosr
201 * @field u32 | ndac |
203 * @field u32 | mdac |
205 * @field u32 | aosr |
207 * @field u32 | nadc |
209 * @field u32 | madc |
211 * @field u32 | blck_N |
213 * @field u32 | aic3262_configs |
214 * configurations for aic3262 register value
215 *----------------------------------------------------------------------------
217 struct aic3262_rate_divs {
230 // struct aic3262_configs codec_specific_regs[NO_FEATURE_REGS];
234 *----------------------------------------------------------------------------
235 * @struct snd_soc_codec_dai |
236 * It is SoC Codec DAI structure which has DAI capabilities viz.,
237 * playback and capture, DAI runtime information viz. state of DAI
238 * and pop wait state, and DAI private data.
239 *----------------------------------------------------------------------------
241 extern struct snd_soc_dai tlv320aic3262_dai;
244 *----------------------------------------------------------------------------
245 nt aic3262_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value)
246 * @struct snd_soc_codec_device |
247 * This structure is soc audio codec device sturecute which pointer
248 * to basic functions aic3262_probe(), aic3262_remove(),
249 * aic3262_suspend() and aic3262_resume()
252 extern struct snd_soc_codec_device soc_codec_dev_aic3262;
253 extern const aic3xxx_codec_ops aic3262_cfw_codec_ops;
254 void aic3262_hs_jack_detect(struct snd_soc_codec *codec,
255 struct snd_soc_jack *jack, int report);
257 unsigned int aic3262_read(struct snd_soc_codec *codec, unsigned int reg);
258 int aic3262_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value);
259 #endif /* _TLV320AIC3262_H */