2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Copyright (c) 2007-2009 Philipp Zabel <philipp.zabel@gmail.com>
10 * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
13 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
14 * Copyright 2005 Openedhand Ltd.
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/types.h>
20 #include <linux/slab.h>
21 #include <linux/errno.h>
22 #include <linux/gpio.h>
23 #include <linux/delay.h>
24 #include <linux/i2c.h>
25 #include <linux/workqueue.h>
26 #include <sound/core.h>
27 #include <sound/control.h>
28 #include <sound/initval.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/tlv.h>
32 #include <sound/uda1380.h>
36 /* codec private data */
38 struct snd_soc_codec *codec;
39 u16 reg_cache[UDA1380_CACHEREGNUM];
41 struct work_struct work;
46 * uda1380 register cache
48 static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
49 0x0502, 0x0000, 0x0000, 0x3f3f,
50 0x0202, 0x0000, 0x0000, 0x0000,
51 0x0000, 0x0000, 0x0000, 0x0000,
52 0x0000, 0x0000, 0x0000, 0x0000,
53 0x0000, 0xff00, 0x0000, 0x4800,
54 0x0000, 0x0000, 0x0000, 0x0000,
55 0x0000, 0x0000, 0x0000, 0x0000,
56 0x0000, 0x0000, 0x0000, 0x0000,
57 0x0000, 0x8000, 0x0002, 0x0000,
60 static unsigned long uda1380_cache_dirty;
63 * read uda1380 register cache
65 static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
68 u16 *cache = codec->reg_cache;
69 if (reg == UDA1380_RESET)
71 if (reg >= UDA1380_CACHEREGNUM)
77 * write uda1380 register cache
79 static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
80 u16 reg, unsigned int value)
82 u16 *cache = codec->reg_cache;
84 if (reg >= UDA1380_CACHEREGNUM)
86 if ((reg >= 0x10) && (cache[reg] != value))
87 set_bit(reg - 0x10, &uda1380_cache_dirty);
92 * write to the UDA1380 register space
94 static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
100 * data[0] is register offset
105 data[1] = (value & 0xff00) >> 8;
106 data[2] = value & 0x00ff;
108 uda1380_write_reg_cache(codec, reg, value);
110 /* the interpolator & decimator regs must only be written when the
111 * codec DAI is active.
113 if (!codec->active && (reg >= UDA1380_MVOL))
115 pr_debug("uda1380: hw write %x val %x\n", reg, value);
116 if (codec->hw_write(codec->control_data, data, 3) == 3) {
118 i2c_master_send(codec->control_data, data, 1);
119 i2c_master_recv(codec->control_data, data, 2);
120 val = (data[0]<<8) | data[1];
122 pr_debug("uda1380: READ BACK VAL %x\n",
123 (data[0]<<8) | data[1]);
127 clear_bit(reg - 0x10, &uda1380_cache_dirty);
133 static void uda1380_sync_cache(struct snd_soc_codec *codec)
137 u16 *cache = codec->reg_cache;
139 /* Sync reg_cache with the hardware */
140 for (reg = 0; reg < UDA1380_MVOL; reg++) {
142 data[1] = (cache[reg] & 0xff00) >> 8;
143 data[2] = cache[reg] & 0x00ff;
144 if (codec->hw_write(codec->control_data, data, 3) != 3)
145 dev_err(codec->dev, "%s: write to reg 0x%x failed\n",
150 static int uda1380_reset(struct snd_soc_codec *codec)
152 struct uda1380_platform_data *pdata = codec->dev->platform_data;
154 if (gpio_is_valid(pdata->gpio_reset)) {
155 gpio_set_value(pdata->gpio_reset, 1);
157 gpio_set_value(pdata->gpio_reset, 0);
161 data[0] = UDA1380_RESET;
165 if (codec->hw_write(codec->control_data, data, 3) != 3) {
166 dev_err(codec->dev, "%s: failed\n", __func__);
174 static void uda1380_flush_work(struct work_struct *work)
176 struct uda1380_priv *uda1380 = container_of(work, struct uda1380_priv, work);
177 struct snd_soc_codec *uda1380_codec = uda1380->codec;
180 for_each_set_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
182 pr_debug("uda1380: flush reg %x val %x:\n", reg,
183 uda1380_read_reg_cache(uda1380_codec, reg));
184 uda1380_write(uda1380_codec, reg,
185 uda1380_read_reg_cache(uda1380_codec, reg));
186 clear_bit(bit, &uda1380_cache_dirty);
191 /* declarations of ALSA reg_elem_REAL controls */
192 static const char *uda1380_deemp[] = {
199 static const char *uda1380_input_sel[] = {
205 static const char *uda1380_output_sel[] = {
209 static const char *uda1380_spf_mode[] = {
215 static const char *uda1380_capture_sel[] = {
219 static const char *uda1380_sel_ns[] = {
223 static const char *uda1380_mix_control[] = {
226 "before sound processing",
227 "after sound processing"
229 static const char *uda1380_sdet_setting[] = {
235 static const char *uda1380_os_setting[] = {
237 "double-speed (no mixing)",
238 "quad-speed (no mixing)"
241 static const struct soc_enum uda1380_deemp_enum[] = {
242 SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
243 SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
245 static const struct soc_enum uda1380_input_sel_enum =
246 SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
247 static const struct soc_enum uda1380_output_sel_enum =
248 SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */
249 static const struct soc_enum uda1380_spf_enum =
250 SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */
251 static const struct soc_enum uda1380_capture_sel_enum =
252 SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */
253 static const struct soc_enum uda1380_sel_ns_enum =
254 SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */
255 static const struct soc_enum uda1380_mix_enum =
256 SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */
257 static const struct soc_enum uda1380_sdet_enum =
258 SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */
259 static const struct soc_enum uda1380_os_enum =
260 SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */
263 * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
265 static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
268 * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
269 * from -66 dB in 0.5 dB steps (2 dB steps, really) and
270 * from -52 dB in 0.25 dB steps
272 static const unsigned int mvol_tlv[] = {
273 TLV_DB_RANGE_HEAD(3),
274 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
275 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
276 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
280 * from -72 dB in 1.5 dB steps (6 dB steps really),
281 * from -66 dB in 0.75 dB steps (3 dB steps really),
282 * from -60 dB in 0.5 dB steps (2 dB steps really) and
283 * from -46 dB in 0.25 dB steps
285 static const unsigned int vc_tlv[] = {
286 TLV_DB_RANGE_HEAD(4),
287 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
288 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
289 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
290 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
293 /* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
294 static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
296 /* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
297 * off at 18 dB max) */
298 static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
300 /* from -63 to 24 dB in 0.5 dB steps (-128...48) */
301 static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
303 /* from 0 to 24 dB in 3 dB steps */
304 static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
306 /* from 0 to 30 dB in 2 dB steps */
307 static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
309 static const struct snd_kcontrol_new uda1380_snd_controls[] = {
310 SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
311 SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
312 SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
313 SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
314 SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
315 SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
316 SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
317 /**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
318 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
319 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
320 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
321 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
322 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
323 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
324 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
325 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
326 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
327 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
328 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
329 /**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
330 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
331 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
332 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
333 SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
334 SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
335 SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
336 SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
337 /* -5.5, -8, -11.5, -14 dBFS */
338 SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
342 static const struct snd_kcontrol_new uda1380_input_mux_control =
343 SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
346 static const struct snd_kcontrol_new uda1380_output_mux_control =
347 SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
350 static const struct snd_kcontrol_new uda1380_capture_mux_control =
351 SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
354 static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
355 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
356 &uda1380_input_mux_control),
357 SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
358 &uda1380_output_mux_control),
359 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
360 &uda1380_capture_mux_control),
361 SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
362 SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
363 SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
364 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
365 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
366 SND_SOC_DAPM_INPUT("VINM"),
367 SND_SOC_DAPM_INPUT("VINL"),
368 SND_SOC_DAPM_INPUT("VINR"),
369 SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
370 SND_SOC_DAPM_OUTPUT("VOUTLHP"),
371 SND_SOC_DAPM_OUTPUT("VOUTRHP"),
372 SND_SOC_DAPM_OUTPUT("VOUTL"),
373 SND_SOC_DAPM_OUTPUT("VOUTR"),
374 SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
375 SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
378 static const struct snd_soc_dapm_route audio_map[] = {
381 {"HeadPhone Driver", NULL, "Output Mux"},
382 {"VOUTR", NULL, "Output Mux"},
383 {"VOUTL", NULL, "Output Mux"},
385 {"Analog Mixer", NULL, "VINR"},
386 {"Analog Mixer", NULL, "VINL"},
387 {"Analog Mixer", NULL, "DAC"},
389 {"Output Mux", "DAC", "DAC"},
390 {"Output Mux", "Analog Mixer", "Analog Mixer"},
392 /* {"DAC", "Digital Mixer", "I2S" } */
394 /* headphone driver */
395 {"VOUTLHP", NULL, "HeadPhone Driver"},
396 {"VOUTRHP", NULL, "HeadPhone Driver"},
399 {"Left ADC", NULL, "Input Mux"},
400 {"Input Mux", "Mic", "Mic LNA"},
401 {"Input Mux", "Mic + Line R", "Mic LNA"},
402 {"Input Mux", "Line L", "Left PGA"},
403 {"Input Mux", "Line", "Left PGA"},
406 {"Right ADC", "Mic + Line R", "Right PGA"},
407 {"Right ADC", "Line", "Right PGA"},
410 {"Mic LNA", NULL, "VINM"},
411 {"Left PGA", NULL, "VINL"},
412 {"Right PGA", NULL, "VINR"},
415 static int uda1380_add_widgets(struct snd_soc_codec *codec)
417 struct snd_soc_dapm_context *dapm = &codec->dapm;
419 snd_soc_dapm_new_controls(dapm, uda1380_dapm_widgets,
420 ARRAY_SIZE(uda1380_dapm_widgets));
421 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
426 static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
429 struct snd_soc_codec *codec = codec_dai->codec;
432 /* set up DAI based upon fmt */
433 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
434 iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
436 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
437 case SND_SOC_DAIFMT_I2S:
438 iface |= R01_SFORI_I2S | R01_SFORO_I2S;
440 case SND_SOC_DAIFMT_LSB:
441 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
443 case SND_SOC_DAIFMT_MSB:
444 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
447 /* DATAI is slave only, so in single-link mode, this has to be slave */
448 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
451 uda1380_write(codec, UDA1380_IFACE, iface);
456 static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
459 struct snd_soc_codec *codec = codec_dai->codec;
462 /* set up DAI based upon fmt */
463 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
464 iface &= ~R01_SFORI_MASK;
466 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
467 case SND_SOC_DAIFMT_I2S:
468 iface |= R01_SFORI_I2S;
470 case SND_SOC_DAIFMT_LSB:
471 iface |= R01_SFORI_LSB16;
473 case SND_SOC_DAIFMT_MSB:
474 iface |= R01_SFORI_MSB;
477 /* DATAI is slave only, so this has to be slave */
478 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
481 uda1380_write(codec, UDA1380_IFACE, iface);
486 static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
489 struct snd_soc_codec *codec = codec_dai->codec;
492 /* set up DAI based upon fmt */
493 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
494 iface &= ~(R01_SIM | R01_SFORO_MASK);
496 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
497 case SND_SOC_DAIFMT_I2S:
498 iface |= R01_SFORO_I2S;
500 case SND_SOC_DAIFMT_LSB:
501 iface |= R01_SFORO_LSB16;
503 case SND_SOC_DAIFMT_MSB:
504 iface |= R01_SFORO_MSB;
507 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
510 uda1380_write(codec, UDA1380_IFACE, iface);
515 static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
516 struct snd_soc_dai *dai)
518 struct snd_soc_pcm_runtime *rtd = substream->private_data;
519 struct snd_soc_codec *codec = rtd->codec;
520 struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
521 int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
524 case SNDRV_PCM_TRIGGER_START:
525 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
526 uda1380_write_reg_cache(codec, UDA1380_MIXER,
527 mixer & ~R14_SILENCE);
528 schedule_work(&uda1380->work);
530 case SNDRV_PCM_TRIGGER_STOP:
531 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
532 uda1380_write_reg_cache(codec, UDA1380_MIXER,
533 mixer | R14_SILENCE);
534 schedule_work(&uda1380->work);
540 static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
541 struct snd_pcm_hw_params *params,
542 struct snd_soc_dai *dai)
544 struct snd_soc_pcm_runtime *rtd = substream->private_data;
545 struct snd_soc_codec *codec = rtd->codec;
546 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
548 /* set WSPLL power and divider if running from this clock */
549 if (clk & R00_DAC_CLK) {
550 int rate = params_rate(params);
551 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
552 clk &= ~0x3; /* clear SEL_LOOP_DIV */
557 case 12501 ... 25000:
560 case 25001 ... 50000:
563 case 50001 ... 100000:
567 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
570 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
571 clk |= R00_EN_DAC | R00_EN_INT;
573 clk |= R00_EN_ADC | R00_EN_DEC;
575 uda1380_write(codec, UDA1380_CLK, clk);
579 static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
580 struct snd_soc_dai *dai)
582 struct snd_soc_pcm_runtime *rtd = substream->private_data;
583 struct snd_soc_codec *codec = rtd->codec;
584 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
586 /* shut down WSPLL power if running from this clock */
587 if (clk & R00_DAC_CLK) {
588 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
589 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
592 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
593 clk &= ~(R00_EN_DAC | R00_EN_INT);
595 clk &= ~(R00_EN_ADC | R00_EN_DEC);
597 uda1380_write(codec, UDA1380_CLK, clk);
600 static int uda1380_set_bias_level(struct snd_soc_codec *codec,
601 enum snd_soc_bias_level level)
603 int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
605 struct uda1380_platform_data *pdata = codec->dev->platform_data;
607 if (codec->dapm.bias_level == level)
611 case SND_SOC_BIAS_ON:
612 case SND_SOC_BIAS_PREPARE:
614 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
616 case SND_SOC_BIAS_STANDBY:
617 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
618 if (gpio_is_valid(pdata->gpio_power)) {
619 gpio_set_value(pdata->gpio_power, 1);
621 uda1380_reset(codec);
624 uda1380_sync_cache(codec);
626 uda1380_write(codec, UDA1380_PM, 0x0);
628 case SND_SOC_BIAS_OFF:
629 if (!gpio_is_valid(pdata->gpio_power))
632 gpio_set_value(pdata->gpio_power, 0);
634 /* Mark mixer regs cache dirty to sync them with
635 * codec regs on power on.
637 for (reg = UDA1380_MVOL; reg < UDA1380_CACHEREGNUM; reg++)
638 set_bit(reg - 0x10, &uda1380_cache_dirty);
640 codec->dapm.bias_level = level;
644 #define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
645 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
646 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
648 static struct snd_soc_dai_ops uda1380_dai_ops = {
649 .hw_params = uda1380_pcm_hw_params,
650 .shutdown = uda1380_pcm_shutdown,
651 .trigger = uda1380_trigger,
652 .set_fmt = uda1380_set_dai_fmt_both,
655 static struct snd_soc_dai_ops uda1380_dai_ops_playback = {
656 .hw_params = uda1380_pcm_hw_params,
657 .shutdown = uda1380_pcm_shutdown,
658 .trigger = uda1380_trigger,
659 .set_fmt = uda1380_set_dai_fmt_playback,
662 static struct snd_soc_dai_ops uda1380_dai_ops_capture = {
663 .hw_params = uda1380_pcm_hw_params,
664 .shutdown = uda1380_pcm_shutdown,
665 .trigger = uda1380_trigger,
666 .set_fmt = uda1380_set_dai_fmt_capture,
669 static struct snd_soc_dai_driver uda1380_dai[] = {
671 .name = "uda1380-hifi",
673 .stream_name = "Playback",
676 .rates = UDA1380_RATES,
677 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
679 .stream_name = "Capture",
682 .rates = UDA1380_RATES,
683 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
684 .ops = &uda1380_dai_ops,
686 { /* playback only - dual interface */
687 .name = "uda1380-hifi-playback",
689 .stream_name = "Playback",
692 .rates = UDA1380_RATES,
693 .formats = SNDRV_PCM_FMTBIT_S16_LE,
695 .ops = &uda1380_dai_ops_playback,
697 { /* capture only - dual interface*/
698 .name = "uda1380-hifi-capture",
700 .stream_name = "Capture",
703 .rates = UDA1380_RATES,
704 .formats = SNDRV_PCM_FMTBIT_S16_LE,
706 .ops = &uda1380_dai_ops_capture,
710 static int uda1380_suspend(struct snd_soc_codec *codec, pm_message_t state)
712 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
716 static int uda1380_resume(struct snd_soc_codec *codec)
718 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
722 static int uda1380_probe(struct snd_soc_codec *codec)
724 struct uda1380_platform_data *pdata =codec->dev->platform_data;
725 struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
728 uda1380->codec = codec;
730 codec->hw_write = (hw_write_t)i2c_master_send;
731 codec->control_data = uda1380->control_data;
736 if (gpio_is_valid(pdata->gpio_reset)) {
737 ret = gpio_request(pdata->gpio_reset, "uda1380 reset");
740 ret = gpio_direction_output(pdata->gpio_reset, 0);
742 goto err_gpio_reset_conf;
745 if (gpio_is_valid(pdata->gpio_power)) {
746 ret = gpio_request(pdata->gpio_power, "uda1380 power");
749 ret = gpio_direction_output(pdata->gpio_power, 0);
751 goto err_gpio_power_conf;
753 ret = uda1380_reset(codec);
755 dev_err(codec->dev, "Failed to issue reset\n");
760 INIT_WORK(&uda1380->work, uda1380_flush_work);
762 /* power on device */
763 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
764 /* set clock input */
765 switch (pdata->dac_clk) {
766 case UDA1380_DAC_CLK_SYSCLK:
767 uda1380_write_reg_cache(codec, UDA1380_CLK, 0);
769 case UDA1380_DAC_CLK_WSPLL:
770 uda1380_write_reg_cache(codec, UDA1380_CLK,
775 snd_soc_add_controls(codec, uda1380_snd_controls,
776 ARRAY_SIZE(uda1380_snd_controls));
777 uda1380_add_widgets(codec);
783 if (gpio_is_valid(pdata->gpio_power))
784 gpio_free(pdata->gpio_power);
788 if (gpio_is_valid(pdata->gpio_reset))
789 gpio_free(pdata->gpio_reset);
794 /* power down chip */
795 static int uda1380_remove(struct snd_soc_codec *codec)
797 struct uda1380_platform_data *pdata =codec->dev->platform_data;
799 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
801 gpio_free(pdata->gpio_reset);
802 gpio_free(pdata->gpio_power);
807 static struct snd_soc_codec_driver soc_codec_dev_uda1380 = {
808 .probe = uda1380_probe,
809 .remove = uda1380_remove,
810 .suspend = uda1380_suspend,
811 .resume = uda1380_resume,
812 .read = uda1380_read_reg_cache,
813 .write = uda1380_write,
814 .set_bias_level = uda1380_set_bias_level,
815 .reg_cache_size = ARRAY_SIZE(uda1380_reg),
816 .reg_word_size = sizeof(u16),
817 .reg_cache_default = uda1380_reg,
821 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
822 static __devinit int uda1380_i2c_probe(struct i2c_client *i2c,
823 const struct i2c_device_id *id)
825 struct uda1380_priv *uda1380;
828 uda1380 = kzalloc(sizeof(struct uda1380_priv), GFP_KERNEL);
832 i2c_set_clientdata(i2c, uda1380);
833 uda1380->control_data = i2c;
835 ret = snd_soc_register_codec(&i2c->dev,
836 &soc_codec_dev_uda1380, uda1380_dai, ARRAY_SIZE(uda1380_dai));
842 static int __devexit uda1380_i2c_remove(struct i2c_client *i2c)
844 snd_soc_unregister_codec(&i2c->dev);
845 kfree(i2c_get_clientdata(i2c));
849 static const struct i2c_device_id uda1380_i2c_id[] = {
853 MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
855 static struct i2c_driver uda1380_i2c_driver = {
857 .name = "uda1380-codec",
858 .owner = THIS_MODULE,
860 .probe = uda1380_i2c_probe,
861 .remove = __devexit_p(uda1380_i2c_remove),
862 .id_table = uda1380_i2c_id,
866 static int __init uda1380_modinit(void)
869 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
870 ret = i2c_add_driver(&uda1380_i2c_driver);
872 pr_err("Failed to register UDA1380 I2C driver: %d\n", ret);
876 module_init(uda1380_modinit);
878 static void __exit uda1380_exit(void)
880 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
881 i2c_del_driver(&uda1380_i2c_driver);
884 module_exit(uda1380_exit);
886 MODULE_AUTHOR("Giorgio Padrin");
887 MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
888 MODULE_LICENSE("GPL");