2 * Intel SST Haswell/Broadwell IPC Support
4 * Copyright (C) 2013, Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version
8 * 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/list.h>
20 #include <linux/device.h>
21 #include <linux/wait.h>
22 #include <linux/spinlock.h>
23 #include <linux/workqueue.h>
24 #include <linux/export.h>
25 #include <linux/slab.h>
26 #include <linux/delay.h>
27 #include <linux/sched.h>
28 #include <linux/list.h>
29 #include <linux/platform_device.h>
30 #include <linux/kthread.h>
31 #include <linux/firmware.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/debugfs.h>
35 #include "sst-haswell-ipc.h"
37 #include "sst-dsp-priv.h"
39 /* Global Message - Generic */
40 #define IPC_GLB_TYPE_SHIFT 24
41 #define IPC_GLB_TYPE_MASK (0x1f << IPC_GLB_TYPE_SHIFT)
42 #define IPC_GLB_TYPE(x) (x << IPC_GLB_TYPE_SHIFT)
44 /* Global Message - Reply */
45 #define IPC_GLB_REPLY_SHIFT 0
46 #define IPC_GLB_REPLY_MASK (0x1f << IPC_GLB_REPLY_SHIFT)
47 #define IPC_GLB_REPLY_TYPE(x) (x << IPC_GLB_REPLY_TYPE_SHIFT)
49 /* Stream Message - Generic */
50 #define IPC_STR_TYPE_SHIFT 20
51 #define IPC_STR_TYPE_MASK (0xf << IPC_STR_TYPE_SHIFT)
52 #define IPC_STR_TYPE(x) (x << IPC_STR_TYPE_SHIFT)
53 #define IPC_STR_ID_SHIFT 16
54 #define IPC_STR_ID_MASK (0xf << IPC_STR_ID_SHIFT)
55 #define IPC_STR_ID(x) (x << IPC_STR_ID_SHIFT)
57 /* Stream Message - Reply */
58 #define IPC_STR_REPLY_SHIFT 0
59 #define IPC_STR_REPLY_MASK (0x1f << IPC_STR_REPLY_SHIFT)
61 /* Stream Stage Message - Generic */
62 #define IPC_STG_TYPE_SHIFT 12
63 #define IPC_STG_TYPE_MASK (0xf << IPC_STG_TYPE_SHIFT)
64 #define IPC_STG_TYPE(x) (x << IPC_STG_TYPE_SHIFT)
65 #define IPC_STG_ID_SHIFT 10
66 #define IPC_STG_ID_MASK (0x3 << IPC_STG_ID_SHIFT)
67 #define IPC_STG_ID(x) (x << IPC_STG_ID_SHIFT)
69 /* Stream Stage Message - Reply */
70 #define IPC_STG_REPLY_SHIFT 0
71 #define IPC_STG_REPLY_MASK (0x1f << IPC_STG_REPLY_SHIFT)
73 /* Debug Log Message - Generic */
74 #define IPC_LOG_OP_SHIFT 20
75 #define IPC_LOG_OP_MASK (0xf << IPC_LOG_OP_SHIFT)
76 #define IPC_LOG_OP_TYPE(x) (x << IPC_LOG_OP_SHIFT)
77 #define IPC_LOG_ID_SHIFT 16
78 #define IPC_LOG_ID_MASK (0xf << IPC_LOG_ID_SHIFT)
79 #define IPC_LOG_ID(x) (x << IPC_LOG_ID_SHIFT)
81 /* IPC message timeout (msecs) */
82 #define IPC_TIMEOUT_MSECS 300
83 #define IPC_BOOT_MSECS 200
84 #define IPC_MSG_WAIT 0
85 #define IPC_MSG_NOWAIT 1
87 /* Firmware Ready Message */
88 #define IPC_FW_READY (0x1 << 29)
89 #define IPC_STATUS_MASK (0x3 << 30)
91 #define IPC_EMPTY_LIST_SIZE 8
92 #define IPC_MAX_STREAMS 4
95 #define IPC_MAX_MAILBOX_BYTES 256
97 /* Global Message - Types and Replies */
99 IPC_GLB_GET_FW_VERSION = 0, /* Retrieves firmware version */
100 IPC_GLB_PERFORMANCE_MONITOR = 1, /* Performance monitoring actions */
101 IPC_GLB_ALLOCATE_STREAM = 3, /* Request to allocate new stream */
102 IPC_GLB_FREE_STREAM = 4, /* Request to free stream */
103 IPC_GLB_GET_FW_CAPABILITIES = 5, /* Retrieves firmware capabilities */
104 IPC_GLB_STREAM_MESSAGE = 6, /* Message directed to stream or its stages */
105 /* Request to store firmware context during D0->D3 transition */
106 IPC_GLB_REQUEST_DUMP = 7,
107 /* Request to restore firmware context during D3->D0 transition */
108 IPC_GLB_RESTORE_CONTEXT = 8,
109 IPC_GLB_GET_DEVICE_FORMATS = 9, /* Set device format */
110 IPC_GLB_SET_DEVICE_FORMATS = 10, /* Get device format */
111 IPC_GLB_SHORT_REPLY = 11,
112 IPC_GLB_ENTER_DX_STATE = 12,
113 IPC_GLB_GET_MIXER_STREAM_INFO = 13, /* Request mixer stream params */
114 IPC_GLB_DEBUG_LOG_MESSAGE = 14, /* Message to or from the debug logger. */
115 IPC_GLB_REQUEST_TRANSFER = 16, /* < Request Transfer for host */
116 IPC_GLB_MAX_IPC_MESSAGE_TYPE = 17, /* Maximum message number */
120 IPC_GLB_REPLY_SUCCESS = 0, /* The operation was successful. */
121 IPC_GLB_REPLY_ERROR_INVALID_PARAM = 1, /* Invalid parameter was passed. */
122 IPC_GLB_REPLY_UNKNOWN_MESSAGE_TYPE = 2, /* Uknown message type was resceived. */
123 IPC_GLB_REPLY_OUT_OF_RESOURCES = 3, /* No resources to satisfy the request. */
124 IPC_GLB_REPLY_BUSY = 4, /* The system or resource is busy. */
125 IPC_GLB_REPLY_PENDING = 5, /* The action was scheduled for processing. */
126 IPC_GLB_REPLY_FAILURE = 6, /* Critical error happened. */
127 IPC_GLB_REPLY_INVALID_REQUEST = 7, /* Request can not be completed. */
128 IPC_GLB_REPLY_STAGE_UNINITIALIZED = 8, /* Processing stage was uninitialized. */
129 IPC_GLB_REPLY_NOT_FOUND = 9, /* Required resource can not be found. */
130 IPC_GLB_REPLY_SOURCE_NOT_STARTED = 10, /* Source was not started. */
133 /* Stream Message - Types */
134 enum ipc_str_operation {
138 IPC_STR_STAGE_MESSAGE = 3,
139 IPC_STR_NOTIFICATION = 4,
143 /* Stream Stage Message Types */
144 enum ipc_stg_operation {
145 IPC_STG_GET_VOLUME = 0,
147 IPC_STG_SET_WRITE_POSITION,
148 IPC_STG_SET_FX_ENABLE,
149 IPC_STG_SET_FX_DISABLE,
150 IPC_STG_SET_FX_GET_PARAM,
151 IPC_STG_SET_FX_SET_PARAM,
152 IPC_STG_SET_FX_GET_INFO,
153 IPC_STG_MUTE_LOOPBACK,
157 /* Stream Stage Message Types For Notification*/
158 enum ipc_stg_operation_notify {
159 IPC_POSITION_CHANGED = 0,
164 enum ipc_glitch_type {
165 IPC_GLITCH_UNDERRUN = 1,
166 IPC_GLITCH_DECODER_ERROR,
167 IPC_GLITCH_DOUBLED_WRITE_POS,
172 enum ipc_debug_operation {
173 IPC_DEBUG_ENABLE_LOG = 0,
174 IPC_DEBUG_DISABLE_LOG = 1,
175 IPC_DEBUG_REQUEST_LOG_DUMP = 2,
176 IPC_DEBUG_NOTIFY_LOG_DUMP = 3,
177 IPC_DEBUG_MAX_DEBUG_LOG
181 struct sst_hsw_ipc_fw_ready {
188 } __attribute__((packed));
191 struct list_head list;
194 /* direction wrt host CPU */
195 char tx_data[IPC_MAX_MAILBOX_BYTES];
197 char rx_data[IPC_MAX_MAILBOX_BYTES];
200 wait_queue_head_t waitq;
207 struct sst_hsw_stream;
210 /* Stream infomation */
211 struct sst_hsw_stream {
213 struct sst_hsw_ipc_stream_alloc_req request;
214 struct sst_hsw_ipc_stream_alloc_reply reply;
215 struct sst_hsw_ipc_stream_free_req free_req;
218 u32 mute_volume[SST_HSW_NO_CHANNELS];
219 u32 mute[SST_HSW_NO_CHANNELS];
227 /* Notification work */
228 struct work_struct notify_work;
231 /* Position info from DSP */
232 struct sst_hsw_ipc_stream_set_position wpos;
233 struct sst_hsw_ipc_stream_get_position rpos;
234 struct sst_hsw_ipc_stream_glitch_position glitch;
237 struct sst_hsw_ipc_volume_req vol_req;
239 /* driver callback */
240 u32 (*notify_position)(struct sst_hsw_stream *stream, void *data);
243 struct list_head node;
246 /* FW log ring information */
247 struct sst_hsw_log_stream {
249 unsigned char *dma_area;
250 unsigned char *ring_descr;
254 /* Notification work */
255 struct work_struct notify_work;
256 wait_queue_head_t readers_wait_q;
257 struct mutex rw_mutex;
264 u32 config[SST_HSW_FW_LOG_CONFIG_DWORDS];
269 /* SST Haswell IPC data */
273 struct platform_device *pdev_pcm;
276 struct sst_hsw_ipc_fw_ready fw_ready;
277 struct sst_hsw_ipc_fw_version version;
278 struct sst_module *scratch;
282 struct list_head stream_list;
285 struct sst_hsw_ipc_stream_info_reply mixer_info;
286 enum sst_hsw_volume_curve curve_type;
288 u32 mute[SST_HSW_NO_CHANNELS];
289 u32 mute_volume[SST_HSW_NO_CHANNELS];
292 struct sst_hsw_ipc_dx_reply dx;
295 wait_queue_head_t boot_wait;
300 struct list_head tx_list;
301 struct list_head rx_list;
302 struct list_head empty_list;
303 wait_queue_head_t wait_txq;
304 struct task_struct *tx_thread;
305 struct kthread_worker kworker;
306 struct kthread_work kwork;
308 struct ipc_message *msg;
311 struct sst_hsw_log_stream log_stream;
314 #define CREATE_TRACE_POINTS
315 #include <trace/events/hswadsp.h>
317 static inline u32 msg_get_global_type(u32 msg)
319 return (msg & IPC_GLB_TYPE_MASK) >> IPC_GLB_TYPE_SHIFT;
322 static inline u32 msg_get_global_reply(u32 msg)
324 return (msg & IPC_GLB_REPLY_MASK) >> IPC_GLB_REPLY_SHIFT;
327 static inline u32 msg_get_stream_type(u32 msg)
329 return (msg & IPC_STR_TYPE_MASK) >> IPC_STR_TYPE_SHIFT;
332 static inline u32 msg_get_stage_type(u32 msg)
334 return (msg & IPC_STG_TYPE_MASK) >> IPC_STG_TYPE_SHIFT;
337 static inline u32 msg_set_stage_type(u32 msg, u32 type)
339 return (msg & ~IPC_STG_TYPE_MASK) +
340 (type << IPC_STG_TYPE_SHIFT);
343 static inline u32 msg_get_stream_id(u32 msg)
345 return (msg & IPC_STR_ID_MASK) >> IPC_STR_ID_SHIFT;
348 static inline u32 msg_get_notify_reason(u32 msg)
350 return (msg & IPC_STG_TYPE_MASK) >> IPC_STG_TYPE_SHIFT;
353 u32 create_channel_map(enum sst_hsw_channel_config config)
356 case SST_HSW_CHANNEL_CONFIG_MONO:
357 return (0xFFFFFFF0 | SST_HSW_CHANNEL_CENTER);
358 case SST_HSW_CHANNEL_CONFIG_STEREO:
359 return (0xFFFFFF00 | SST_HSW_CHANNEL_LEFT
360 | (SST_HSW_CHANNEL_RIGHT << 4));
361 case SST_HSW_CHANNEL_CONFIG_2_POINT_1:
362 return (0xFFFFF000 | SST_HSW_CHANNEL_LEFT
363 | (SST_HSW_CHANNEL_RIGHT << 4)
364 | (SST_HSW_CHANNEL_LFE << 8 ));
365 case SST_HSW_CHANNEL_CONFIG_3_POINT_0:
366 return (0xFFFFF000 | SST_HSW_CHANNEL_LEFT
367 | (SST_HSW_CHANNEL_CENTER << 4)
368 | (SST_HSW_CHANNEL_RIGHT << 8));
369 case SST_HSW_CHANNEL_CONFIG_3_POINT_1:
370 return (0xFFFF0000 | SST_HSW_CHANNEL_LEFT
371 | (SST_HSW_CHANNEL_CENTER << 4)
372 | (SST_HSW_CHANNEL_RIGHT << 8)
373 | (SST_HSW_CHANNEL_LFE << 12));
374 case SST_HSW_CHANNEL_CONFIG_QUATRO:
375 return (0xFFFF0000 | SST_HSW_CHANNEL_LEFT
376 | (SST_HSW_CHANNEL_RIGHT << 4)
377 | (SST_HSW_CHANNEL_LEFT_SURROUND << 8)
378 | (SST_HSW_CHANNEL_RIGHT_SURROUND << 12));
379 case SST_HSW_CHANNEL_CONFIG_4_POINT_0:
380 return (0xFFFF0000 | SST_HSW_CHANNEL_LEFT
381 | (SST_HSW_CHANNEL_CENTER << 4)
382 | (SST_HSW_CHANNEL_RIGHT << 8)
383 | (SST_HSW_CHANNEL_CENTER_SURROUND << 12));
384 case SST_HSW_CHANNEL_CONFIG_5_POINT_0:
385 return (0xFFF00000 | SST_HSW_CHANNEL_LEFT
386 | (SST_HSW_CHANNEL_CENTER << 4)
387 | (SST_HSW_CHANNEL_RIGHT << 8)
388 | (SST_HSW_CHANNEL_LEFT_SURROUND << 12)
389 | (SST_HSW_CHANNEL_RIGHT_SURROUND << 16));
390 case SST_HSW_CHANNEL_CONFIG_5_POINT_1:
391 return (0xFF000000 | SST_HSW_CHANNEL_CENTER
392 | (SST_HSW_CHANNEL_LEFT << 4)
393 | (SST_HSW_CHANNEL_RIGHT << 8)
394 | (SST_HSW_CHANNEL_LEFT_SURROUND << 12)
395 | (SST_HSW_CHANNEL_RIGHT_SURROUND << 16)
396 | (SST_HSW_CHANNEL_LFE << 20));
397 case SST_HSW_CHANNEL_CONFIG_DUAL_MONO:
398 return (0xFFFFFF00 | SST_HSW_CHANNEL_LEFT
399 | (SST_HSW_CHANNEL_LEFT << 4));
405 static struct sst_hsw_stream *get_stream_by_id(struct sst_hsw *hsw,
408 struct sst_hsw_stream *stream;
410 list_for_each_entry(stream, &hsw->stream_list, node) {
411 if (stream->reply.stream_hw_id == stream_id)
418 static void ipc_shim_dbg(struct sst_hsw *hsw, const char *text)
420 struct sst_dsp *sst = hsw->dsp;
421 u32 isr, ipcd, imrx, ipcx;
423 ipcx = sst_dsp_shim_read_unlocked(sst, SST_IPCX);
424 isr = sst_dsp_shim_read_unlocked(sst, SST_ISRX);
425 ipcd = sst_dsp_shim_read_unlocked(sst, SST_IPCD);
426 imrx = sst_dsp_shim_read_unlocked(sst, SST_IMRX);
428 dev_err(hsw->dev, "ipc: --%s-- ipcx 0x%8.8x isr 0x%8.8x ipcd 0x%8.8x imrx 0x%8.8x\n",
429 text, ipcx, isr, ipcd, imrx);
432 /* locks held by caller */
433 static struct ipc_message *msg_get_empty(struct sst_hsw *hsw)
435 struct ipc_message *msg = NULL;
437 if (!list_empty(&hsw->empty_list)) {
438 msg = list_first_entry(&hsw->empty_list, struct ipc_message,
440 list_del(&msg->list);
446 static void ipc_tx_msgs(struct kthread_work *work)
448 struct sst_hsw *hsw =
449 container_of(work, struct sst_hsw, kwork);
450 struct ipc_message *msg;
454 spin_lock_irqsave(&hsw->dsp->spinlock, flags);
456 if (list_empty(&hsw->tx_list) || hsw->pending) {
457 spin_unlock_irqrestore(&hsw->dsp->spinlock, flags);
461 /* if the DSP is busy we will TX messages after IRQ */
462 ipcx = sst_dsp_shim_read_unlocked(hsw->dsp, SST_IPCX);
463 if (ipcx & SST_IPCX_BUSY) {
464 spin_unlock_irqrestore(&hsw->dsp->spinlock, flags);
468 msg = list_first_entry(&hsw->tx_list, struct ipc_message, list);
470 list_move(&msg->list, &hsw->rx_list);
472 /* send the message */
473 sst_dsp_outbox_write(hsw->dsp, msg->tx_data, msg->tx_size);
474 sst_dsp_ipc_msg_tx(hsw->dsp, msg->header | SST_IPCX_BUSY);
476 spin_unlock_irqrestore(&hsw->dsp->spinlock, flags);
479 /* locks held by caller */
480 static void tx_msg_reply_complete(struct sst_hsw *hsw, struct ipc_message *msg)
482 msg->complete = true;
483 trace_ipc_reply("completed", msg->header);
486 list_add_tail(&msg->list, &hsw->empty_list);
488 wake_up(&msg->waitq);
491 static int tx_wait_done(struct sst_hsw *hsw, struct ipc_message *msg,
497 /* wait for DSP completion (in all cases atm inc pending) */
498 ret = wait_event_timeout(msg->waitq, msg->complete,
499 msecs_to_jiffies(IPC_TIMEOUT_MSECS));
501 spin_lock_irqsave(&hsw->dsp->spinlock, flags);
503 ipc_shim_dbg(hsw, "message timeout");
505 trace_ipc_error("error message timeout for", msg->header);
509 /* copy the data returned from DSP */
511 memcpy(rx_data, msg->rx_data, msg->rx_size);
515 list_add_tail(&msg->list, &hsw->empty_list);
516 spin_unlock_irqrestore(&hsw->dsp->spinlock, flags);
520 static int ipc_tx_message(struct sst_hsw *hsw, u32 header, void *tx_data,
521 size_t tx_bytes, void *rx_data, size_t rx_bytes, int wait)
523 struct ipc_message *msg;
526 spin_lock_irqsave(&hsw->dsp->spinlock, flags);
528 msg = msg_get_empty(hsw);
530 spin_unlock_irqrestore(&hsw->dsp->spinlock, flags);
535 memcpy(msg->tx_data, tx_data, tx_bytes);
537 msg->header = header;
538 msg->tx_size = tx_bytes;
539 msg->rx_size = rx_bytes;
542 msg->pending = false;
543 msg->complete = false;
545 list_add_tail(&msg->list, &hsw->tx_list);
546 spin_unlock_irqrestore(&hsw->dsp->spinlock, flags);
548 queue_kthread_work(&hsw->kworker, &hsw->kwork);
551 return tx_wait_done(hsw, msg, rx_data);
556 static inline int ipc_tx_message_wait(struct sst_hsw *hsw, u32 header,
557 void *tx_data, size_t tx_bytes, void *rx_data, size_t rx_bytes)
559 return ipc_tx_message(hsw, header, tx_data, tx_bytes, rx_data,
563 static inline int ipc_tx_message_nowait(struct sst_hsw *hsw, u32 header,
564 void *tx_data, size_t tx_bytes)
566 return ipc_tx_message(hsw, header, tx_data, tx_bytes, NULL, 0, 0);
569 static void hsw_fw_ready(struct sst_hsw *hsw, u32 header)
571 struct sst_hsw_ipc_fw_ready fw_ready;
574 offset = (header & 0x1FFFFFFF) << 3;
576 dev_dbg(hsw->dev, "ipc: DSP is ready 0x%8.8x offset %d\n",
579 /* copy data from the DSP FW ready offset */
580 sst_dsp_read(hsw->dsp, &fw_ready, offset, sizeof(fw_ready));
582 sst_dsp_mailbox_init(hsw->dsp, fw_ready.inbox_offset,
583 fw_ready.inbox_size, fw_ready.outbox_offset,
584 fw_ready.outbox_size);
586 hsw->boot_complete = true;
587 wake_up(&hsw->boot_wait);
589 dev_dbg(hsw->dev, " mailbox upstream 0x%x - size 0x%x\n",
590 fw_ready.inbox_offset, fw_ready.inbox_size);
591 dev_dbg(hsw->dev, " mailbox downstream 0x%x - size 0x%x\n",
592 fw_ready.outbox_offset, fw_ready.outbox_size);
595 static void hsw_notification_work(struct work_struct *work)
597 struct sst_hsw_stream *stream = container_of(work,
598 struct sst_hsw_stream, notify_work);
599 struct sst_hsw_ipc_stream_glitch_position *glitch = &stream->glitch;
600 struct sst_hsw_ipc_stream_get_position *pos = &stream->rpos;
601 struct sst_hsw *hsw = stream->hsw;
604 reason = msg_get_notify_reason(stream->header);
608 trace_ipc_notification("DSP stream under/overrun",
609 stream->reply.stream_hw_id);
610 sst_dsp_inbox_read(hsw->dsp, glitch, sizeof(*glitch));
612 dev_err(hsw->dev, "glitch %d pos 0x%x write pos 0x%x\n",
613 glitch->glitch_type, glitch->present_pos,
617 case IPC_POSITION_CHANGED:
618 trace_ipc_notification("DSP stream position changed for",
619 stream->reply.stream_hw_id);
620 sst_dsp_inbox_read(hsw->dsp, pos, sizeof(*pos));
622 if (stream->notify_position)
623 stream->notify_position(stream, stream->pdata);
627 dev_err(hsw->dev, "error: unknown notification 0x%x\n",
632 /* tell DSP that notification has been handled */
633 sst_dsp_shim_update_bits_unlocked(hsw->dsp, SST_IPCD,
634 SST_IPCD_BUSY | SST_IPCD_DONE, SST_IPCD_DONE);
636 /* unmask busy interrupt */
637 sst_dsp_shim_update_bits_unlocked(hsw->dsp, SST_IMRX, SST_IMRX_BUSY, 0);
640 static struct ipc_message *reply_find_msg(struct sst_hsw *hsw, u32 header)
642 struct ipc_message *msg;
644 /* clear reply bits & status bits */
645 header &= ~(IPC_STATUS_MASK | IPC_GLB_REPLY_MASK);
647 if (list_empty(&hsw->rx_list)) {
648 dev_err(hsw->dev, "error: rx list empty but received 0x%x\n",
653 list_for_each_entry(msg, &hsw->rx_list, list) {
654 if (msg->header == header)
661 static void hsw_stream_update(struct sst_hsw *hsw, struct ipc_message *msg)
663 struct sst_hsw_stream *stream;
664 u32 header = msg->header & ~(IPC_STATUS_MASK | IPC_GLB_REPLY_MASK);
665 u32 stream_id = msg_get_stream_id(header);
666 u32 stream_msg = msg_get_stream_type(header);
668 stream = get_stream_by_id(hsw, stream_id);
672 switch (stream_msg) {
673 case IPC_STR_STAGE_MESSAGE:
674 case IPC_STR_NOTIFICATION:
678 stream->running = false;
679 trace_ipc_notification("stream paused",
680 stream->reply.stream_hw_id);
683 stream->running = true;
684 trace_ipc_notification("stream running",
685 stream->reply.stream_hw_id);
690 static int hsw_process_reply(struct sst_hsw *hsw, u32 header)
692 struct ipc_message *msg;
693 u32 reply = msg_get_global_reply(header);
695 trace_ipc_reply("processing -->", header);
697 msg = reply_find_msg(hsw, header);
699 trace_ipc_error("error: can't find message header", header);
703 /* first process the header */
705 case IPC_GLB_REPLY_PENDING:
706 trace_ipc_pending_reply("received", header);
710 case IPC_GLB_REPLY_SUCCESS:
712 trace_ipc_pending_reply("completed", header);
713 sst_dsp_inbox_read(hsw->dsp, msg->rx_data,
715 hsw->pending = false;
717 /* copy data from the DSP */
718 sst_dsp_outbox_read(hsw->dsp, msg->rx_data,
722 /* these will be rare - but useful for debug */
723 case IPC_GLB_REPLY_UNKNOWN_MESSAGE_TYPE:
724 trace_ipc_error("error: unknown message type", header);
725 msg->errno = -EBADMSG;
727 case IPC_GLB_REPLY_OUT_OF_RESOURCES:
728 trace_ipc_error("error: out of resources", header);
729 msg->errno = -ENOMEM;
731 case IPC_GLB_REPLY_BUSY:
732 trace_ipc_error("error: reply busy", header);
735 case IPC_GLB_REPLY_FAILURE:
736 trace_ipc_error("error: reply failure", header);
737 msg->errno = -EINVAL;
739 case IPC_GLB_REPLY_STAGE_UNINITIALIZED:
740 trace_ipc_error("error: stage uninitialized", header);
741 msg->errno = -EINVAL;
743 case IPC_GLB_REPLY_NOT_FOUND:
744 trace_ipc_error("error: reply not found", header);
745 msg->errno = -EINVAL;
747 case IPC_GLB_REPLY_SOURCE_NOT_STARTED:
748 trace_ipc_error("error: source not started", header);
749 msg->errno = -EINVAL;
751 case IPC_GLB_REPLY_INVALID_REQUEST:
752 trace_ipc_error("error: invalid request", header);
753 msg->errno = -EINVAL;
755 case IPC_GLB_REPLY_ERROR_INVALID_PARAM:
756 trace_ipc_error("error: invalid parameter", header);
757 msg->errno = -EINVAL;
760 trace_ipc_error("error: unknown reply", header);
761 msg->errno = -EINVAL;
765 /* update any stream states */
766 hsw_stream_update(hsw, msg);
768 /* wake up and return the error if we have waiters on this message ? */
769 list_del(&msg->list);
770 tx_msg_reply_complete(hsw, msg);
775 static int hsw_stream_message(struct sst_hsw *hsw, u32 header)
777 u32 stream_msg, stream_id, stage_type;
778 struct sst_hsw_stream *stream;
781 stream_msg = msg_get_stream_type(header);
782 stream_id = msg_get_stream_id(header);
783 stage_type = msg_get_stage_type(header);
785 stream = get_stream_by_id(hsw, stream_id);
789 stream->header = header;
791 switch (stream_msg) {
792 case IPC_STR_STAGE_MESSAGE:
793 dev_err(hsw->dev, "error: stage msg not implemented 0x%8.8x\n",
796 case IPC_STR_NOTIFICATION:
797 schedule_work(&stream->notify_work);
800 /* handle pending message complete request */
801 handled = hsw_process_reply(hsw, header);
808 static int hsw_log_message(struct sst_hsw *hsw, u32 header)
810 u32 operation = (header & IPC_LOG_OP_MASK) >> IPC_LOG_OP_SHIFT;
811 struct sst_hsw_log_stream *stream = &hsw->log_stream;
814 if (operation != IPC_DEBUG_REQUEST_LOG_DUMP) {
816 "error: log msg not implemented 0x%8.8x\n", header);
820 mutex_lock(&stream->rw_mutex);
821 stream->last_pos = stream->curr_pos;
823 hsw->dsp, &stream->curr_pos, sizeof(stream->curr_pos));
824 mutex_unlock(&stream->rw_mutex);
826 schedule_work(&stream->notify_work);
831 static int hsw_process_notification(struct sst_hsw *hsw)
833 struct sst_dsp *sst = hsw->dsp;
837 header = sst_dsp_shim_read_unlocked(sst, SST_IPCD);
838 type = msg_get_global_type(header);
840 trace_ipc_request("processing -->", header);
842 /* FW Ready is a special case */
843 if (!hsw->boot_complete && header & IPC_FW_READY) {
844 hsw_fw_ready(hsw, header);
849 case IPC_GLB_GET_FW_VERSION:
850 case IPC_GLB_ALLOCATE_STREAM:
851 case IPC_GLB_FREE_STREAM:
852 case IPC_GLB_GET_FW_CAPABILITIES:
853 case IPC_GLB_REQUEST_DUMP:
854 case IPC_GLB_GET_DEVICE_FORMATS:
855 case IPC_GLB_SET_DEVICE_FORMATS:
856 case IPC_GLB_ENTER_DX_STATE:
857 case IPC_GLB_GET_MIXER_STREAM_INFO:
858 case IPC_GLB_MAX_IPC_MESSAGE_TYPE:
859 case IPC_GLB_RESTORE_CONTEXT:
860 case IPC_GLB_SHORT_REPLY:
861 dev_err(hsw->dev, "error: message type %d header 0x%x\n",
864 case IPC_GLB_STREAM_MESSAGE:
865 handled = hsw_stream_message(hsw, header);
867 case IPC_GLB_DEBUG_LOG_MESSAGE:
868 handled = hsw_log_message(hsw, header);
871 dev_err(hsw->dev, "error: unexpected type %d hdr 0x%8.8x\n",
879 static irqreturn_t hsw_irq_thread(int irq, void *context)
881 struct sst_dsp *sst = (struct sst_dsp *) context;
882 struct sst_hsw *hsw = sst_dsp_get_thread_context(sst);
887 spin_lock_irqsave(&sst->spinlock, flags);
889 ipcx = sst_dsp_ipc_msg_rx(hsw->dsp);
890 ipcd = sst_dsp_shim_read_unlocked(sst, SST_IPCD);
892 /* reply message from DSP */
893 if (ipcx & SST_IPCX_DONE) {
895 /* Handle Immediate reply from DSP Core */
896 handled = hsw_process_reply(hsw, ipcx);
899 /* clear DONE bit - tell DSP we have completed */
900 sst_dsp_shim_update_bits_unlocked(sst, SST_IPCX,
903 /* unmask Done interrupt */
904 sst_dsp_shim_update_bits_unlocked(sst, SST_IMRX,
909 /* new message from DSP */
910 if (ipcd & SST_IPCD_BUSY) {
912 /* Handle Notification and Delayed reply from DSP Core */
913 handled = hsw_process_notification(hsw);
915 /* clear BUSY bit and set DONE bit - accept new messages */
917 sst_dsp_shim_update_bits_unlocked(sst, SST_IPCD,
918 SST_IPCD_BUSY | SST_IPCD_DONE, SST_IPCD_DONE);
920 /* unmask busy interrupt */
921 sst_dsp_shim_update_bits_unlocked(sst, SST_IMRX,
926 spin_unlock_irqrestore(&sst->spinlock, flags);
928 /* continue to send any remaining messages... */
929 queue_kthread_work(&hsw->kworker, &hsw->kwork);
934 int sst_hsw_fw_get_version(struct sst_hsw *hsw,
935 struct sst_hsw_ipc_fw_version *version)
939 ret = ipc_tx_message_wait(hsw, IPC_GLB_TYPE(IPC_GLB_GET_FW_VERSION),
940 NULL, 0, version, sizeof(*version));
942 dev_err(hsw->dev, "error: get version failed\n");
948 int sst_hsw_stream_mute(struct sst_hsw *hsw, struct sst_hsw_stream *stream,
949 u32 stage_id, u32 channel)
953 ret = sst_hsw_stream_get_volume(hsw, stream, stage_id, channel,
954 &stream->mute_volume[channel]);
958 ret = sst_hsw_stream_set_volume(hsw, stream, stage_id, channel, 0);
960 dev_err(hsw->dev, "error: can't unmute stream %d channel %d\n",
961 stream->reply.stream_hw_id, channel);
965 stream->mute[channel] = 1;
969 int sst_hsw_stream_unmute(struct sst_hsw *hsw, struct sst_hsw_stream *stream,
970 u32 stage_id, u32 channel)
975 stream->mute[channel] = 0;
976 ret = sst_hsw_stream_set_volume(hsw, stream, stage_id, channel,
977 stream->mute_volume[channel]);
979 dev_err(hsw->dev, "error: can't unmute stream %d channel %d\n",
980 stream->reply.stream_hw_id, channel);
987 int sst_hsw_stream_get_volume(struct sst_hsw *hsw, struct sst_hsw_stream *stream,
988 u32 stage_id, u32 channel, u32 *volume)
993 sst_dsp_read(hsw->dsp, volume,
994 stream->reply.volume_register_address[channel],
1000 int sst_hsw_stream_set_volume_curve(struct sst_hsw *hsw,
1001 struct sst_hsw_stream *stream, u64 curve_duration,
1002 enum sst_hsw_volume_curve curve)
1004 /* curve duration in steps of 100ns */
1005 stream->vol_req.curve_duration = curve_duration;
1006 stream->vol_req.curve_type = curve;
1012 int sst_hsw_stream_set_volume(struct sst_hsw *hsw,
1013 struct sst_hsw_stream *stream, u32 stage_id, u32 channel, u32 volume)
1015 struct sst_hsw_ipc_volume_req *req;
1019 trace_ipc_request("set stream volume", stream->reply.stream_hw_id);
1024 if (stream->mute[channel]) {
1025 stream->mute_volume[channel] = volume;
1029 header = IPC_GLB_TYPE(IPC_GLB_STREAM_MESSAGE) |
1030 IPC_STR_TYPE(IPC_STR_STAGE_MESSAGE);
1031 header |= (stream->reply.stream_hw_id << IPC_STR_ID_SHIFT);
1032 header |= (IPC_STG_SET_VOLUME << IPC_STG_TYPE_SHIFT);
1033 header |= (stage_id << IPC_STG_ID_SHIFT);
1035 req = &stream->vol_req;
1036 req->channel = channel;
1037 req->target_volume = volume;
1039 ret = ipc_tx_message_wait(hsw, header, req, sizeof(*req), NULL, 0);
1041 dev_err(hsw->dev, "error: set stream volume failed\n");
1048 int sst_hsw_mixer_mute(struct sst_hsw *hsw, u32 stage_id, u32 channel)
1052 ret = sst_hsw_mixer_get_volume(hsw, stage_id, channel,
1053 &hsw->mute_volume[channel]);
1057 ret = sst_hsw_mixer_set_volume(hsw, stage_id, channel, 0);
1059 dev_err(hsw->dev, "error: failed to unmute mixer channel %d\n",
1064 hsw->mute[channel] = 1;
1068 int sst_hsw_mixer_unmute(struct sst_hsw *hsw, u32 stage_id, u32 channel)
1072 ret = sst_hsw_mixer_set_volume(hsw, stage_id, channel,
1073 hsw->mixer_info.volume_register_address[channel]);
1075 dev_err(hsw->dev, "error: failed to unmute mixer channel %d\n",
1080 hsw->mute[channel] = 0;
1084 int sst_hsw_mixer_get_volume(struct sst_hsw *hsw, u32 stage_id, u32 channel,
1090 sst_dsp_read(hsw->dsp, volume,
1091 hsw->mixer_info.volume_register_address[channel],
1097 int sst_hsw_mixer_set_volume_curve(struct sst_hsw *hsw,
1098 u64 curve_duration, enum sst_hsw_volume_curve curve)
1100 /* curve duration in steps of 100ns */
1101 hsw->curve_duration = curve_duration;
1102 hsw->curve_type = curve;
1107 /* global mixer volume */
1108 int sst_hsw_mixer_set_volume(struct sst_hsw *hsw, u32 stage_id, u32 channel,
1111 struct sst_hsw_ipc_volume_req req;
1115 trace_ipc_request("set mixer volume", volume);
1117 /* set both at same time ? */
1119 if (hsw->mute[0] && hsw->mute[1]) {
1120 hsw->mute_volume[0] = hsw->mute_volume[1] = volume;
1122 } else if (hsw->mute[0])
1124 else if (hsw->mute[1])
1127 req.channel = 0xffffffff;
1129 /* set only 1 channel */
1130 if (hsw->mute[channel]) {
1131 hsw->mute_volume[channel] = volume;
1134 req.channel = channel;
1137 header = IPC_GLB_TYPE(IPC_GLB_STREAM_MESSAGE) |
1138 IPC_STR_TYPE(IPC_STR_STAGE_MESSAGE);
1139 header |= (hsw->mixer_info.mixer_hw_id << IPC_STR_ID_SHIFT);
1140 header |= (IPC_STG_SET_VOLUME << IPC_STG_TYPE_SHIFT);
1141 header |= (stage_id << IPC_STG_ID_SHIFT);
1143 req.curve_duration = hsw->curve_duration;
1144 req.curve_type = hsw->curve_type;
1145 req.target_volume = volume;
1147 ret = ipc_tx_message_wait(hsw, header, &req, sizeof(req), NULL, 0);
1149 dev_err(hsw->dev, "error: set mixer volume failed\n");
1157 struct sst_hsw_stream *sst_hsw_stream_new(struct sst_hsw *hsw, int id,
1158 u32 (*notify_position)(struct sst_hsw_stream *stream, void *data),
1161 struct sst_hsw_stream *stream;
1162 struct sst_dsp *sst = hsw->dsp;
1163 unsigned long flags;
1165 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
1169 spin_lock_irqsave(&sst->spinlock, flags);
1170 list_add(&stream->node, &hsw->stream_list);
1171 stream->notify_position = notify_position;
1172 stream->pdata = data;
1174 stream->host_id = id;
1176 /* work to process notification messages */
1177 INIT_WORK(&stream->notify_work, hsw_notification_work);
1178 spin_unlock_irqrestore(&sst->spinlock, flags);
1183 int sst_hsw_stream_free(struct sst_hsw *hsw, struct sst_hsw_stream *stream)
1187 struct sst_dsp *sst = hsw->dsp;
1188 unsigned long flags;
1190 /* dont free DSP streams that are not commited */
1191 if (!stream->commited)
1194 trace_ipc_request("stream free", stream->host_id);
1196 stream->free_req.stream_id = stream->reply.stream_hw_id;
1197 header = IPC_GLB_TYPE(IPC_GLB_FREE_STREAM);
1199 ret = ipc_tx_message_wait(hsw, header, &stream->free_req,
1200 sizeof(stream->free_req), NULL, 0);
1202 dev_err(hsw->dev, "error: free stream %d failed\n",
1203 stream->free_req.stream_id);
1207 trace_hsw_stream_free_req(stream, &stream->free_req);
1210 cancel_work_sync(&stream->notify_work);
1211 spin_lock_irqsave(&sst->spinlock, flags);
1212 list_del(&stream->node);
1214 spin_unlock_irqrestore(&sst->spinlock, flags);
1219 int sst_hsw_stream_set_bits(struct sst_hsw *hsw,
1220 struct sst_hsw_stream *stream, enum sst_hsw_bitdepth bits)
1222 if (stream->commited) {
1223 dev_err(hsw->dev, "error: stream committed for set bits\n");
1227 stream->request.format.bitdepth = bits;
1231 int sst_hsw_stream_set_channels(struct sst_hsw *hsw,
1232 struct sst_hsw_stream *stream, int channels)
1234 if (stream->commited) {
1235 dev_err(hsw->dev, "error: stream committed for set channels\n");
1239 /* stereo is only supported atm */
1243 stream->request.format.ch_num = channels;
1247 int sst_hsw_stream_set_rate(struct sst_hsw *hsw,
1248 struct sst_hsw_stream *stream, int rate)
1250 if (stream->commited) {
1251 dev_err(hsw->dev, "error: stream committed for set rate\n");
1255 stream->request.format.frequency = rate;
1259 int sst_hsw_stream_set_map_config(struct sst_hsw *hsw,
1260 struct sst_hsw_stream *stream, u32 map,
1261 enum sst_hsw_channel_config config)
1263 if (stream->commited) {
1264 dev_err(hsw->dev, "error: stream committed for set map\n");
1268 stream->request.format.map = map;
1269 stream->request.format.config = config;
1273 int sst_hsw_stream_set_style(struct sst_hsw *hsw,
1274 struct sst_hsw_stream *stream, enum sst_hsw_interleaving style)
1276 if (stream->commited) {
1277 dev_err(hsw->dev, "error: stream committed for set style\n");
1281 stream->request.format.style = style;
1285 int sst_hsw_stream_set_valid(struct sst_hsw *hsw,
1286 struct sst_hsw_stream *stream, u32 bits)
1288 if (stream->commited) {
1289 dev_err(hsw->dev, "error: stream committed for set valid bits\n");
1293 stream->request.format.valid_bit = bits;
1297 /* Stream Configuration */
1298 int sst_hsw_stream_format(struct sst_hsw *hsw, struct sst_hsw_stream *stream,
1299 enum sst_hsw_stream_path_id path_id,
1300 enum sst_hsw_stream_type stream_type,
1301 enum sst_hsw_stream_format format_id)
1303 if (stream->commited) {
1304 dev_err(hsw->dev, "error: stream committed for set format\n");
1308 stream->request.path_id = path_id;
1309 stream->request.stream_type = stream_type;
1310 stream->request.format_id = format_id;
1312 trace_hsw_stream_alloc_request(stream, &stream->request);
1317 int sst_hsw_stream_buffer(struct sst_hsw *hsw, struct sst_hsw_stream *stream,
1318 u32 ring_pt_address, u32 num_pages,
1319 u32 ring_size, u32 ring_offset, u32 ring_first_pfn)
1321 if (stream->commited) {
1322 dev_err(hsw->dev, "error: stream committed for buffer\n");
1326 stream->request.ringinfo.ring_pt_address = ring_pt_address;
1327 stream->request.ringinfo.num_pages = num_pages;
1328 stream->request.ringinfo.ring_size = ring_size;
1329 stream->request.ringinfo.ring_offset = ring_offset;
1330 stream->request.ringinfo.ring_first_pfn = ring_first_pfn;
1332 trace_hsw_stream_buffer(stream);
1337 int sst_hsw_stream_set_module_info(struct sst_hsw *hsw,
1338 struct sst_hsw_stream *stream, enum sst_hsw_module_id module_id,
1341 struct sst_hsw_module_map *map = &stream->request.map;
1343 if (stream->commited) {
1344 dev_err(hsw->dev, "error: stream committed for set module\n");
1348 /* only support initial module atm */
1349 map->module_entries_count = 1;
1350 map->module_entries[0].module_id = module_id;
1351 map->module_entries[0].entry_point = entry_point;
1356 int sst_hsw_stream_set_pmemory_info(struct sst_hsw *hsw,
1357 struct sst_hsw_stream *stream, u32 offset, u32 size)
1359 if (stream->commited) {
1360 dev_err(hsw->dev, "error: stream committed for set pmem\n");
1364 stream->request.persistent_mem.offset = offset;
1365 stream->request.persistent_mem.size = size;
1370 int sst_hsw_stream_set_smemory_info(struct sst_hsw *hsw,
1371 struct sst_hsw_stream *stream, u32 offset, u32 size)
1373 if (stream->commited) {
1374 dev_err(hsw->dev, "error: stream committed for set smem\n");
1378 stream->request.scratch_mem.offset = offset;
1379 stream->request.scratch_mem.size = size;
1384 int sst_hsw_stream_commit(struct sst_hsw *hsw, struct sst_hsw_stream *stream)
1386 struct sst_hsw_ipc_stream_alloc_req *str_req = &stream->request;
1387 struct sst_hsw_ipc_stream_alloc_reply *reply = &stream->reply;
1391 trace_ipc_request("stream alloc", stream->host_id);
1393 header = IPC_GLB_TYPE(IPC_GLB_ALLOCATE_STREAM);
1395 ret = ipc_tx_message_wait(hsw, header, str_req, sizeof(*str_req),
1396 reply, sizeof(*reply));
1398 dev_err(hsw->dev, "error: stream commit failed\n");
1402 stream->commited = 1;
1403 trace_hsw_stream_alloc_reply(stream);
1408 /* Stream Information - these calls could be inline but we want the IPC
1409 ABI to be opaque to client PCM drivers to cope with any future ABI changes */
1410 int sst_hsw_stream_get_hw_id(struct sst_hsw *hsw,
1411 struct sst_hsw_stream *stream)
1413 return stream->reply.stream_hw_id;
1416 int sst_hsw_stream_get_mixer_id(struct sst_hsw *hsw,
1417 struct sst_hsw_stream *stream)
1419 return stream->reply.mixer_hw_id;
1422 u32 sst_hsw_stream_get_read_reg(struct sst_hsw *hsw,
1423 struct sst_hsw_stream *stream)
1425 return stream->reply.read_position_register_address;
1428 u32 sst_hsw_stream_get_pointer_reg(struct sst_hsw *hsw,
1429 struct sst_hsw_stream *stream)
1431 return stream->reply.presentation_position_register_address;
1434 u32 sst_hsw_stream_get_peak_reg(struct sst_hsw *hsw,
1435 struct sst_hsw_stream *stream, u32 channel)
1440 return stream->reply.peak_meter_register_address[channel];
1443 u32 sst_hsw_stream_get_vol_reg(struct sst_hsw *hsw,
1444 struct sst_hsw_stream *stream, u32 channel)
1449 return stream->reply.volume_register_address[channel];
1452 int sst_hsw_mixer_get_info(struct sst_hsw *hsw)
1454 struct sst_hsw_ipc_stream_info_reply *reply;
1458 reply = &hsw->mixer_info;
1459 header = IPC_GLB_TYPE(IPC_GLB_GET_MIXER_STREAM_INFO);
1461 trace_ipc_request("get global mixer info", 0);
1463 ret = ipc_tx_message_wait(hsw, header, NULL, 0, reply, sizeof(*reply));
1465 dev_err(hsw->dev, "error: get stream info failed\n");
1469 trace_hsw_mixer_info_reply(reply);
1474 /* Send stream command */
1475 static int sst_hsw_stream_operations(struct sst_hsw *hsw, int type,
1476 int stream_id, int wait)
1480 header = IPC_GLB_TYPE(IPC_GLB_STREAM_MESSAGE) | IPC_STR_TYPE(type);
1481 header |= (stream_id << IPC_STR_ID_SHIFT);
1484 return ipc_tx_message_wait(hsw, header, NULL, 0, NULL, 0);
1486 return ipc_tx_message_nowait(hsw, header, NULL, 0);
1489 /* Stream ALSA trigger operations */
1490 int sst_hsw_stream_pause(struct sst_hsw *hsw, struct sst_hsw_stream *stream,
1495 trace_ipc_request("stream pause", stream->reply.stream_hw_id);
1497 ret = sst_hsw_stream_operations(hsw, IPC_STR_PAUSE,
1498 stream->reply.stream_hw_id, wait);
1500 dev_err(hsw->dev, "error: failed to pause stream %d\n",
1501 stream->reply.stream_hw_id);
1506 int sst_hsw_stream_resume(struct sst_hsw *hsw, struct sst_hsw_stream *stream,
1511 trace_ipc_request("stream resume", stream->reply.stream_hw_id);
1513 ret = sst_hsw_stream_operations(hsw, IPC_STR_RESUME,
1514 stream->reply.stream_hw_id, wait);
1516 dev_err(hsw->dev, "error: failed to resume stream %d\n",
1517 stream->reply.stream_hw_id);
1522 int sst_hsw_stream_reset(struct sst_hsw *hsw, struct sst_hsw_stream *stream)
1524 int ret, tries = 10;
1526 /* dont reset streams that are not commited */
1527 if (!stream->commited)
1530 /* wait for pause to complete before we reset the stream */
1531 while (stream->running && tries--)
1534 dev_err(hsw->dev, "error: reset stream %d still running\n",
1535 stream->reply.stream_hw_id);
1539 trace_ipc_request("stream reset", stream->reply.stream_hw_id);
1541 ret = sst_hsw_stream_operations(hsw, IPC_STR_RESET,
1542 stream->reply.stream_hw_id, 1);
1544 dev_err(hsw->dev, "error: failed to reset stream %d\n",
1545 stream->reply.stream_hw_id);
1549 /* Stream pointer positions */
1550 int sst_hsw_get_dsp_position(struct sst_hsw *hsw,
1551 struct sst_hsw_stream *stream)
1553 return stream->rpos.position;
1556 int sst_hsw_stream_set_write_position(struct sst_hsw *hsw,
1557 struct sst_hsw_stream *stream, u32 stage_id, u32 position)
1562 trace_stream_write_position(stream->reply.stream_hw_id, position);
1564 header = IPC_GLB_TYPE(IPC_GLB_STREAM_MESSAGE) |
1565 IPC_STR_TYPE(IPC_STR_STAGE_MESSAGE);
1566 header |= (stream->reply.stream_hw_id << IPC_STR_ID_SHIFT);
1567 header |= (IPC_STG_SET_WRITE_POSITION << IPC_STG_TYPE_SHIFT);
1568 header |= (stage_id << IPC_STG_ID_SHIFT);
1569 stream->wpos.position = position;
1571 ret = ipc_tx_message_nowait(hsw, header, &stream->wpos,
1572 sizeof(stream->wpos));
1574 dev_err(hsw->dev, "error: stream %d set position %d failed\n",
1575 stream->reply.stream_hw_id, position);
1580 /* physical BE config */
1581 int sst_hsw_device_set_config(struct sst_hsw *hsw,
1582 enum sst_hsw_device_id dev, enum sst_hsw_device_mclk mclk,
1583 enum sst_hsw_device_mode mode, u32 clock_divider)
1585 struct sst_hsw_ipc_device_config_req config;
1589 trace_ipc_request("set device config", dev);
1591 config.ssp_interface = dev;
1592 config.clock_frequency = mclk;
1594 config.clock_divider = clock_divider;
1596 trace_hsw_device_config_req(&config);
1598 header = IPC_GLB_TYPE(IPC_GLB_SET_DEVICE_FORMATS);
1600 ret = ipc_tx_message_wait(hsw, header, &config, sizeof(config),
1603 dev_err(hsw->dev, "error: set device formats failed\n");
1607 EXPORT_SYMBOL_GPL(sst_hsw_device_set_config);
1610 int sst_hsw_dx_set_state(struct sst_hsw *hsw,
1611 enum sst_hsw_dx_state state, struct sst_hsw_ipc_dx_reply *dx)
1616 header = IPC_GLB_TYPE(IPC_GLB_ENTER_DX_STATE);
1619 trace_ipc_request("PM enter Dx state", state);
1621 ret = ipc_tx_message_wait(hsw, header, &state_, sizeof(state_),
1624 dev_err(hsw->dev, "ipc: error set dx state %d failed\n", state);
1628 dev_dbg(hsw->dev, "ipc: got %d entry numbers for state %d\n",
1629 dx->entries_no, state);
1631 memcpy(&hsw->dx, dx, sizeof(*dx));
1635 /* Used to save state into hsw->dx_reply */
1636 int sst_hsw_dx_get_state(struct sst_hsw *hsw, u32 item,
1637 u32 *offset, u32 *size, u32 *source)
1639 struct sst_hsw_ipc_dx_memory_item *dx_mem;
1640 struct sst_hsw_ipc_dx_reply *dx_reply;
1643 dx_reply = &hsw->dx;
1644 entry_no = dx_reply->entries_no;
1646 trace_ipc_request("PM get Dx state", entry_no);
1648 if (item >= entry_no)
1651 dx_mem = &dx_reply->mem_info[item];
1652 *offset = dx_mem->offset;
1653 *size = dx_mem->size;
1654 *source = dx_mem->source;
1659 static int msg_empty_list_init(struct sst_hsw *hsw)
1663 hsw->msg = kzalloc(sizeof(struct ipc_message) *
1664 IPC_EMPTY_LIST_SIZE, GFP_KERNEL);
1665 if (hsw->msg == NULL)
1668 for (i = 0; i < IPC_EMPTY_LIST_SIZE; i++) {
1669 init_waitqueue_head(&hsw->msg[i].waitq);
1670 list_add(&hsw->msg[i].list, &hsw->empty_list);
1676 void sst_hsw_set_scratch_module(struct sst_hsw *hsw,
1677 struct sst_module *scratch)
1679 hsw->scratch = scratch;
1682 struct sst_dsp *sst_hsw_get_dsp(struct sst_hsw *hsw)
1687 static struct sst_dsp_device hsw_dev = {
1688 .thread = hsw_irq_thread,
1689 .ops = &haswell_ops,
1692 int sst_hsw_dsp_init(struct device *dev, struct sst_pdata *pdata)
1694 struct sst_hsw_ipc_fw_version version;
1695 struct sst_hsw *hsw;
1696 struct sst_fw *hsw_sst_fw;
1699 dev_dbg(dev, "initialising Audio DSP IPC\n");
1701 hsw = devm_kzalloc(dev, sizeof(*hsw), GFP_KERNEL);
1706 INIT_LIST_HEAD(&hsw->stream_list);
1707 INIT_LIST_HEAD(&hsw->tx_list);
1708 INIT_LIST_HEAD(&hsw->rx_list);
1709 INIT_LIST_HEAD(&hsw->empty_list);
1710 init_waitqueue_head(&hsw->boot_wait);
1711 init_waitqueue_head(&hsw->wait_txq);
1713 ret = msg_empty_list_init(hsw);
1717 /* start the IPC message thread */
1718 init_kthread_worker(&hsw->kworker);
1719 hsw->tx_thread = kthread_run(kthread_worker_fn,
1721 dev_name(hsw->dev));
1722 if (IS_ERR(hsw->tx_thread)) {
1723 ret = PTR_ERR(hsw->tx_thread);
1724 dev_err(hsw->dev, "error: failed to create message TX task\n");
1727 init_kthread_work(&hsw->kwork, ipc_tx_msgs);
1729 hsw_dev.thread_context = hsw;
1732 hsw->dsp = sst_dsp_new(dev, &hsw_dev, pdata);
1733 if (hsw->dsp == NULL) {
1738 /* keep the DSP in reset state for base FW loading */
1739 sst_dsp_reset(hsw->dsp);
1741 hsw_sst_fw = sst_fw_new(hsw->dsp, pdata->fw, hsw);
1743 if (hsw_sst_fw == NULL) {
1745 dev_err(dev, "error: failed to load firmware\n");
1749 /* wait for DSP boot completion */
1750 sst_dsp_boot(hsw->dsp);
1751 ret = wait_event_timeout(hsw->boot_wait, hsw->boot_complete,
1752 msecs_to_jiffies(IPC_BOOT_MSECS));
1755 dev_err(hsw->dev, "error: ADSP boot timeout\n");
1759 /* get the FW version */
1760 sst_hsw_fw_get_version(hsw, &version);
1761 dev_info(hsw->dev, "FW loaded: type %d - version: %d.%d build %d\n",
1762 version.type, version.major, version.minor, version.build);
1764 /* get the globalmixer */
1765 ret = sst_hsw_mixer_get_info(hsw);
1767 dev_err(hsw->dev, "error: failed to get stream info\n");
1775 sst_dsp_reset(hsw->dsp);
1776 sst_fw_free(hsw_sst_fw);
1778 sst_dsp_free(hsw->dsp);
1783 EXPORT_SYMBOL_GPL(sst_hsw_dsp_init);
1785 void sst_hsw_dsp_free(struct device *dev, struct sst_pdata *pdata)
1787 struct sst_hsw *hsw = pdata->dsp;
1789 sst_dsp_reset(hsw->dsp);
1790 sst_fw_free_all(hsw->dsp);
1791 sst_dsp_free(hsw->dsp);
1792 kfree(hsw->scratch);
1795 EXPORT_SYMBOL_GPL(sst_hsw_dsp_free);