2 * omap-dmic.c -- OMAP ASoC DMIC DAI driver
4 * Copyright (C) 2010 - 2011 Texas Instruments
6 * Author: David Lambert <dlambert@ti.com>
7 * Misael Lopez Cruz <misael.lopez@ti.com>
8 * Liam Girdwood <lrg@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/err.h>
31 #include <linux/clk.h>
33 #include <linux/slab.h>
34 #include <linux/pm_runtime.h>
35 #include <linux/of_device.h>
37 #include <sound/core.h>
38 #include <sound/pcm.h>
39 #include <sound/pcm_params.h>
40 #include <sound/initval.h>
41 #include <sound/soc.h>
44 #include "omap-dmic.h"
48 void __iomem *io_base;
61 * Stream DMA parameters
63 static struct omap_pcm_dma_data omap_dmic_dai_dma_params = {
64 .name = "DMIC capture",
67 static inline void omap_dmic_write(struct omap_dmic *dmic, u16 reg, u32 val)
69 __raw_writel(val, dmic->io_base + reg);
72 static inline int omap_dmic_read(struct omap_dmic *dmic, u16 reg)
74 return __raw_readl(dmic->io_base + reg);
77 static inline void omap_dmic_start(struct omap_dmic *dmic)
79 u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
81 /* Configure DMA controller */
82 omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_SET_REG,
83 OMAP_DMIC_DMA_ENABLE);
85 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl | dmic->ch_enabled);
88 static inline void omap_dmic_stop(struct omap_dmic *dmic)
90 u32 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
91 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
92 ctrl & ~OMAP_DMIC_UP_ENABLE_MASK);
94 /* Disable DMA request generation */
95 omap_dmic_write(dmic, OMAP_DMIC_DMAENABLE_CLR_REG,
96 OMAP_DMIC_DMA_ENABLE);
100 static inline int dmic_is_enabled(struct omap_dmic *dmic)
102 return omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG) &
103 OMAP_DMIC_UP_ENABLE_MASK;
106 static int omap_dmic_dai_startup(struct snd_pcm_substream *substream,
107 struct snd_soc_dai *dai)
109 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
112 mutex_lock(&dmic->mutex);
119 mutex_unlock(&dmic->mutex);
124 static void omap_dmic_dai_shutdown(struct snd_pcm_substream *substream,
125 struct snd_soc_dai *dai)
127 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
129 mutex_lock(&dmic->mutex);
134 mutex_unlock(&dmic->mutex);
137 static int omap_dmic_select_divider(struct omap_dmic *dmic, int sample_rate)
139 int divider = -EINVAL;
142 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
145 if (sample_rate == 192000) {
146 if (dmic->fclk_freq == 19200000 && dmic->out_freq == 3840000)
147 divider = 0x6; /* Divider: 5 (192KHz sampling rate) */
150 "invalid clock configuration for 192KHz\n");
155 switch (dmic->out_freq) {
157 if (dmic->fclk_freq != 24576000)
159 divider = 0x4; /* Divider: 16 */
162 switch (dmic->fclk_freq) {
164 divider = 0x5; /* Divider: 5 */
167 divider = 0x0; /* Divider: 8 */
170 divider = 0x2; /* Divider: 10 */
177 if (dmic->fclk_freq != 24576000)
179 divider = 0x3; /* Divider: 8 */
182 if (dmic->fclk_freq != 19200000)
184 divider = 0x1; /* Divider: 5 (96KHz sampling rate) */
187 dev_err(dmic->dev, "invalid out frequency: %dHz\n",
195 dev_err(dmic->dev, "invalid out frequency %dHz for %dHz input\n",
196 dmic->out_freq, dmic->fclk_freq);
200 static int omap_dmic_dai_hw_params(struct snd_pcm_substream *substream,
201 struct snd_pcm_hw_params *params,
202 struct snd_soc_dai *dai)
204 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
207 dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));
208 if (dmic->clk_div < 0) {
209 dev_err(dmic->dev, "no valid divider for %dHz from %dHz\n",
210 dmic->out_freq, dmic->fclk_freq);
214 dmic->ch_enabled = 0;
215 channels = params_channels(params);
218 dmic->ch_enabled |= OMAP_DMIC_UP3_ENABLE;
220 dmic->ch_enabled |= OMAP_DMIC_UP2_ENABLE;
222 dmic->ch_enabled |= OMAP_DMIC_UP1_ENABLE;
225 dev_err(dmic->dev, "invalid number of legacy channels\n");
229 /* packet size is threshold * channels */
230 omap_dmic_dai_dma_params.packet_size = dmic->threshold * channels;
231 snd_soc_dai_set_dma_data(dai, substream, &omap_dmic_dai_dma_params);
236 static int omap_dmic_dai_prepare(struct snd_pcm_substream *substream,
237 struct snd_soc_dai *dai)
239 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
242 /* Configure uplink threshold */
243 omap_dmic_write(dmic, OMAP_DMIC_FIFO_CTRL_REG, dmic->threshold);
245 ctrl = omap_dmic_read(dmic, OMAP_DMIC_CTRL_REG);
247 /* Set dmic out format */
248 ctrl &= ~(OMAP_DMIC_FORMAT | OMAP_DMIC_POLAR_MASK);
249 ctrl |= (OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
250 OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
252 /* Configure dmic clock divider */
253 ctrl &= ~OMAP_DMIC_CLK_DIV_MASK;
254 ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);
256 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, ctrl);
258 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG,
259 ctrl | OMAP_DMICOUTFORMAT_LJUST | OMAP_DMIC_POLAR1 |
260 OMAP_DMIC_POLAR2 | OMAP_DMIC_POLAR3);
265 static int omap_dmic_dai_trigger(struct snd_pcm_substream *substream,
266 int cmd, struct snd_soc_dai *dai)
268 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
271 case SNDRV_PCM_TRIGGER_START:
272 omap_dmic_start(dmic);
274 case SNDRV_PCM_TRIGGER_STOP:
275 omap_dmic_stop(dmic);
284 static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,
287 struct clk *parent_clk;
288 char *parent_clk_name;
298 dev_err(dmic->dev, "invalid input frequency: %dHz\n", freq);
303 if (dmic->sysclk == clk_id) {
304 dmic->fclk_freq = freq;
308 /* re-parent not allowed if a stream is ongoing */
309 if (dmic->active && dmic_is_enabled(dmic)) {
310 dev_err(dmic->dev, "can't re-parent when DMIC active\n");
315 case OMAP_DMIC_SYSCLK_PAD_CLKS:
316 parent_clk_name = "pad_clks_ck";
318 case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS:
319 parent_clk_name = "slimbus_clk";
321 case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS:
322 parent_clk_name = "dmic_sync_mux_ck";
325 dev_err(dmic->dev, "fclk clk_id (%d) not supported\n", clk_id);
329 parent_clk = clk_get(dmic->dev, parent_clk_name);
330 if (IS_ERR(parent_clk)) {
331 dev_err(dmic->dev, "can't get %s\n", parent_clk_name);
335 mutex_lock(&dmic->mutex);
337 /* disable clock while reparenting */
338 pm_runtime_put_sync(dmic->dev);
339 ret = clk_set_parent(dmic->fclk, parent_clk);
340 pm_runtime_get_sync(dmic->dev);
342 ret = clk_set_parent(dmic->fclk, parent_clk);
344 mutex_unlock(&dmic->mutex);
347 dev_err(dmic->dev, "re-parent failed\n");
351 dmic->sysclk = clk_id;
352 dmic->fclk_freq = freq;
360 static int omap_dmic_select_outclk(struct omap_dmic *dmic, int clk_id,
365 if (clk_id != OMAP_DMIC_ABE_DMIC_CLK) {
366 dev_err(dmic->dev, "output clk_id (%d) not supported\n",
376 dmic->out_freq = freq;
379 dev_err(dmic->dev, "invalid out frequency: %dHz\n", freq);
387 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
388 unsigned int freq, int dir)
390 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
392 if (dir == SND_SOC_CLOCK_IN)
393 return omap_dmic_select_fclk(dmic, clk_id, freq);
394 else if (dir == SND_SOC_CLOCK_OUT)
395 return omap_dmic_select_outclk(dmic, clk_id, freq);
397 dev_err(dmic->dev, "invalid clock direction (%d)\n", dir);
401 static const struct snd_soc_dai_ops omap_dmic_dai_ops = {
402 .startup = omap_dmic_dai_startup,
403 .shutdown = omap_dmic_dai_shutdown,
404 .hw_params = omap_dmic_dai_hw_params,
405 .prepare = omap_dmic_dai_prepare,
406 .trigger = omap_dmic_dai_trigger,
407 .set_sysclk = omap_dmic_set_dai_sysclk,
410 static int omap_dmic_probe(struct snd_soc_dai *dai)
412 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
414 pm_runtime_enable(dmic->dev);
416 /* Disable lines while request is ongoing */
417 pm_runtime_get_sync(dmic->dev);
418 omap_dmic_write(dmic, OMAP_DMIC_CTRL_REG, 0x00);
419 pm_runtime_put_sync(dmic->dev);
421 /* Configure DMIC threshold value */
422 dmic->threshold = OMAP_DMIC_THRES_MAX - 3;
426 static int omap_dmic_remove(struct snd_soc_dai *dai)
428 struct omap_dmic *dmic = snd_soc_dai_get_drvdata(dai);
430 pm_runtime_disable(dmic->dev);
435 static struct snd_soc_dai_driver omap_dmic_dai = {
437 .probe = omap_dmic_probe,
438 .remove = omap_dmic_remove,
442 .rates = SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000,
443 .formats = SNDRV_PCM_FMTBIT_S32_LE,
446 .ops = &omap_dmic_dai_ops,
449 static __devinit int asoc_dmic_probe(struct platform_device *pdev)
451 struct omap_dmic *dmic;
452 struct resource *res;
455 dmic = devm_kzalloc(&pdev->dev, sizeof(struct omap_dmic), GFP_KERNEL);
459 platform_set_drvdata(pdev, dmic);
460 dmic->dev = &pdev->dev;
461 dmic->sysclk = OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS;
463 mutex_init(&dmic->mutex);
465 dmic->fclk = clk_get(dmic->dev, "dmic_fck");
466 if (IS_ERR(dmic->fclk)) {
467 dev_err(dmic->dev, "cant get dmic_fck\n");
471 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
473 dev_err(dmic->dev, "invalid dma memory resource\n");
477 omap_dmic_dai_dma_params.port_addr = res->start + OMAP_DMIC_DATA_REG;
479 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
481 dev_err(dmic->dev, "invalid dma resource\n");
485 omap_dmic_dai_dma_params.dma_req = res->start;
487 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
489 dev_err(dmic->dev, "invalid memory resource\n");
494 if (!devm_request_mem_region(&pdev->dev, res->start,
495 resource_size(res), pdev->name)) {
496 dev_err(dmic->dev, "memory region already claimed\n");
501 dmic->io_base = devm_ioremap(&pdev->dev, res->start,
503 if (!dmic->io_base) {
508 ret = snd_soc_register_dai(&pdev->dev, &omap_dmic_dai);
519 static int __devexit asoc_dmic_remove(struct platform_device *pdev)
521 struct omap_dmic *dmic = platform_get_drvdata(pdev);
523 snd_soc_unregister_dai(&pdev->dev);
529 static const struct of_device_id omap_dmic_of_match[] = {
530 { .compatible = "ti,omap4-dmic", },
533 MODULE_DEVICE_TABLE(of, omap_dmic_of_match);
535 static struct platform_driver asoc_dmic_driver = {
538 .owner = THIS_MODULE,
539 .of_match_table = omap_dmic_of_match,
541 .probe = asoc_dmic_probe,
542 .remove = __devexit_p(asoc_dmic_remove),
545 module_platform_driver(asoc_dmic_driver);
547 MODULE_ALIAS("platform:omap-dmic");
548 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
549 MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
550 MODULE_LICENSE("GPL");