2 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
4 * Copyright (C) 2009 - 2011 Texas Instruments
6 * Author: Misael Lopez Cruz <misael.lopez@ti.com>
7 * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
8 * Margarita Olaya <magi.olaya@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/interrupt.h>
31 #include <linux/err.h>
33 #include <linux/irq.h>
34 #include <linux/slab.h>
35 #include <linux/pm_runtime.h>
36 #include <linux/of_device.h>
38 #include <sound/core.h>
39 #include <sound/pcm.h>
40 #include <sound/pcm_params.h>
41 #include <sound/soc.h>
43 #include <plat/omap_hwmod.h>
44 #include "omap-mcpdm.h"
49 unsigned long phys_base;
50 void __iomem *io_base;
59 /* McPDM FIFO thresholds */
63 /* McPDM dn offsets for rx1, and 2 channels */
68 * Stream DMA parameters
70 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
72 .name = "Audio playback",
75 .name = "Audio capture",
79 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
81 __raw_writel(val, mcpdm->io_base + reg);
84 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
86 return __raw_readl(mcpdm->io_base + reg);
90 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
92 dev_dbg(mcpdm->dev, "***********************\n");
93 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
94 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
95 dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
96 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
97 dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
98 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
99 dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
100 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
101 dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
102 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
103 dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
104 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
105 dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
106 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
107 dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
108 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
109 dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
110 omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
111 dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
112 omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
113 dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
114 omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
115 dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
116 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
117 dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
118 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
119 dev_dbg(mcpdm->dev, "***********************\n");
122 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
126 * Enables the transfer through the PDM interface to/from the Phoenix
127 * codec by enabling the corresponding UP or DN channels.
129 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
131 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
133 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
134 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
136 ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
137 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
139 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
140 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
144 * Disables the transfer through the PDM interface to/from the Phoenix
145 * codec by disabling the corresponding UP or DN channels.
147 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
149 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
151 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
152 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
154 ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
155 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
157 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
158 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
163 * Is the physical McPDM interface active.
165 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
167 return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
168 (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
172 * Configures McPDM uplink, and downlink for audio.
173 * This function should be called before omap_mcpdm_start.
175 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
177 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
178 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
179 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
181 /* Enable DN RX1/2 offset cancellation feature, if configured */
182 if (mcpdm->dn_rx_offset) {
183 u32 dn_offset = mcpdm->dn_rx_offset;
185 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
186 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
187 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
190 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
191 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
193 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
194 MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
198 * Cleans McPDM uplink, and downlink configuration.
199 * This function should be called when the stream is closed.
201 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
203 /* Disable irq request generation for downlink */
204 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
205 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
207 /* Disable DMA request generation for downlink */
208 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
210 /* Disable irq request generation for uplink */
211 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
212 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
214 /* Disable DMA request generation for uplink */
215 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
217 /* Disable RX1/2 offset cancellation */
218 if (mcpdm->dn_rx_offset)
219 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
222 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
224 struct omap_mcpdm *mcpdm = dev_id;
227 irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
229 /* Acknowledge irq event */
230 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
232 if (irq_status & MCPDM_DN_IRQ_FULL)
233 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
235 if (irq_status & MCPDM_DN_IRQ_EMPTY)
236 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
238 if (irq_status & MCPDM_DN_IRQ)
239 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
241 if (irq_status & MCPDM_UP_IRQ_FULL)
242 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
244 if (irq_status & MCPDM_UP_IRQ_EMPTY)
245 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
247 if (irq_status & MCPDM_UP_IRQ)
248 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
253 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
254 struct snd_soc_dai *dai)
256 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
258 mutex_lock(&mcpdm->mutex);
261 /* Enable watch dog for ES above ES 1.0 to avoid saturation */
262 if (omap_rev() != OMAP4430_REV_ES1_0) {
263 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
265 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
268 omap_mcpdm_open_streams(mcpdm);
271 mutex_unlock(&mcpdm->mutex);
276 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
277 struct snd_soc_dai *dai)
279 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
281 mutex_lock(&mcpdm->mutex);
284 if (omap_mcpdm_active(mcpdm)) {
285 omap_mcpdm_stop(mcpdm);
286 omap_mcpdm_close_streams(mcpdm);
290 mutex_unlock(&mcpdm->mutex);
293 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
294 struct snd_pcm_hw_params *params,
295 struct snd_soc_dai *dai)
297 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
298 int stream = substream->stream;
299 struct omap_pcm_dma_data *dma_data;
303 channels = params_channels(params);
306 if (stream == SNDRV_PCM_STREAM_CAPTURE)
307 /* up to 3 channels for capture */
311 if (stream == SNDRV_PCM_STREAM_CAPTURE)
312 /* up to 3 channels for capture */
323 /* unsupported number of channels */
327 dma_data = &omap_mcpdm_dai_dma_params[stream];
329 /* Configure McPDM channels, and DMA packet size */
330 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
331 mcpdm->dn_channels = link_mask << 3;
332 dma_data->packet_size =
333 (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
335 mcpdm->up_channels = link_mask << 0;
336 dma_data->packet_size = mcpdm->up_threshold * channels;
339 snd_soc_dai_set_dma_data(dai, substream, dma_data);
344 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
345 struct snd_soc_dai *dai)
347 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
349 if (!omap_mcpdm_active(mcpdm)) {
350 omap_mcpdm_start(mcpdm);
351 omap_mcpdm_reg_dump(mcpdm);
357 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
358 .startup = omap_mcpdm_dai_startup,
359 .shutdown = omap_mcpdm_dai_shutdown,
360 .hw_params = omap_mcpdm_dai_hw_params,
361 .prepare = omap_mcpdm_prepare,
364 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
366 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
369 pm_runtime_enable(mcpdm->dev);
371 /* Disable lines while request is ongoing */
372 pm_runtime_get_sync(mcpdm->dev);
373 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
375 ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
376 0, "McPDM", (void *)mcpdm);
378 pm_runtime_put_sync(mcpdm->dev);
381 dev_err(mcpdm->dev, "Request for IRQ failed\n");
382 pm_runtime_disable(mcpdm->dev);
385 /* Configure McPDM threshold values */
386 mcpdm->dn_threshold = 2;
387 mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
391 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
393 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
395 free_irq(mcpdm->irq, (void *)mcpdm);
396 pm_runtime_disable(mcpdm->dev);
401 #define OMAP_MCPDM_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
402 #define OMAP_MCPDM_FORMATS SNDRV_PCM_FMTBIT_S32_LE
404 static struct snd_soc_dai_driver omap_mcpdm_dai = {
405 .probe = omap_mcpdm_probe,
406 .remove = omap_mcpdm_remove,
407 .probe_order = SND_SOC_COMP_ORDER_LATE,
408 .remove_order = SND_SOC_COMP_ORDER_EARLY,
412 .rates = OMAP_MCPDM_RATES,
413 .formats = OMAP_MCPDM_FORMATS,
419 .rates = OMAP_MCPDM_RATES,
420 .formats = OMAP_MCPDM_FORMATS,
423 .ops = &omap_mcpdm_dai_ops,
426 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
429 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
431 mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
433 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
435 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
437 struct omap_mcpdm *mcpdm;
438 struct resource *res;
440 mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
444 platform_set_drvdata(pdev, mcpdm);
446 mutex_init(&mcpdm->mutex);
448 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
452 omap_mcpdm_dai_dma_params[0].port_addr = res->start + MCPDM_REG_DN_DATA;
453 omap_mcpdm_dai_dma_params[1].port_addr = res->start + MCPDM_REG_UP_DATA;
455 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
459 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "dn_link");
463 omap_mcpdm_dai_dma_params[0].dma_req = res->start;
465 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "up_link");
469 omap_mcpdm_dai_dma_params[1].dma_req = res->start;
471 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
475 if (!devm_request_mem_region(&pdev->dev, res->start,
476 resource_size(res), "McPDM"))
479 mcpdm->io_base = devm_ioremap(&pdev->dev, res->start,
484 mcpdm->irq = platform_get_irq(pdev, 0);
488 mcpdm->dev = &pdev->dev;
490 return snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
493 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
495 snd_soc_unregister_dai(&pdev->dev);
499 static const struct of_device_id omap_mcpdm_of_match[] = {
500 { .compatible = "ti,omap4-mcpdm", },
503 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
505 static struct platform_driver asoc_mcpdm_driver = {
507 .name = "omap-mcpdm",
508 .owner = THIS_MODULE,
509 .of_match_table = omap_mcpdm_of_match,
512 .probe = asoc_mcpdm_probe,
513 .remove = __devexit_p(asoc_mcpdm_remove),
516 module_platform_driver(asoc_mcpdm_driver);
518 MODULE_ALIAS("platform:omap-mcpdm");
519 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
520 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
521 MODULE_LICENSE("GPL");