2 * rockchip-iis.h - ALSA IIS interface for the Rockchip rk28 SoC
4 * Driver for rockchip iis audio
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/version.h>
12 #ifndef _ROCKCHIP_IIS_H
13 #define _ROCKCHIP_IIS_H
17 #define PCM_2DATA (0<<18)
18 #define PCM_4DATA (1<<18)
19 #define PCM_6DATA (2<<18)
20 #define PCM_8DATA (3<<18)
22 #define CHANNEL_1_EN (0<<15)
23 #define CHANNEL_2_EN (1<<15)
24 #define CHANNEL_3_EN (2<<15)
25 #define CHANNLE_4_EN (3<<15)
26 #define TX_MODE_MASTER (0<<13)
27 #define TX_MODE_SLAVE (1<<13)
28 #define RESET_TX (1<<17)
29 #define RESET_RX (1<<16)
30 #define I2S_DMA_REQ1_DISABLE (1<<6)
31 #define I2S_DMA_REQ1_ENABLE (0)
32 #define I2S_DMA_REQ2_DISABLE (1<<5)
33 #define I2S_DMA_REQ2_ENABLE (0)
34 #define I2S_DMA_REQ1_TX_ENABLE (0)
35 #define I2S_DMA_REQ1_RX_ENABLE (1<<4)
36 #define I2S_DMA_REQ2_TX_ENABLE (0)
37 #define I2S_DMA_REQ2_RX_ENABLE (1<<3)
38 #define TX_START (1<<1)
44 #define CLEAR_RXFIFO (1<<24)
45 #define TRAN_DEVICES0 (0)
46 #define TRAN_DEVICES1 (1<<18)
47 #define TRAN_DEVICES2 (2<<18)
48 #define TRAN_DEVICES3 (3<<18)
49 #define OVERSAMPLING_RATE_32FS (0)
50 #define OVERSAMPLING_RATE_64FS (1<<16)
51 #define OVERSAMPLING_RATE_128FS (2<<16)
52 #define SCK_RATE2 (0x02<<8)
53 #define SCK_RATE4 (0x04<<8)
54 #define SCK_RATE8 (0x08<<8)
55 #define SAMPLE_DATA_8bit (0)
56 #define SAMPLE_DATA_16bit (1<<4)
57 #define SAMPLE_DATA_MASK (3<<4)
58 #define MONO_MODE (1<<3)
59 #define STEREO_MODE (0)
61 #define LEFT_JUSTIFIED (1<<1)
62 #define RIGHT_JUSTIFIED (2<<1)
63 #define IISMOD_SDF_MASK (3<<1)
64 #define MASTER_MODE (1)
65 #define SLAVE_MODE (0)
68 #define TX_HALF_FULL (1<<18)
69 #define RX_HALF_FULL (1<<16)
72 #define ROCKCHIP_DIV_MCLK 0
73 #define ROCKCHIP_DIV_BCLK 1
74 #define ROCKCHIP_DIV_PRESCALER 2
78 #define I2S_RSTL_SCLK(c) ((c&0x3F)<<26)
79 #define I2S_RSTR_SCLK(c) ((c&0x3F)<<20)
81 #define I2S_PCM_2DATA (0<<18)
82 #define I2S_PCM_4DATA (1<<18)
83 #define I2S_PCM_6DATA (2<<18)
84 #define I2S_PCM_8DATA (3<<18)
85 #define I2S_PCM_DATA_MASK (3<<18)
87 #define I2S_CSR_CH2 (0<<15)
88 #define I2S_CSR_CH4 (1<<15)
89 #define I2S_CRS_CH6 (2<<15)
90 #define I2S_CRS_CH8 (3<<15)
91 #define I2S_CRS_CH_MASK (3<<15)
93 #define I2S_HWT_16BIT (0<<14)
94 #define I2S_HWT_32BIT (1<<14)
96 #ifdef CONFIG_ARCH_RK29
97 #define I2S_MASTER_MODE (0<<13)
98 #define I2S_SLAVE_MODE (1<<13)
99 #define I2S_MODE_MASK (1<<13)
102 #define I2S_JUSTIFIED_RIGHT (0<<12)
103 #define I2S_JUSTIFIED_LEFT (1<<12)
105 #define I2S_FIRST_BIT_MSB (0<<11)
106 #define I2S_FIRST_BIT_LSB (1<<11)
108 #define I2S_BUS_MODE_NOR (0<<9)
109 #define I2S_BUS_MODE_LSJM (1<<9)
110 #define I2S_BUS_MODE_RSJM (2<<9)
111 #define I2S_BUS_MODE_MASK (3<<9)
113 #define I2S_PCM_NO_DELAY (0<<7)
114 #define I2S_PCM_DELAY_1MODE (1<<7)
115 #define I2S_PCM_DELAY_2MODE (2<<7)
116 #define I2S_PCM_DELAY_3MODE (3<<7)
117 #define I2S_PCM_DELAY_MASK (3<<7)
119 #define I2S_TX_LRCK_OUT_BT_DISABLE (0<<6)
120 #define I2S_TX_LRCK_OUT_BT_ENABLE (1<<6)
122 #define I2S_TX_LRCK_OUT_I2S (0<<5)
123 #define I2S_TX_LRCK_OUT_PCM (1<<5)
125 #define I2S_DATA_WIDTH(w) ((w&0x1F)<<0)
131 #ifdef CONFIG_ARCH_RK29
132 #define I2S_TSP_POSEDGE (0<<25)
133 #define I2S_TSP_NEGEDGE (1<<25)
134 #define I2S_TLP_NORMAL (0<<24)
135 #define I2S_TLP_OPPSITE (1<<24)
137 #define I2S_MCLK_DIV(x) ((0xFF&x)<<16)
138 #define I2S_MCLK_DIV_MASK ((0xFF)<<16)
140 #define I2S_TSD_FIXED (0<<12)
141 #define I2S_TSD_CHANGED (1<<12)
143 #define I2S_TX_LRCK_NO_DELAY (0<<10)
144 #define I2S_TX_LRCK_DELAY_ONE (1<<10)
145 #define I2S_TX_LRCK_DELAY_TWO (2<<10)
146 #define I2S_TX_LRCK_DELAY_THREE (3<<10)
147 #define I2S_TX_LRCK_DELAY_MASK (3<<10)
149 #define I2S_TX_SCLK_DIV(x) (x&0x3FF)
150 #define I2S_TX_SCLK_DIV_MASK (0x3FF);
153 #define I2S_MASTER_MODE (0<<27)
154 #define I2S_SLAVE_MODE (1<<27)
155 #define I2S_MODE_MASK (1<<27)
157 #define I2S_BCLK_POSEDGE (0<<26)//sclk polarity invert??
158 #define I2S_BCLK_NEGEDGE (1<<26)
160 #define I2S_RX_LRCK_POSEDGE (0<<25)//LRCK polarity invert??
161 #define I2S_RX_LRCK_NEGEDGE (1<<25)
163 #define I2S_TX_LRCK_POSEDGE (0<<24)
164 #define I2S_TX_LRCK_NEGEDGE (1<<24)
166 #define I2S_MCLK_DIV(x) ((0xFF&x)<<16)
167 #define I2S_MCLK_DIV_MASK ((0xFF)<<16)
169 #define I2S_RX_SCLK_DIV(x) ((x&0xFF)<<8)
170 #define I2S_RX_SCLK_DIV_MASK ((0xFF)<<8)
172 #define I2S_TX_SCLK_DIV(x) (x&0xFF)
173 #define I2S_TX_SCLK_DIV_MASK (0xFF)
177 #define I2S_RECE_DMA_DISABLE (0<<24)
178 #define I2S_RECE_DMA_ENABLE (1<<24)
179 #define I2S_DMARDL(x) ((x&0x1f)<<16)
181 #define I2S_TRAN_DMA_DISABLE (0<<8)
182 #define I2S_TRAN_DMA_ENABLE (1<<8)
183 #define I2S_DMATDL(x) ((x&0x1f)<<0)
186 #define I2S_RXOV_INT_DISABLE (0<<17)
187 #define I2S_RXOV_INT_ENABLE (1<<17)
188 #define I2S_RXFU_INT_DISABLE (0<<16)
189 #define I2S_RXFU_INT_ENABLE (1<<16)
191 #define I2S_TXUND_INT_DISABLE (0<<1)
192 #define I2S_TXUND_INT_ENABLE (1<<1)
193 #define I2S_TXEMP_INT_DISABLE (0<<0)
194 #define I2S_TXEMP_INT_ENABLE (1<<0)
197 #define I2S_RX_TRAN_STOP (0<<1)
198 #define I2S_RX_TRAN_START (1<<1)
199 #define I2S_TX_TRAN_STOP (0<<0)
200 #define I2S_TX_TRAN_START (1<<0)
203 #define I2S_RX_CLEAR (1<<1)
204 #define I2S_TX_CLEAR 1
207 #ifdef CONFIG_ARCH_RK29
208 #define I2S_TXR_BUFF 0x20
209 #define I2S_RXR_BUFF 0x24
211 typedef volatile struct tagIIS_STRUCT
213 unsigned int I2S_TXCR;
214 unsigned int I2S_RXCR;
215 unsigned int I2S_TXCKR;
216 unsigned int I2S_RXCKR;
217 unsigned int I2S_FIFOLR;
218 unsigned int I2S_DMACR;
219 unsigned int I2S_INTCR;
220 unsigned int I2S_INTSR;
221 unsigned int I2S_TXDR;
222 unsigned int I2S_RXDR;
223 unsigned int I2S_XFER;
224 unsigned int I2S_TXRST;
225 unsigned int I2S_RXRST;
228 #define I2S_TXR_BUFF 0x24
229 #define I2S_RXR_BUFF 0x28
230 typedef volatile struct tagIIS_STRUCT
232 unsigned int I2S_TXCR;//0xF 0
233 unsigned int I2S_RXCR;//0xF 4
234 unsigned int I2S_CKR;//0x3F 8
235 unsigned int I2S_FIFOLR;//c
236 unsigned int I2S_DMACR;//0x001F0110 10
237 unsigned int I2S_INTCR;//0x01F00000 14
238 unsigned int I2S_INTSR;//0x00 18
239 unsigned int I2S_XFER;//0x00000003 1c
240 unsigned int I2S_CLR;//20
241 unsigned int I2S_TXDR;//24
242 unsigned int I2S_RXDR;
246 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37))
247 extern struct snd_soc_dai_driver rk29_i2s_dai[];
249 extern struct snd_soc_dai rk29_i2s_dai[];
252 #ifdef CONFIG_SND_SOC_RT5631
253 extern struct delayed_work rt5631_delay_cap; //bard 7-16
256 #endif /* _ROCKCHIP_IIS_H */