Merge tag 'lsk-android-14.02' into develop-3.10
[firefly-linux-kernel-4.4.55.git] / sound / soc / rockchip / rk_rt3261.c
1 /*
2  * rk29_rt3261.c  --  SoC audio for rockchip
3  *
4  * Driver for rockchip rt3261 audio
5  *
6  *  This program is free software; you can redistribute  it and/or modify it
7  *  under  the terms of  the GNU General  Public License as published by the
8  *  Free Software Foundation;  either version 2 of the  License, or (at your
9  *  option) any later version.
10  *
11  *
12  */
13
14 #include <linux/module.h>
15 #include <linux/device.h>
16 #include <sound/core.h>
17 #include <sound/pcm.h>
18 #include <sound/soc.h>
19 #include <sound/soc-dapm.h>
20 #include <asm/io.h>
21 #include <linux/of.h>
22 #include <linux/of_gpio.h>
23
24 #include "../codecs/rt3261.h"
25 #include "card_info.h"
26 #include "rk_pcm.h"
27 #include "rk_i2s.h"
28
29 #if 0
30 #define DBG(x...)       printk(KERN_INFO x)
31 #else
32 #define DBG(x...)
33 #endif
34
35 static int rockchip_rt3261_hifi_hw_params(struct snd_pcm_substream *substream,
36         struct snd_pcm_hw_params *params)
37 {
38         struct snd_soc_pcm_runtime *rtd = substream->private_data;
39         struct snd_soc_dai *codec_dai = rtd->codec_dai;
40         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
41         unsigned int pll_out = 0, dai_fmt = rtd->dai_link->dai_fmt;
42         int ret;
43
44         DBG("Enter::%s----%d\n", __FUNCTION__, __LINE__);
45
46         /* set codec DAI configuration */
47         ret = snd_soc_dai_set_fmt(codec_dai, dai_fmt);
48         if (ret < 0) {
49                 printk("%s():failed to set the format for codec side\n", __FUNCTION__);
50                 return ret;
51         }
52
53         /* set cpu DAI configuration */
54         ret = snd_soc_dai_set_fmt(cpu_dai, dai_fmt);
55         if (ret < 0) {
56                 printk("%s():failed to set the format for cpu side\n", __FUNCTION__);
57                 return ret;
58         }
59
60         switch(params_rate(params)) {
61                 case 8000:
62                 case 16000:
63                 case 24000:
64                 case 32000:
65                 case 48000:
66                         pll_out = 12288000;
67                         break;
68                 case 11025:
69                 case 22050:
70                 case 44100:
71                         pll_out = 11289600;
72                         break;
73                 default:
74                         DBG("Enter:%s, %d, Error rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
75                         return -EINVAL;
76                         break;
77         }
78
79         DBG("Enter:%s, %d, rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
80
81         /*Set the system clk for codec*/
82         snd_soc_dai_set_pll(codec_dai, 0, RT3261_PLL1_S_MCLK, pll_out, pll_out*2); //bard 8-29
83         ret = snd_soc_dai_set_sysclk(codec_dai, RT3261_SCLK_S_PLL1, pll_out*2, SND_SOC_CLOCK_IN); //bard 8-29
84         if (ret < 0)
85         {
86                 DBG("rk29_hw_params_rt3261:failed to set the sysclk for codec side\n"); 
87                 return ret;
88         }
89
90         snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);
91         snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, (pll_out/4)/params_rate(params)-1);
92         snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);// 256k = 48-1  3M=3
93
94         DBG("Enter:%s, %d, pll_out/4/params_rate(params) = %d \n", __FUNCTION__, __LINE__, (pll_out/4)/params_rate(params));
95  
96         return 0;
97 }
98
99 static int rockchip_rt3261_voice_hw_params(struct snd_pcm_substream *substream,
100         struct snd_pcm_hw_params *params)
101 {
102         struct snd_soc_pcm_runtime *rtd = substream->private_data;
103         struct snd_soc_dai *codec_dai = rtd->codec_dai;
104         struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
105         unsigned int pll_out = 0, dai_fmt = rtd->dai_link->dai_fmt;
106         int ret;
107
108         DBG("Enter::%s----%d\n", __FUNCTION__, __LINE__);
109
110         /* set codec DAI configuration */
111         ret = snd_soc_dai_set_fmt(codec_dai, dai_fmt);
112         if (ret < 0) {
113                 printk("%s():failed to set the format for codec side\n", __FUNCTION__);
114                 return ret;
115         }
116
117         switch(params_rate(params)) {
118                 case 8000:
119                 case 16000:
120                 case 24000:
121                 case 32000:
122                 case 48000:
123                         pll_out = 12288000;
124                         break;
125                 case 11025:
126                 case 22050:
127                 case 44100:
128                         pll_out = 11289600;
129                         break;
130                 default:
131                         DBG("Enter:%s, %d, Error rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
132                         return -EINVAL;
133                         break;
134         }
135
136         DBG("Enter:%s, %d, rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
137
138         /*Set the system clk for codec*/
139         snd_soc_dai_set_pll(codec_dai, 0, RT3261_PLL1_S_MCLK, pll_out, pll_out*2); //bard 8-29
140         ret = snd_soc_dai_set_sysclk(codec_dai, RT3261_SCLK_S_PLL1, pll_out*2, SND_SOC_CLOCK_IN); //bard 8-29
141
142
143         if (ret < 0) {
144                 printk("rk29_hw_params_rt3261:failed to set the sysclk for codec side\n"); 
145                 return ret;
146         }
147
148         snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);
149         //snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, (pll_out/4)/params_rate(params)-1);
150         //snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);
151
152         DBG("Enter:%s, %d, pll_out/4/params_rate(params) = %d \n", __FUNCTION__, __LINE__, (pll_out/4)/params_rate(params));
153  
154         return 0;
155 }
156
157 static const struct snd_soc_dapm_widget rockchip_rt3261_dapm_widgets[] = {
158         SND_SOC_DAPM_MIC("Mic Jack", NULL),
159         SND_SOC_DAPM_MIC("Headset Jack", NULL), 
160         SND_SOC_DAPM_SPK("Ext Spk", NULL),
161         SND_SOC_DAPM_HP("Headphone Jack", NULL),
162 };
163
164 static const struct snd_soc_dapm_route audio_map[]={
165
166         /* Mic Jack --> MIC_IN*/
167         {"micbias1", NULL, "Mic Jack"},
168         {"MIC1", NULL, "micbias1"},
169         
170         // HP MIC
171         {"micbias1", NULL, "Headset Jack"},
172         {"MIC3", NULL, "micbias1"},
173
174         {"Ext Spk", NULL, "SPOLP"},
175         {"Ext Spk", NULL, "SPOLN"},
176         {"Ext Spk", NULL, "SPORP"},
177         {"Ext Spk", NULL, "SPORN"},
178
179         {"Headphone Jack", NULL, "HPOL"},
180         {"Headphone Jack", NULL, "HPOR"},
181 } ;
182
183 static const struct snd_kcontrol_new rockchip_rt3261_controls[] = {
184         SOC_DAPM_PIN_SWITCH("Mic Jack"),
185         SOC_DAPM_PIN_SWITCH("Headset Jack"),
186         SOC_DAPM_PIN_SWITCH("Ext Spk"),
187         SOC_DAPM_PIN_SWITCH("Headphone Jack"),
188 };
189
190 /*
191  * Logic for a rt3261 as connected on a rockchip board.
192  */
193 static int rockchip_rt3261_init(struct snd_soc_pcm_runtime *rtd)
194 {
195         struct snd_soc_codec *codec = rtd->codec;
196         struct snd_soc_dapm_context *dapm = &codec->dapm;
197
198         DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__);
199
200         snd_soc_add_codec_controls(codec, rockchip_rt3261_controls,
201                         ARRAY_SIZE(rockchip_rt3261_controls));
202
203         /* Add specific widgets */
204         snd_soc_dapm_new_controls(dapm, rockchip_rt3261_dapm_widgets,
205                                   ARRAY_SIZE(rockchip_rt3261_dapm_widgets));
206         /* Set up specific audio path audio_mapnects */
207         snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
208
209         snd_soc_dapm_enable_pin(dapm, "Mic Jack");
210         snd_soc_dapm_enable_pin(dapm, "Headset Jack");
211         snd_soc_dapm_enable_pin(dapm, "Ext Spk");
212         snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
213
214         snd_soc_dapm_sync(dapm);
215
216         return 0;
217 }
218
219 static struct snd_soc_ops rockchip_rt3261_hifi_ops = {
220         .hw_params = rockchip_rt3261_hifi_hw_params,
221 };
222
223 static struct snd_soc_ops rockchip_rt3261_voice_ops = {
224         .hw_params = rockchip_rt3261_voice_hw_params,
225 };
226
227 static struct snd_soc_dai_link rockchip_rt3261_dai[] = {
228         {
229                 .name = "RT3261 I2S1",
230                 .stream_name = "RT3261 PCM1",
231                 .codec_dai_name = "rt3261-aif1",
232                 .init = rockchip_rt3261_init,
233                 .ops = &rockchip_rt3261_hifi_ops,
234         },
235         {
236                 .name = "RT3261 I2S2",
237                 .stream_name = "RT3261 PCM2",
238                 .codec_dai_name = "rt3261-aif2",
239                 .ops = &rockchip_rt3261_voice_ops,
240         },
241 };
242
243 static struct snd_soc_card rockchip_rt3261_snd_card = {
244         #if defined (CONFIG_SND_SOC_RT3224)
245         .name = "RK_RT3224",
246         #else
247         .name = "RK_RT3261",
248         #endif
249         .owner = THIS_MODULE,
250         .dai_link = rockchip_rt3261_dai,
251         .num_links = ARRAY_SIZE(rockchip_rt3261_dai),
252 };
253
254 /*
255 dts:
256         rockchip-rt3261 {
257                 compatible = "rockchip-rt3261";
258                 dais {
259                         dai0 {
260                                 audio-codec = <&rt3261>;
261                                 i2s-controller = <&i2s0>;
262                                 format = "i2s";
263                                 //continuous-clock;
264                                 //bitclock-inversion;
265                                 //frame-inversion;
266                                 //bitclock-master;
267                                 //frame-master;
268                         };
269
270                         dai1 {
271                                 audio-codec = <&rt3261>;
272                                 i2s-controller = <&i2s0>;
273                                 format = "dsp_a";
274                                 //continuous-clock;
275                                 bitclock-inversion;
276                                 //frame-inversion;
277                                 //bitclock-master;
278                                 //frame-master;
279                         };
280                 };
281         };
282 */
283 static int rockchip_rt3261_audio_probe(struct platform_device *pdev)
284 {
285         int ret;
286         struct snd_soc_card *card = &rockchip_rt3261_snd_card;
287
288         card->dev = &pdev->dev;
289
290         ret = rockchip_of_get_sound_card_info(card);
291         if (ret) {
292                 printk("%s() get sound card info failed:%d\n", __FUNCTION__, ret);
293                 return ret;
294         }
295
296         ret = snd_soc_register_card(card);
297         if (ret)
298                 printk("%s() register card failed:%d\n", __FUNCTION__, ret);
299
300         return ret;
301 }
302
303 static int rockchip_rt3261_audio_remove(struct platform_device *pdev)
304 {
305         struct snd_soc_card *card = platform_get_drvdata(pdev);
306
307         snd_soc_unregister_card(card);
308
309         return 0;
310 }
311
312 #ifdef CONFIG_OF
313 static const struct of_device_id rockchip_rt3261_of_match[] = {
314         { .compatible = "rockchip-rt3261", },
315         {},
316 };
317 MODULE_DEVICE_TABLE(of, rockchip_rt3261_of_match);
318 #endif /* CONFIG_OF */
319
320 static struct platform_driver rockchip_rt3261_audio_driver = {
321         .driver         = {
322                 .name   = "rockchip-rt3261",
323                 .owner  = THIS_MODULE,
324                 .of_match_table = of_match_ptr(rockchip_rt3261_of_match),
325         },
326         .probe          = rockchip_rt3261_audio_probe,
327         .remove         = rockchip_rt3261_audio_remove,
328 };
329
330 module_platform_driver(rockchip_rt3261_audio_driver);
331
332 /* Module information */
333 MODULE_AUTHOR("rockchip");
334 MODULE_DESCRIPTION("ROCKCHIP i2s ASoC Interface");
335 MODULE_LICENSE("GPL");