2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
22 #include <linux/slab.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/initval.h>
26 #include <sound/soc.h>
27 #include <sound/pcm_params.h>
28 #include <sound/sh_fsi.h>
29 #include <asm/atomic.h>
32 #define DOFF_CTL 0x0004
33 #define DOFF_ST 0x0008
35 #define DIFF_CTL 0x0010
36 #define DIFF_ST 0x0014
41 #define MUTE_ST 0x0028
42 #define REG_END MUTE_ST
45 #define CPU_INT_ST 0x01F4
46 #define CPU_IEMSK 0x01F8
47 #define CPU_IMSK 0x01FC
52 #define CLK_RST 0x0210
53 #define SOFT_RST 0x0214
54 #define FIFO_SZ 0x0218
55 #define MREG_START CPU_INT_ST
56 #define MREG_END FIFO_SZ
60 #define CR_FMT(param) ((param) << 4)
62 # define CR_MONO_D 0x1
70 #define IRQ_HALF 0x00100000
71 #define FIFO_CLR 0x00000001
74 #define ERR_OVER 0x00000010
75 #define ERR_UNDER 0x00000001
76 #define ST_ERR (ERR_OVER | ERR_UNDER)
79 #define B_CLK 0x00000010
80 #define A_CLK 0x00000001
83 #define INT_B_IN (1 << 12)
84 #define INT_B_OUT (1 << 8)
85 #define INT_A_IN (1 << 4)
86 #define INT_A_OUT (1 << 0)
89 #define PBSR (1 << 12) /* Port B Software Reset */
90 #define PASR (1 << 8) /* Port A Software Reset */
91 #define IR (1 << 4) /* Interrupt Reset */
92 #define FSISR (1 << 0) /* Software Reset */
95 #define OUT_SZ_MASK 0x7
99 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
101 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
103 /************************************************************************
109 ************************************************************************/
112 struct snd_pcm_substream *substream;
113 struct fsi_master *master;
133 struct fsi_priv fsia;
134 struct fsi_priv fsib;
135 struct fsi_regs *regs;
136 struct sh_fsi_platform_info *info;
140 /************************************************************************
143 basic read write function
146 ************************************************************************/
147 static void __fsi_reg_write(u32 reg, u32 data)
149 /* valid data area is 24bit */
152 __raw_writel(data, reg);
155 static u32 __fsi_reg_read(u32 reg)
157 return __raw_readl(reg);
160 static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
162 u32 val = __fsi_reg_read(reg);
167 __fsi_reg_write(reg, val);
170 static void fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
175 __fsi_reg_write((u32)(fsi->base + reg), data);
178 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
183 return __fsi_reg_read((u32)(fsi->base + reg));
186 static void fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
191 __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
194 static void fsi_master_write(struct fsi_master *master, u32 reg, u32 data)
198 if ((reg < MREG_START) ||
202 spin_lock_irqsave(&master->lock, flags);
203 __fsi_reg_write((u32)(master->base + reg), data);
204 spin_unlock_irqrestore(&master->lock, flags);
207 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
212 if ((reg < MREG_START) ||
216 spin_lock_irqsave(&master->lock, flags);
217 ret = __fsi_reg_read((u32)(master->base + reg));
218 spin_unlock_irqrestore(&master->lock, flags);
223 static void fsi_master_mask_set(struct fsi_master *master,
224 u32 reg, u32 mask, u32 data)
228 if ((reg < MREG_START) ||
232 spin_lock_irqsave(&master->lock, flags);
233 __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
234 spin_unlock_irqrestore(&master->lock, flags);
237 /************************************************************************
243 ************************************************************************/
244 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
249 static int fsi_is_port_a(struct fsi_priv *fsi)
251 return fsi->master->base == fsi->base;
254 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
256 struct snd_soc_pcm_runtime *rtd = substream->private_data;
257 struct snd_soc_dai_link *machine = rtd->dai;
259 return machine->cpu_dai;
262 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
264 struct snd_soc_dai *dai = fsi_get_dai(substream);
266 return dai->private_data;
269 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
271 int is_porta = fsi_is_port_a(fsi);
272 struct fsi_master *master = fsi_get_master(fsi);
274 return is_porta ? master->info->porta_flags :
275 master->info->portb_flags;
278 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
281 u32 flags = fsi_get_info_flags(fsi);
283 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
290 return (mode & flags) != mode;
293 static u32 fsi_port_ab_io_bit(struct fsi_priv *fsi, int is_play)
295 int is_porta = fsi_is_port_a(fsi);
299 data = is_play ? (1 << 0) : (1 << 4);
301 data = is_play ? (1 << 8) : (1 << 12);
306 static void fsi_stream_push(struct fsi_priv *fsi,
307 struct snd_pcm_substream *substream,
311 fsi->substream = substream;
312 fsi->buffer_len = buffer_len;
313 fsi->period_len = period_len;
314 fsi->byte_offset = 0;
318 static void fsi_stream_pop(struct fsi_priv *fsi)
320 fsi->substream = NULL;
323 fsi->byte_offset = 0;
327 static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play)
330 u32 reg = is_play ? DOFF_ST : DIFF_ST;
333 status = fsi_reg_read(fsi, reg);
334 residue = 0x1ff & (status >> 8);
335 residue *= fsi->chan;
340 /************************************************************************
346 ************************************************************************/
347 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
349 u32 data = fsi_port_ab_io_bit(fsi, is_play);
350 struct fsi_master *master = fsi_get_master(fsi);
352 fsi_master_mask_set(master, master->regs->imsk, data, data);
353 fsi_master_mask_set(master, master->regs->iemsk, data, data);
356 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
358 u32 data = fsi_port_ab_io_bit(fsi, is_play);
359 struct fsi_master *master = fsi_get_master(fsi);
361 fsi_master_mask_set(master, master->regs->imsk, data, 0);
362 fsi_master_mask_set(master, master->regs->iemsk, data, 0);
365 static u32 fsi_irq_get_status(struct fsi_master *master)
367 return fsi_master_read(master, master->regs->int_st);
370 static void fsi_irq_clear_all_status(struct fsi_master *master)
372 fsi_master_write(master, master->regs->int_st, 0x0000000);
375 static void fsi_irq_clear_status(struct fsi_priv *fsi)
378 struct fsi_master *master = fsi_get_master(fsi);
380 data |= fsi_port_ab_io_bit(fsi, 0);
381 data |= fsi_port_ab_io_bit(fsi, 1);
383 /* clear interrupt factor */
384 fsi_master_mask_set(master, master->regs->int_st, data, 0);
387 /************************************************************************
393 ************************************************************************/
394 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
396 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
397 struct fsi_master *master = fsi_get_master(fsi);
400 fsi_master_mask_set(master, CLK_RST, val, val);
402 fsi_master_mask_set(master, CLK_RST, val, 0);
405 static void fsi_fifo_init(struct fsi_priv *fsi,
407 struct snd_soc_dai *dai)
409 struct fsi_master *master = fsi_get_master(fsi);
412 /* get on-chip RAM capacity */
413 shift = fsi_master_read(master, FIFO_SZ);
414 shift >>= fsi_is_port_a(fsi) ? AO_SZ_SHIFT : BO_SZ_SHIFT;
415 shift &= OUT_SZ_MASK;
416 fsi->fifo_max = 256 << shift;
417 dev_dbg(dai->dev, "fifo = %d words\n", fsi->fifo_max);
420 * The maximum number of sample data varies depending
421 * on the number of channels selected for the format.
423 * FIFOs are used in 4-channel units in 3-channel mode
424 * and in 8-channel units in 5- to 7-channel mode
425 * meaning that more FIFOs than the required size of DPRAM
428 * ex) if 256 words of DP-RAM is connected
429 * 1 channel: 256 (256 x 1 = 256)
430 * 2 channels: 128 (128 x 2 = 256)
431 * 3 channels: 64 ( 64 x 3 = 192)
432 * 4 channels: 64 ( 64 x 4 = 256)
433 * 5 channels: 32 ( 32 x 5 = 160)
434 * 6 channels: 32 ( 32 x 6 = 192)
435 * 7 channels: 32 ( 32 x 7 = 224)
436 * 8 channels: 32 ( 32 x 8 = 256)
438 for (i = 1; i < fsi->chan; i <<= 1)
440 dev_dbg(dai->dev, "%d channel %d store\n", fsi->chan, fsi->fifo_max);
442 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
444 /* set interrupt generation factor */
445 fsi_reg_write(fsi, ctrl, IRQ_HALF);
448 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
451 static void fsi_soft_all_reset(struct fsi_master *master)
454 fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
458 fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
459 fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
463 /* playback interrupt */
464 static int fsi_data_push(struct fsi_priv *fsi, int startup)
466 struct snd_pcm_runtime *runtime;
467 struct snd_pcm_substream *substream = NULL;
477 !fsi->substream->runtime)
481 substream = fsi->substream;
482 runtime = substream->runtime;
484 /* FSI FIFO has limit.
485 * So, this driver can not send periods data at a time
487 if (fsi->byte_offset >=
488 fsi->period_len * (fsi->periods + 1)) {
491 fsi->periods = (fsi->periods + 1) % runtime->periods;
493 if (0 == fsi->periods)
494 fsi->byte_offset = 0;
497 /* get 1 channel data width */
498 width = frames_to_bytes(runtime, 1) / fsi->chan;
500 /* get send size for alsa */
501 send = (fsi->buffer_len - fsi->byte_offset) / width;
503 /* get FIFO free size */
504 fifo_free = (fsi->fifo_max * fsi->chan) - fsi_get_fifo_residue(fsi, 1);
507 if (fifo_free < send)
510 start = runtime->dma_area;
511 start += fsi->byte_offset;
515 for (i = 0; i < send; i++)
516 fsi_reg_write(fsi, DODT,
517 ((u32)*((u16 *)start + i) << 8));
520 for (i = 0; i < send; i++)
521 fsi_reg_write(fsi, DODT, *((u32 *)start + i));
527 fsi->byte_offset += send * width;
529 status = fsi_reg_read(fsi, DOFF_ST);
531 struct snd_soc_dai *dai = fsi_get_dai(substream);
533 if (status & ERR_OVER)
534 dev_err(dai->dev, "over run\n");
535 if (status & ERR_UNDER)
536 dev_err(dai->dev, "under run\n");
538 fsi_reg_write(fsi, DOFF_ST, 0);
540 fsi_irq_enable(fsi, 1);
543 snd_pcm_period_elapsed(substream);
548 static int fsi_data_pop(struct fsi_priv *fsi, int startup)
550 struct snd_pcm_runtime *runtime;
551 struct snd_pcm_substream *substream = NULL;
561 !fsi->substream->runtime)
565 substream = fsi->substream;
566 runtime = substream->runtime;
568 /* FSI FIFO has limit.
569 * So, this driver can not send periods data at a time
571 if (fsi->byte_offset >=
572 fsi->period_len * (fsi->periods + 1)) {
575 fsi->periods = (fsi->periods + 1) % runtime->periods;
577 if (0 == fsi->periods)
578 fsi->byte_offset = 0;
581 /* get 1 channel data width */
582 width = frames_to_bytes(runtime, 1) / fsi->chan;
584 /* get free space for alsa */
585 free = (fsi->buffer_len - fsi->byte_offset) / width;
588 fifo_fill = fsi_get_fifo_residue(fsi, 0);
590 if (free < fifo_fill)
593 start = runtime->dma_area;
594 start += fsi->byte_offset;
598 for (i = 0; i < fifo_fill; i++)
599 *((u16 *)start + i) =
600 (u16)(fsi_reg_read(fsi, DIDT) >> 8);
603 for (i = 0; i < fifo_fill; i++)
604 *((u32 *)start + i) = fsi_reg_read(fsi, DIDT);
610 fsi->byte_offset += fifo_fill * width;
612 status = fsi_reg_read(fsi, DIFF_ST);
614 struct snd_soc_dai *dai = fsi_get_dai(substream);
616 if (status & ERR_OVER)
617 dev_err(dai->dev, "over run\n");
618 if (status & ERR_UNDER)
619 dev_err(dai->dev, "under run\n");
621 fsi_reg_write(fsi, DIFF_ST, 0);
623 fsi_irq_enable(fsi, 0);
626 snd_pcm_period_elapsed(substream);
631 static irqreturn_t fsi_interrupt(int irq, void *data)
633 struct fsi_master *master = data;
634 u32 int_st = fsi_irq_get_status(master);
636 /* clear irq status */
637 fsi_master_mask_set(master, SOFT_RST, IR, 0);
638 fsi_master_mask_set(master, SOFT_RST, IR, IR);
640 if (int_st & INT_A_OUT)
641 fsi_data_push(&master->fsia, 0);
642 if (int_st & INT_B_OUT)
643 fsi_data_push(&master->fsib, 0);
644 if (int_st & INT_A_IN)
645 fsi_data_pop(&master->fsia, 0);
646 if (int_st & INT_B_IN)
647 fsi_data_pop(&master->fsib, 0);
649 fsi_irq_clear_all_status(master);
654 /************************************************************************
660 ************************************************************************/
661 static int fsi_dai_startup(struct snd_pcm_substream *substream,
662 struct snd_soc_dai *dai)
664 struct fsi_priv *fsi = fsi_get_priv(substream);
666 u32 flags = fsi_get_info_flags(fsi);
670 int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
674 pm_runtime_get_sync(dai->dev);
677 data = is_play ? (1 << 0) : (1 << 4);
678 is_master = fsi_is_master_mode(fsi, is_play);
680 fsi_reg_mask_set(fsi, CKG1, data, data);
682 fsi_reg_mask_set(fsi, CKG1, data, 0);
684 /* clock inversion (CKG2) */
686 switch (SH_FSI_INVERSION_MASK & flags) {
700 fsi_reg_write(fsi, CKG2, data);
704 reg = is_play ? DO_FMT : DI_FMT;
705 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
707 case SH_FSI_FMT_MONO:
709 data = CR_FMT(CR_MONO);
712 case SH_FSI_FMT_MONO_DELAY:
714 data = CR_FMT(CR_MONO_D);
719 data = CR_FMT(CR_PCM);
724 data = CR_FMT(CR_I2S);
729 data = CR_FMT(CR_TDM) | (fsi->chan - 1);
730 fsi->chan = is_play ?
731 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
733 case SH_FSI_FMT_TDM_DELAY:
735 data = CR_FMT(CR_TDM_D) | (fsi->chan - 1);
736 fsi->chan = is_play ?
737 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
740 dev_err(dai->dev, "unknown format.\n");
743 fsi_reg_write(fsi, reg, data);
746 * clear clk reset if master mode
749 fsi_clk_ctrl(fsi, 1);
752 fsi_irq_disable(fsi, is_play);
753 fsi_irq_clear_status(fsi);
756 fsi_fifo_init(fsi, is_play, dai);
761 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
762 struct snd_soc_dai *dai)
764 struct fsi_priv *fsi = fsi_get_priv(substream);
765 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
767 fsi_irq_disable(fsi, is_play);
768 fsi_clk_ctrl(fsi, 0);
770 pm_runtime_put_sync(dai->dev);
773 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
774 struct snd_soc_dai *dai)
776 struct fsi_priv *fsi = fsi_get_priv(substream);
777 struct snd_pcm_runtime *runtime = substream->runtime;
778 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
782 case SNDRV_PCM_TRIGGER_START:
783 fsi_stream_push(fsi, substream,
784 frames_to_bytes(runtime, runtime->buffer_size),
785 frames_to_bytes(runtime, runtime->period_size));
786 ret = is_play ? fsi_data_push(fsi, 1) : fsi_data_pop(fsi, 1);
788 case SNDRV_PCM_TRIGGER_STOP:
789 fsi_irq_disable(fsi, is_play);
797 static struct snd_soc_dai_ops fsi_dai_ops = {
798 .startup = fsi_dai_startup,
799 .shutdown = fsi_dai_shutdown,
800 .trigger = fsi_dai_trigger,
803 /************************************************************************
809 ************************************************************************/
810 static struct snd_pcm_hardware fsi_pcm_hardware = {
811 .info = SNDRV_PCM_INFO_INTERLEAVED |
812 SNDRV_PCM_INFO_MMAP |
813 SNDRV_PCM_INFO_MMAP_VALID |
814 SNDRV_PCM_INFO_PAUSE,
821 .buffer_bytes_max = 64 * 1024,
822 .period_bytes_min = 32,
823 .period_bytes_max = 8192,
829 static int fsi_pcm_open(struct snd_pcm_substream *substream)
831 struct snd_pcm_runtime *runtime = substream->runtime;
834 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
836 ret = snd_pcm_hw_constraint_integer(runtime,
837 SNDRV_PCM_HW_PARAM_PERIODS);
842 static int fsi_hw_params(struct snd_pcm_substream *substream,
843 struct snd_pcm_hw_params *hw_params)
845 return snd_pcm_lib_malloc_pages(substream,
846 params_buffer_bytes(hw_params));
849 static int fsi_hw_free(struct snd_pcm_substream *substream)
851 return snd_pcm_lib_free_pages(substream);
854 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
856 struct snd_pcm_runtime *runtime = substream->runtime;
857 struct fsi_priv *fsi = fsi_get_priv(substream);
860 location = (fsi->byte_offset - 1);
864 return bytes_to_frames(runtime, location);
867 static struct snd_pcm_ops fsi_pcm_ops = {
868 .open = fsi_pcm_open,
869 .ioctl = snd_pcm_lib_ioctl,
870 .hw_params = fsi_hw_params,
871 .hw_free = fsi_hw_free,
872 .pointer = fsi_pointer,
875 /************************************************************************
881 ************************************************************************/
882 #define PREALLOC_BUFFER (32 * 1024)
883 #define PREALLOC_BUFFER_MAX (32 * 1024)
885 static void fsi_pcm_free(struct snd_pcm *pcm)
887 snd_pcm_lib_preallocate_free_for_all(pcm);
890 static int fsi_pcm_new(struct snd_card *card,
891 struct snd_soc_dai *dai,
895 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
896 * in MMAP mode (i.e. aplay -M)
898 return snd_pcm_lib_preallocate_pages_for_all(
900 SNDRV_DMA_TYPE_CONTINUOUS,
901 snd_dma_continuous_data(GFP_KERNEL),
902 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
905 /************************************************************************
911 ************************************************************************/
912 struct snd_soc_dai fsi_soc_dai[] = {
948 EXPORT_SYMBOL_GPL(fsi_soc_dai);
950 struct snd_soc_platform fsi_soc_platform = {
952 .pcm_ops = &fsi_pcm_ops,
953 .pcm_new = fsi_pcm_new,
954 .pcm_free = fsi_pcm_free,
956 EXPORT_SYMBOL_GPL(fsi_soc_platform);
958 /************************************************************************
964 ************************************************************************/
965 static int fsi_probe(struct platform_device *pdev)
967 struct fsi_master *master;
968 const struct platform_device_id *id_entry;
969 struct resource *res;
974 dev_err(&pdev->dev, "current fsi support id 0 only now\n");
978 id_entry = pdev->id_entry;
980 dev_err(&pdev->dev, "unknown fsi device\n");
984 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
985 irq = platform_get_irq(pdev, 0);
986 if (!res || (int)irq <= 0) {
987 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
992 master = kzalloc(sizeof(*master), GFP_KERNEL);
994 dev_err(&pdev->dev, "Could not allocate master\n");
999 master->base = ioremap_nocache(res->start, resource_size(res));
1000 if (!master->base) {
1002 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1007 master->info = pdev->dev.platform_data;
1008 master->fsia.base = master->base;
1009 master->fsia.master = master;
1010 master->fsib.base = master->base + 0x40;
1011 master->fsib.master = master;
1012 master->regs = (struct fsi_regs *)id_entry->driver_data;
1013 spin_lock_init(&master->lock);
1015 pm_runtime_enable(&pdev->dev);
1016 pm_runtime_resume(&pdev->dev);
1018 fsi_soc_dai[0].dev = &pdev->dev;
1019 fsi_soc_dai[0].private_data = &master->fsia;
1020 fsi_soc_dai[1].dev = &pdev->dev;
1021 fsi_soc_dai[1].private_data = &master->fsib;
1023 fsi_soft_all_reset(master);
1025 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
1026 id_entry->name, master);
1028 dev_err(&pdev->dev, "irq request err\n");
1032 ret = snd_soc_register_platform(&fsi_soc_platform);
1034 dev_err(&pdev->dev, "cannot snd soc register\n");
1038 return snd_soc_register_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1041 free_irq(irq, master);
1043 iounmap(master->base);
1044 pm_runtime_disable(&pdev->dev);
1052 static int fsi_remove(struct platform_device *pdev)
1054 struct fsi_master *master;
1056 master = fsi_get_master(fsi_soc_dai[0].private_data);
1058 snd_soc_unregister_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1059 snd_soc_unregister_platform(&fsi_soc_platform);
1061 pm_runtime_disable(&pdev->dev);
1063 free_irq(master->irq, master);
1065 iounmap(master->base);
1068 fsi_soc_dai[0].dev = NULL;
1069 fsi_soc_dai[0].private_data = NULL;
1070 fsi_soc_dai[1].dev = NULL;
1071 fsi_soc_dai[1].private_data = NULL;
1076 static int fsi_runtime_nop(struct device *dev)
1078 /* Runtime PM callback shared between ->runtime_suspend()
1079 * and ->runtime_resume(). Simply returns success.
1081 * This driver re-initializes all registers after
1082 * pm_runtime_get_sync() anyway so there is no need
1083 * to save and restore registers here.
1088 static struct dev_pm_ops fsi_pm_ops = {
1089 .runtime_suspend = fsi_runtime_nop,
1090 .runtime_resume = fsi_runtime_nop,
1093 static struct fsi_regs fsi_regs = {
1099 static struct fsi_regs fsi2_regs = {
1100 .int_st = CPU_INT_ST,
1105 static struct platform_device_id fsi_id_table[] = {
1106 { "sh_fsi", (kernel_ulong_t)&fsi_regs },
1107 { "sh_fsi2", (kernel_ulong_t)&fsi2_regs },
1110 static struct platform_driver fsi_driver = {
1116 .remove = fsi_remove,
1117 .id_table = fsi_id_table,
1120 static int __init fsi_mobile_init(void)
1122 return platform_driver_register(&fsi_driver);
1125 static void __exit fsi_mobile_exit(void)
1127 platform_driver_unregister(&fsi_driver);
1129 module_init(fsi_mobile_init);
1130 module_exit(fsi_mobile_exit);
1132 MODULE_LICENSE("GPL");
1133 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1134 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");