2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
19 #include <linux/scatterlist.h>
20 #include <linux/sh_dma.h>
21 #include <linux/slab.h>
22 #include <linux/module.h>
23 #include <sound/soc.h>
24 #include <sound/pcm_params.h>
25 #include <sound/sh_fsi.h>
27 /* PortA/PortB register */
28 #define REG_DO_FMT 0x0000
29 #define REG_DOFF_CTL 0x0004
30 #define REG_DOFF_ST 0x0008
31 #define REG_DI_FMT 0x000C
32 #define REG_DIFF_CTL 0x0010
33 #define REG_DIFF_ST 0x0014
34 #define REG_CKG1 0x0018
35 #define REG_CKG2 0x001C
36 #define REG_DIDT 0x0020
37 #define REG_DODT 0x0024
38 #define REG_MUTE_ST 0x0028
39 #define REG_OUT_DMAC 0x002C
40 #define REG_OUT_SEL 0x0030
41 #define REG_IN_DMAC 0x0038
44 #define MST_CLK_RST 0x0210
45 #define MST_SOFT_RST 0x0214
46 #define MST_FIFO_SZ 0x0218
48 /* core register (depend on FSI version) */
49 #define A_MST_CTLR 0x0180
50 #define B_MST_CTLR 0x01A0
51 #define CPU_INT_ST 0x01F4
52 #define CPU_IEMSK 0x01F8
53 #define CPU_IMSK 0x01FC
60 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
61 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
62 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
63 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
65 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
66 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
67 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
69 #define CR_MONO (0x0 << 4)
70 #define CR_MONO_D (0x1 << 4)
71 #define CR_PCM (0x2 << 4)
72 #define CR_I2S (0x3 << 4)
73 #define CR_TDM (0x4 << 4)
74 #define CR_TDM_D (0x5 << 4)
78 #define VDMD_MASK (0x3 << 4)
79 #define VDMD_FRONT (0x0 << 4) /* Package in front */
80 #define VDMD_BACK (0x1 << 4) /* Package in back */
81 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
83 #define DMA_ON (0x1 << 0)
87 #define IRQ_HALF 0x00100000
88 #define FIFO_CLR 0x00000001
91 #define ERR_OVER 0x00000010
92 #define ERR_UNDER 0x00000001
93 #define ST_ERR (ERR_OVER | ERR_UNDER)
96 #define ACKMD_MASK 0x00007000
97 #define BPFMD_MASK 0x00000700
102 #define BP (1 << 4) /* Fix the signal of Biphase output */
103 #define SE (1 << 0) /* Fix the master clock */
109 /* IO SHIFT / MACRO */
114 #define AB_IO(param, shift) (param << shift)
117 #define PBSR (1 << 12) /* Port B Software Reset */
118 #define PASR (1 << 8) /* Port A Software Reset */
119 #define IR (1 << 4) /* Interrupt Reset */
120 #define FSISR (1 << 0) /* Software Reset */
123 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
124 /* 1: Biphase and serial */
127 #define FIFO_SZ_MASK 0x7
129 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
131 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
133 typedef int (*set_rate_func)(struct device *dev, int rate, int enable);
140 * A : sample widtht 16bit setting
141 * B : sample widtht 24bit setting
144 #define SHIFT_16DATA 0
145 #define SHIFT_24DATA 4
147 #define PACKAGE_24BITBUS_BACK 0
148 #define PACKAGE_24BITBUS_FRONT 1
149 #define PACKAGE_16BITBUS_STREAM 2
151 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
152 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
155 * FSI driver use below type name for variable
157 * xxx_num : number of data
158 * xxx_pos : position of data
159 * xxx_capa : capacity of data
163 * period/frame/sample image
167 * period pos period pos
169 * |<-------------------- period--------------------->|
170 * ==|============================================ ... =|==
172 * ||<----- frame ----->|<------ frame ----->| ... |
173 * |+--------------------+--------------------+- ... |
174 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
175 * |+--------------------+--------------------+- ... |
176 * ==|============================================ ... =|==
194 * FSIxCLK [CPG] (ick) -------> |
195 * |-> FSI_DIV (div)-> FSI2
196 * FSIxCK [external] (xck) ---> |
203 struct fsi_stream_handler;
207 * these are initialized by fsi_stream_init()
209 struct snd_pcm_substream *substream;
210 int fifo_sample_capa; /* sample capacity of FSI FIFO */
211 int buff_sample_capa; /* sample capacity of ALSA buffer */
212 int buff_sample_pos; /* sample position of ALSA buffer */
213 int period_samples; /* sample number / 1 period */
214 int period_pos; /* current period position */
215 int sample_width; /* sample width */
225 * thse are initialized by fsi_handler_init()
227 struct fsi_stream_handler *handler;
228 struct fsi_priv *priv;
231 * these are for DMAEngine
233 struct dma_chan *chan;
234 struct sh_dmae_slave slave; /* see fsi_handler_init() */
235 struct tasklet_struct tasklet;
240 /* see [FSI clock] */
245 int (*set_rate)(struct device *dev,
246 struct fsi_priv *fsi,
255 struct fsi_master *master;
256 struct sh_fsi_port_info *info;
258 struct fsi_stream playback;
259 struct fsi_stream capture;
261 struct fsi_clk clock;
272 struct fsi_stream_handler {
273 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
274 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
275 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
276 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
277 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
278 void (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
281 #define fsi_stream_handler_call(io, func, args...) \
283 !((io)->handler->func) ? 0 : \
284 (io)->handler->func(args))
299 struct fsi_priv fsia;
300 struct fsi_priv fsib;
301 struct fsi_core *core;
305 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
308 * basic read write function
311 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
313 /* valid data area is 24bit */
316 __raw_writel(data, reg);
319 static u32 __fsi_reg_read(u32 __iomem *reg)
321 return __raw_readl(reg);
324 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
326 u32 val = __fsi_reg_read(reg);
331 __fsi_reg_write(reg, val);
334 #define fsi_reg_write(p, r, d)\
335 __fsi_reg_write((p->base + REG_##r), d)
337 #define fsi_reg_read(p, r)\
338 __fsi_reg_read((p->base + REG_##r))
340 #define fsi_reg_mask_set(p, r, m, d)\
341 __fsi_reg_mask_set((p->base + REG_##r), m, d)
343 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
344 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
345 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
350 spin_lock_irqsave(&master->lock, flags);
351 ret = __fsi_reg_read(master->base + reg);
352 spin_unlock_irqrestore(&master->lock, flags);
357 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
358 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
359 static void _fsi_master_mask_set(struct fsi_master *master,
360 u32 reg, u32 mask, u32 data)
364 spin_lock_irqsave(&master->lock, flags);
365 __fsi_reg_mask_set(master->base + reg, mask, data);
366 spin_unlock_irqrestore(&master->lock, flags);
372 static int fsi_version(struct fsi_master *master)
374 return master->core->ver;
377 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
382 static int fsi_is_clk_master(struct fsi_priv *fsi)
384 return fsi->clk_master;
387 static int fsi_is_port_a(struct fsi_priv *fsi)
389 return fsi->master->base == fsi->base;
392 static int fsi_is_spdif(struct fsi_priv *fsi)
397 static int fsi_is_play(struct snd_pcm_substream *substream)
399 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
402 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
404 struct snd_soc_pcm_runtime *rtd = substream->private_data;
409 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
411 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
414 return &master->fsia;
416 return &master->fsib;
419 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
421 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
424 static set_rate_func fsi_get_info_set_rate(struct fsi_priv *fsi)
429 return fsi->info->set_rate;
432 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
437 return fsi->info->flags;
440 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
442 int is_play = fsi_stream_is_play(fsi, io);
443 int is_porta = fsi_is_port_a(fsi);
447 shift = is_play ? AO_SHIFT : AI_SHIFT;
449 shift = is_play ? BO_SHIFT : BI_SHIFT;
454 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
456 return frames * fsi->chan_num;
459 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
461 return samples / fsi->chan_num;
464 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
465 struct fsi_stream *io)
467 int is_play = fsi_stream_is_play(fsi, io);
472 fsi_reg_read(fsi, DOFF_ST) :
473 fsi_reg_read(fsi, DIFF_ST);
475 frames = 0x1ff & (status >> 8);
477 return fsi_frame2sample(fsi, frames);
480 static void fsi_count_fifo_err(struct fsi_priv *fsi)
482 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
483 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
485 if (ostatus & ERR_OVER)
486 fsi->playback.oerr_num++;
488 if (ostatus & ERR_UNDER)
489 fsi->playback.uerr_num++;
491 if (istatus & ERR_OVER)
492 fsi->capture.oerr_num++;
494 if (istatus & ERR_UNDER)
495 fsi->capture.uerr_num++;
497 fsi_reg_write(fsi, DOFF_ST, 0);
498 fsi_reg_write(fsi, DIFF_ST, 0);
502 * fsi_stream_xx() function
504 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
505 struct fsi_stream *io)
507 return &fsi->playback == io;
510 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
511 struct snd_pcm_substream *substream)
513 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
516 static int fsi_stream_is_working(struct fsi_priv *fsi,
517 struct fsi_stream *io)
519 struct fsi_master *master = fsi_get_master(fsi);
523 spin_lock_irqsave(&master->lock, flags);
524 ret = !!(io->substream && io->substream->runtime);
525 spin_unlock_irqrestore(&master->lock, flags);
530 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
535 static void fsi_stream_init(struct fsi_priv *fsi,
536 struct fsi_stream *io,
537 struct snd_pcm_substream *substream)
539 struct snd_pcm_runtime *runtime = substream->runtime;
540 struct fsi_master *master = fsi_get_master(fsi);
543 spin_lock_irqsave(&master->lock, flags);
544 io->substream = substream;
545 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
546 io->buff_sample_pos = 0;
547 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
549 io->sample_width = samples_to_bytes(runtime, 1);
551 io->oerr_num = -1; /* ignore 1st err */
552 io->uerr_num = -1; /* ignore 1st err */
553 fsi_stream_handler_call(io, init, fsi, io);
554 spin_unlock_irqrestore(&master->lock, flags);
557 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
559 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
560 struct fsi_master *master = fsi_get_master(fsi);
563 spin_lock_irqsave(&master->lock, flags);
565 if (io->oerr_num > 0)
566 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
568 if (io->uerr_num > 0)
569 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
571 fsi_stream_handler_call(io, quit, fsi, io);
572 io->substream = NULL;
573 io->buff_sample_capa = 0;
574 io->buff_sample_pos = 0;
575 io->period_samples = 0;
577 io->sample_width = 0;
581 spin_unlock_irqrestore(&master->lock, flags);
584 static int fsi_stream_transfer(struct fsi_stream *io)
586 struct fsi_priv *fsi = fsi_stream_to_priv(io);
590 return fsi_stream_handler_call(io, transfer, fsi, io);
593 #define fsi_stream_start(fsi, io)\
594 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
596 #define fsi_stream_stop(fsi, io)\
597 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
599 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
601 struct fsi_stream *io;
605 ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
608 ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
618 static int fsi_stream_remove(struct fsi_priv *fsi)
620 struct fsi_stream *io;
624 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
627 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
638 * format/bus/dma setting
640 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
641 u32 bus, struct device *dev)
643 struct fsi_master *master = fsi_get_master(fsi);
644 int is_play = fsi_stream_is_play(fsi, io);
647 if (fsi_version(master) >= 2) {
651 * FSI2 needs DMA/Bus setting
654 case PACKAGE_24BITBUS_FRONT:
657 dev_dbg(dev, "24bit bus / package in front\n");
659 case PACKAGE_16BITBUS_STREAM:
662 dev_dbg(dev, "16bit bus / stream mode\n");
664 case PACKAGE_24BITBUS_BACK:
668 dev_dbg(dev, "24bit bus / package in back\n");
673 fsi_reg_write(fsi, OUT_DMAC, dma);
675 fsi_reg_write(fsi, IN_DMAC, dma);
679 fsi_reg_write(fsi, DO_FMT, fmt);
681 fsi_reg_write(fsi, DI_FMT, fmt);
688 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
690 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
691 struct fsi_master *master = fsi_get_master(fsi);
693 fsi_core_mask_set(master, imsk, data, data);
694 fsi_core_mask_set(master, iemsk, data, data);
697 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
699 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
700 struct fsi_master *master = fsi_get_master(fsi);
702 fsi_core_mask_set(master, imsk, data, 0);
703 fsi_core_mask_set(master, iemsk, data, 0);
706 static u32 fsi_irq_get_status(struct fsi_master *master)
708 return fsi_core_read(master, int_st);
711 static void fsi_irq_clear_status(struct fsi_priv *fsi)
714 struct fsi_master *master = fsi_get_master(fsi);
716 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
717 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
719 /* clear interrupt factor */
720 fsi_core_mask_set(master, int_st, data, 0);
724 * SPDIF master clock function
726 * These functions are used later FSI2
728 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
730 struct fsi_master *master = fsi_get_master(fsi);
734 val = enable ? mask : 0;
737 fsi_core_mask_set(master, a_mclk, mask, val) :
738 fsi_core_mask_set(master, b_mclk, mask, val);
744 static int fsi_clk_init(struct device *dev,
745 struct fsi_priv *fsi,
749 int (*set_rate)(struct device *dev,
750 struct fsi_priv *fsi,
753 struct fsi_clk *clock = &fsi->clock;
754 int is_porta = fsi_is_port_a(fsi);
761 clock->set_rate = set_rate;
763 clock->own = devm_clk_get(dev, NULL);
764 if (IS_ERR(clock->own))
769 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
770 if (IS_ERR(clock->xck)) {
771 dev_err(dev, "can't get xck clock\n");
774 if (clock->xck == clock->own) {
775 dev_err(dev, "cpu doesn't support xck clock\n");
780 /* FSIACLK/FSIBCLK */
782 clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");
783 if (IS_ERR(clock->ick)) {
784 dev_err(dev, "can't get ick clock\n");
787 if (clock->ick == clock->own) {
788 dev_err(dev, "cpu doesn't support ick clock\n");
795 clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");
796 if (IS_ERR(clock->div)) {
797 dev_err(dev, "can't get div clock\n");
800 if (clock->div == clock->own) {
801 dev_err(dev, "cpu doens't support div clock\n");
809 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
810 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
812 fsi->clock.rate = rate;
815 static int fsi_clk_is_valid(struct fsi_priv *fsi)
817 return fsi->clock.set_rate &&
821 static int fsi_clk_enable(struct device *dev,
822 struct fsi_priv *fsi,
825 struct fsi_clk *clock = &fsi->clock;
828 if (!fsi_clk_is_valid(fsi))
831 if (0 == clock->count) {
832 ret = clock->set_rate(dev, fsi, rate);
834 fsi_clk_invalid(fsi);
839 clk_enable(clock->xck);
841 clk_enable(clock->ick);
843 clk_enable(clock->div);
851 static int fsi_clk_disable(struct device *dev,
852 struct fsi_priv *fsi)
854 struct fsi_clk *clock = &fsi->clock;
856 if (!fsi_clk_is_valid(fsi))
859 if (1 == clock->count--) {
861 clk_disable(clock->xck);
863 clk_disable(clock->ick);
865 clk_disable(clock->div);
871 static int fsi_clk_set_ackbpf(struct device *dev,
872 struct fsi_priv *fsi,
873 int ackmd, int bpfmd)
877 /* check ackmd/bpfmd relationship */
879 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
901 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
926 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
930 dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
932 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
938 static int fsi_clk_set_rate_external(struct device *dev,
939 struct fsi_priv *fsi,
942 struct clk *xck = fsi->clock.xck;
943 struct clk *ick = fsi->clock.ick;
948 /* check clock rate */
949 xrate = clk_get_rate(xck);
951 dev_err(dev, "unsupported clock rate\n");
955 clk_set_parent(ick, xck);
956 clk_set_rate(ick, xrate);
958 bpfmd = fsi->chan_num * 32;
959 ackmd = xrate / rate;
961 dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
963 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
965 dev_err(dev, "%s failed", __func__);
970 static int fsi_clk_set_rate_cpg(struct device *dev,
971 struct fsi_priv *fsi,
974 struct clk *ick = fsi->clock.ick;
975 struct clk *div = fsi->clock.div;
976 unsigned long target = 0; /* 12288000 or 11289600 */
977 unsigned long actual, cout;
978 unsigned long diff, min;
979 unsigned long best_cout, best_act;
984 if (!(12288000 % rate))
986 if (!(11289600 % rate))
989 dev_err(dev, "unsupported rate\n");
993 bpfmd = fsi->chan_num * 32;
994 ackmd = target / rate;
995 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
997 dev_err(dev, "%s failed", __func__);
1004 * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
1006 * But, it needs to find best match of CPG and FSI_DIV
1007 * combination, since it is difficult to generate correct
1008 * frequency of audio clock from ick clock only.
1009 * Because ick is created from its parent clock.
1011 * target = rate x [512/256/128/64]fs
1012 * cout = round(target x adjustment)
1013 * actual = cout / adjustment (by FSI-DIV) ~= target
1019 for (adj = 1; adj < 0xffff; adj++) {
1021 cout = target * adj;
1022 if (cout > 100000000) /* max clock = 100MHz */
1025 /* cout/actual audio clock */
1026 cout = clk_round_rate(ick, cout);
1027 actual = cout / adj;
1029 /* find best frequency */
1030 diff = abs(actual - target);
1038 ret = clk_set_rate(ick, best_cout);
1040 dev_err(dev, "ick clock failed\n");
1044 ret = clk_set_rate(div, clk_round_rate(div, best_act));
1046 dev_err(dev, "div clock failed\n");
1050 dev_dbg(dev, "ick/div = %ld/%ld\n",
1051 clk_get_rate(ick), clk_get_rate(div));
1056 static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi,
1057 long rate, int enable)
1059 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1065 * set_rate will be deleted
1069 return fsi_clk_enable(dev, fsi, rate);
1071 return fsi_clk_disable(dev, fsi);
1074 ret = set_rate(dev, rate, enable);
1075 if (ret < 0) /* error */
1084 switch (ret & SH_FSI_ACKMD_MASK) {
1087 case SH_FSI_ACKMD_512:
1088 data |= (0x0 << 12);
1090 case SH_FSI_ACKMD_256:
1091 data |= (0x1 << 12);
1093 case SH_FSI_ACKMD_128:
1094 data |= (0x2 << 12);
1096 case SH_FSI_ACKMD_64:
1097 data |= (0x3 << 12);
1099 case SH_FSI_ACKMD_32:
1100 data |= (0x4 << 12);
1104 switch (ret & SH_FSI_BPFMD_MASK) {
1107 case SH_FSI_BPFMD_32:
1110 case SH_FSI_BPFMD_64:
1113 case SH_FSI_BPFMD_128:
1116 case SH_FSI_BPFMD_256:
1119 case SH_FSI_BPFMD_512:
1122 case SH_FSI_BPFMD_16:
1127 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
1136 * pio data transfer handler
1138 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1140 u32 enable_stream = fsi_get_info_flags(fsi) & SH_FSI_ENABLE_STREAM_MODE;
1143 if (enable_stream) {
1147 * fsi_pio_push_init()
1149 u32 *buf = (u32 *)_buf;
1151 for (i = 0; i < samples / 2; i++)
1152 fsi_reg_write(fsi, DODT, buf[i]);
1155 u16 *buf = (u16 *)_buf;
1157 for (i = 0; i < samples; i++)
1158 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1162 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1164 u16 *buf = (u16 *)_buf;
1167 for (i = 0; i < samples; i++)
1168 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1171 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1173 u32 *buf = (u32 *)_buf;
1176 for (i = 0; i < samples; i++)
1177 fsi_reg_write(fsi, DODT, *(buf + i));
1180 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1182 u32 *buf = (u32 *)_buf;
1185 for (i = 0; i < samples; i++)
1186 *(buf + i) = fsi_reg_read(fsi, DIDT);
1189 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1191 struct snd_pcm_runtime *runtime = io->substream->runtime;
1193 return runtime->dma_area +
1194 samples_to_bytes(runtime, io->buff_sample_pos);
1197 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1198 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1199 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1202 struct snd_pcm_runtime *runtime;
1203 struct snd_pcm_substream *substream;
1207 if (!fsi_stream_is_working(fsi, io))
1211 substream = io->substream;
1212 runtime = substream->runtime;
1214 /* FSI FIFO has limit.
1215 * So, this driver can not send periods data at a time
1217 if (io->buff_sample_pos >=
1218 io->period_samples * (io->period_pos + 1)) {
1221 io->period_pos = (io->period_pos + 1) % runtime->periods;
1223 if (0 == io->period_pos)
1224 io->buff_sample_pos = 0;
1227 buf = fsi_pio_get_area(fsi, io);
1229 switch (io->sample_width) {
1231 run16(fsi, buf, samples);
1234 run32(fsi, buf, samples);
1240 /* update buff_sample_pos */
1241 io->buff_sample_pos += samples;
1244 snd_pcm_period_elapsed(substream);
1249 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1251 int sample_residues; /* samples in FSI fifo */
1252 int sample_space; /* ALSA free samples space */
1255 sample_residues = fsi_get_current_fifo_samples(fsi, io);
1256 sample_space = io->buff_sample_capa - io->buff_sample_pos;
1258 samples = min(sample_residues, sample_space);
1260 return fsi_pio_transfer(fsi, io,
1266 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1268 int sample_residues; /* ALSA residue samples */
1269 int sample_space; /* FSI fifo free samples space */
1272 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1273 sample_space = io->fifo_sample_capa -
1274 fsi_get_current_fifo_samples(fsi, io);
1276 samples = min(sample_residues, sample_space);
1278 return fsi_pio_transfer(fsi, io,
1284 static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1287 struct fsi_master *master = fsi_get_master(fsi);
1288 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1291 fsi_irq_enable(fsi, io);
1293 fsi_irq_disable(fsi, io);
1295 if (fsi_is_clk_master(fsi))
1296 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1299 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1301 u32 enable_stream = fsi_get_info_flags(fsi) & SH_FSI_ENABLE_STREAM_MODE;
1304 * we can use 16bit stream mode
1305 * when "playback" and "16bit data"
1306 * and platform allows "stream mode"
1311 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1312 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1314 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1315 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1319 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1322 * always 24bit bus, package back when "capture"
1324 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1325 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1329 static struct fsi_stream_handler fsi_pio_push_handler = {
1330 .init = fsi_pio_push_init,
1331 .transfer = fsi_pio_push,
1332 .start_stop = fsi_pio_start_stop,
1335 static struct fsi_stream_handler fsi_pio_pop_handler = {
1336 .init = fsi_pio_pop_init,
1337 .transfer = fsi_pio_pop,
1338 .start_stop = fsi_pio_start_stop,
1341 static irqreturn_t fsi_interrupt(int irq, void *data)
1343 struct fsi_master *master = data;
1344 u32 int_st = fsi_irq_get_status(master);
1346 /* clear irq status */
1347 fsi_master_mask_set(master, SOFT_RST, IR, 0);
1348 fsi_master_mask_set(master, SOFT_RST, IR, IR);
1350 if (int_st & AB_IO(1, AO_SHIFT))
1351 fsi_stream_transfer(&master->fsia.playback);
1352 if (int_st & AB_IO(1, BO_SHIFT))
1353 fsi_stream_transfer(&master->fsib.playback);
1354 if (int_st & AB_IO(1, AI_SHIFT))
1355 fsi_stream_transfer(&master->fsia.capture);
1356 if (int_st & AB_IO(1, BI_SHIFT))
1357 fsi_stream_transfer(&master->fsib.capture);
1359 fsi_count_fifo_err(&master->fsia);
1360 fsi_count_fifo_err(&master->fsib);
1362 fsi_irq_clear_status(&master->fsia);
1363 fsi_irq_clear_status(&master->fsib);
1369 * dma data transfer handler
1371 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1373 struct snd_pcm_runtime *runtime = io->substream->runtime;
1374 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1375 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1376 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1379 * 24bit data : 24bit bus / package in back
1380 * 16bit data : 16bit bus / stream mode
1382 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1383 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1385 io->dma = dma_map_single(dai->dev, runtime->dma_area,
1386 snd_pcm_lib_buffer_bytes(io->substream), dir);
1390 static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
1392 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1393 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1394 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1396 dma_unmap_single(dai->dev, io->dma,
1397 snd_pcm_lib_buffer_bytes(io->substream), dir);
1401 static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
1403 struct snd_pcm_runtime *runtime = io->substream->runtime;
1405 return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
1408 static void fsi_dma_complete(void *data)
1410 struct fsi_stream *io = (struct fsi_stream *)data;
1411 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1412 struct snd_pcm_runtime *runtime = io->substream->runtime;
1413 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1414 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1415 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1417 dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io),
1418 samples_to_bytes(runtime, io->period_samples), dir);
1420 io->buff_sample_pos += io->period_samples;
1423 if (io->period_pos >= runtime->periods) {
1425 io->buff_sample_pos = 0;
1428 fsi_count_fifo_err(fsi);
1429 fsi_stream_transfer(io);
1431 snd_pcm_period_elapsed(io->substream);
1434 static void fsi_dma_do_tasklet(unsigned long data)
1436 struct fsi_stream *io = (struct fsi_stream *)data;
1437 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1438 struct snd_soc_dai *dai;
1439 struct dma_async_tx_descriptor *desc;
1440 struct snd_pcm_runtime *runtime;
1441 enum dma_data_direction dir;
1442 int is_play = fsi_stream_is_play(fsi, io);
1446 if (!fsi_stream_is_working(fsi, io))
1449 dai = fsi_get_dai(io->substream);
1450 runtime = io->substream->runtime;
1451 dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1452 len = samples_to_bytes(runtime, io->period_samples);
1453 buf = fsi_dma_get_area(io);
1455 dma_sync_single_for_device(dai->dev, buf, len, dir);
1457 desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
1458 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1460 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
1464 desc->callback = fsi_dma_complete;
1465 desc->callback_param = io;
1467 if (dmaengine_submit(desc) < 0) {
1468 dev_err(dai->dev, "tx_submit() fail\n");
1472 dma_async_issue_pending(io->chan);
1477 * In DMAEngine case, codec and FSI cannot be started simultaneously
1478 * since FSI is using tasklet.
1479 * Therefore, in capture case, probably FSI FIFO will have got
1480 * overflow error in this point.
1481 * in that case, DMA cannot start transfer until error was cleared.
1484 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1485 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1486 fsi_reg_write(fsi, DIFF_ST, 0);
1491 static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1493 struct sh_dmae_slave *slave = param;
1495 chan->private = slave;
1500 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1502 tasklet_schedule(&io->tasklet);
1507 static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1510 struct fsi_master *master = fsi_get_master(fsi);
1511 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1512 u32 enable = start ? DMA_ON : 0;
1514 fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1516 dmaengine_terminate_all(io->chan);
1518 if (fsi_is_clk_master(fsi))
1519 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1522 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1524 dma_cap_mask_t mask;
1527 dma_cap_set(DMA_SLAVE, mask);
1529 io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1532 /* switch to PIO handler */
1533 if (fsi_stream_is_play(fsi, io))
1534 fsi->playback.handler = &fsi_pio_push_handler;
1536 fsi->capture.handler = &fsi_pio_pop_handler;
1538 dev_info(dev, "switch handler (dma => pio)\n");
1541 return fsi_stream_probe(fsi, dev);
1544 tasklet_init(&io->tasklet, fsi_dma_do_tasklet, (unsigned long)io);
1549 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1551 tasklet_kill(&io->tasklet);
1553 fsi_stream_stop(fsi, io);
1556 dma_release_channel(io->chan);
1562 static struct fsi_stream_handler fsi_dma_push_handler = {
1563 .init = fsi_dma_init,
1564 .quit = fsi_dma_quit,
1565 .probe = fsi_dma_probe,
1566 .transfer = fsi_dma_transfer,
1567 .remove = fsi_dma_remove,
1568 .start_stop = fsi_dma_push_start_stop,
1574 static void fsi_fifo_init(struct fsi_priv *fsi,
1575 struct fsi_stream *io,
1578 struct fsi_master *master = fsi_get_master(fsi);
1579 int is_play = fsi_stream_is_play(fsi, io);
1583 /* get on-chip RAM capacity */
1584 shift = fsi_master_read(master, FIFO_SZ);
1585 shift >>= fsi_get_port_shift(fsi, io);
1586 shift &= FIFO_SZ_MASK;
1587 frame_capa = 256 << shift;
1588 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1591 * The maximum number of sample data varies depending
1592 * on the number of channels selected for the format.
1594 * FIFOs are used in 4-channel units in 3-channel mode
1595 * and in 8-channel units in 5- to 7-channel mode
1596 * meaning that more FIFOs than the required size of DPRAM
1599 * ex) if 256 words of DP-RAM is connected
1600 * 1 channel: 256 (256 x 1 = 256)
1601 * 2 channels: 128 (128 x 2 = 256)
1602 * 3 channels: 64 ( 64 x 3 = 192)
1603 * 4 channels: 64 ( 64 x 4 = 256)
1604 * 5 channels: 32 ( 32 x 5 = 160)
1605 * 6 channels: 32 ( 32 x 6 = 192)
1606 * 7 channels: 32 ( 32 x 7 = 224)
1607 * 8 channels: 32 ( 32 x 8 = 256)
1609 for (i = 1; i < fsi->chan_num; i <<= 1)
1611 dev_dbg(dev, "%d channel %d store\n",
1612 fsi->chan_num, frame_capa);
1614 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1617 * set interrupt generation factor
1621 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1622 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1624 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1625 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1629 static int fsi_hw_startup(struct fsi_priv *fsi,
1630 struct fsi_stream *io,
1633 u32 flags = fsi_get_info_flags(fsi);
1637 if (fsi_is_clk_master(fsi))
1640 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1642 /* clock inversion (CKG2) */
1644 if (SH_FSI_LRM_INV & flags)
1646 if (SH_FSI_BRM_INV & flags)
1648 if (SH_FSI_LRS_INV & flags)
1650 if (SH_FSI_BRS_INV & flags)
1653 fsi_reg_write(fsi, CKG2, data);
1656 if (fsi_is_spdif(fsi)) {
1657 fsi_spdif_clk_ctrl(fsi, 1);
1658 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1665 switch (io->sample_width) {
1667 data = BUSOP_GET(16, io->bus_option);
1670 data = BUSOP_GET(24, io->bus_option);
1673 fsi_format_bus_setup(fsi, io, data, dev);
1676 fsi_irq_disable(fsi, io);
1677 fsi_irq_clear_status(fsi);
1680 fsi_fifo_init(fsi, io, dev);
1682 /* start master clock */
1683 if (fsi_is_clk_master(fsi))
1684 return fsi_set_master_clk(dev, fsi, fsi->rate, 1);
1689 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1692 /* stop master clock */
1693 if (fsi_is_clk_master(fsi))
1694 return fsi_set_master_clk(dev, fsi, fsi->rate, 0);
1699 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1700 struct snd_soc_dai *dai)
1702 struct fsi_priv *fsi = fsi_get_priv(substream);
1704 fsi_clk_invalid(fsi);
1710 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1711 struct snd_soc_dai *dai)
1713 struct fsi_priv *fsi = fsi_get_priv(substream);
1715 fsi_clk_invalid(fsi);
1719 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1720 struct snd_soc_dai *dai)
1722 struct fsi_priv *fsi = fsi_get_priv(substream);
1723 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1727 case SNDRV_PCM_TRIGGER_START:
1728 fsi_stream_init(fsi, io, substream);
1730 ret = fsi_hw_startup(fsi, io, dai->dev);
1732 ret = fsi_stream_transfer(io);
1734 fsi_stream_start(fsi, io);
1736 case SNDRV_PCM_TRIGGER_STOP:
1738 ret = fsi_hw_shutdown(fsi, dai->dev);
1739 fsi_stream_stop(fsi, io);
1740 fsi_stream_quit(fsi, io);
1747 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1749 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1750 case SND_SOC_DAIFMT_I2S:
1754 case SND_SOC_DAIFMT_LEFT_J:
1765 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1767 struct fsi_master *master = fsi_get_master(fsi);
1769 if (fsi_version(master) < 2)
1772 fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1779 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1781 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1782 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1783 u32 flags = fsi_get_info_flags(fsi);
1786 /* set master/slave audio interface */
1787 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1788 case SND_SOC_DAIFMT_CBM_CFM:
1789 fsi->clk_master = 1;
1791 case SND_SOC_DAIFMT_CBS_CFS:
1797 if (fsi_is_clk_master(fsi)) {
1801 * set_rate will be deleted
1804 dev_warn(dai->dev, "set_rate will be removed soon\n");
1806 switch (flags & SH_FSI_CLK_MASK) {
1807 case SH_FSI_CLK_EXTERNAL:
1808 fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1809 fsi_clk_set_rate_external);
1811 case SH_FSI_CLK_CPG:
1812 fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1813 fsi_clk_set_rate_cpg);
1819 switch (flags & SH_FSI_FMT_MASK) {
1820 case SH_FSI_FMT_DAI:
1821 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1823 case SH_FSI_FMT_SPDIF:
1824 ret = fsi_set_fmt_spdif(fsi);
1833 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1834 struct snd_pcm_hw_params *params,
1835 struct snd_soc_dai *dai)
1837 struct fsi_priv *fsi = fsi_get_priv(substream);
1839 if (fsi_is_clk_master(fsi)) {
1840 fsi->rate = params_rate(params);
1841 fsi_clk_valid(fsi, fsi->rate);
1847 static const struct snd_soc_dai_ops fsi_dai_ops = {
1848 .startup = fsi_dai_startup,
1849 .shutdown = fsi_dai_shutdown,
1850 .trigger = fsi_dai_trigger,
1851 .set_fmt = fsi_dai_set_fmt,
1852 .hw_params = fsi_dai_hw_params,
1859 static struct snd_pcm_hardware fsi_pcm_hardware = {
1860 .info = SNDRV_PCM_INFO_INTERLEAVED |
1861 SNDRV_PCM_INFO_MMAP |
1862 SNDRV_PCM_INFO_MMAP_VALID |
1863 SNDRV_PCM_INFO_PAUSE,
1864 .formats = FSI_FMTS,
1870 .buffer_bytes_max = 64 * 1024,
1871 .period_bytes_min = 32,
1872 .period_bytes_max = 8192,
1878 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1880 struct snd_pcm_runtime *runtime = substream->runtime;
1883 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1885 ret = snd_pcm_hw_constraint_integer(runtime,
1886 SNDRV_PCM_HW_PARAM_PERIODS);
1891 static int fsi_hw_params(struct snd_pcm_substream *substream,
1892 struct snd_pcm_hw_params *hw_params)
1894 return snd_pcm_lib_malloc_pages(substream,
1895 params_buffer_bytes(hw_params));
1898 static int fsi_hw_free(struct snd_pcm_substream *substream)
1900 return snd_pcm_lib_free_pages(substream);
1903 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1905 struct fsi_priv *fsi = fsi_get_priv(substream);
1906 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1908 return fsi_sample2frame(fsi, io->buff_sample_pos);
1911 static struct snd_pcm_ops fsi_pcm_ops = {
1912 .open = fsi_pcm_open,
1913 .ioctl = snd_pcm_lib_ioctl,
1914 .hw_params = fsi_hw_params,
1915 .hw_free = fsi_hw_free,
1916 .pointer = fsi_pointer,
1923 #define PREALLOC_BUFFER (32 * 1024)
1924 #define PREALLOC_BUFFER_MAX (32 * 1024)
1926 static void fsi_pcm_free(struct snd_pcm *pcm)
1928 snd_pcm_lib_preallocate_free_for_all(pcm);
1931 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1933 struct snd_pcm *pcm = rtd->pcm;
1936 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1937 * in MMAP mode (i.e. aplay -M)
1939 return snd_pcm_lib_preallocate_pages_for_all(
1941 SNDRV_DMA_TYPE_CONTINUOUS,
1942 snd_dma_continuous_data(GFP_KERNEL),
1943 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1950 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1955 .formats = FSI_FMTS,
1961 .formats = FSI_FMTS,
1965 .ops = &fsi_dai_ops,
1971 .formats = FSI_FMTS,
1977 .formats = FSI_FMTS,
1981 .ops = &fsi_dai_ops,
1985 static struct snd_soc_platform_driver fsi_soc_platform = {
1986 .ops = &fsi_pcm_ops,
1987 .pcm_new = fsi_pcm_new,
1988 .pcm_free = fsi_pcm_free,
1994 static void fsi_handler_init(struct fsi_priv *fsi,
1995 struct sh_fsi_port_info *info)
1997 fsi->playback.handler = &fsi_pio_push_handler; /* default PIO */
1998 fsi->playback.priv = fsi;
1999 fsi->capture.handler = &fsi_pio_pop_handler; /* default PIO */
2000 fsi->capture.priv = fsi;
2003 fsi->playback.slave.shdma_slave.slave_id = info->tx_id;
2004 fsi->playback.handler = &fsi_dma_push_handler;
2008 static int fsi_probe(struct platform_device *pdev)
2010 struct fsi_master *master;
2011 const struct platform_device_id *id_entry;
2012 struct sh_fsi_platform_info *info = pdev->dev.platform_data;
2013 struct sh_fsi_port_info nul_info, *pinfo;
2014 struct fsi_priv *fsi;
2015 struct resource *res;
2023 id_entry = pdev->id_entry;
2025 dev_err(&pdev->dev, "unknown fsi device\n");
2029 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2030 irq = platform_get_irq(pdev, 0);
2031 if (!res || (int)irq <= 0) {
2032 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
2036 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
2038 dev_err(&pdev->dev, "Could not allocate master\n");
2042 master->base = devm_ioremap_nocache(&pdev->dev,
2043 res->start, resource_size(res));
2044 if (!master->base) {
2045 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
2049 /* master setting */
2051 master->core = (struct fsi_core *)id_entry->driver_data;
2052 spin_lock_init(&master->lock);
2055 pinfo = (info) ? &info->port_a : &nul_info;
2056 fsi = &master->fsia;
2057 fsi->base = master->base;
2058 fsi->master = master;
2060 fsi_handler_init(fsi, pinfo);
2061 ret = fsi_stream_probe(fsi, &pdev->dev);
2063 dev_err(&pdev->dev, "FSIA stream probe failed\n");
2068 pinfo = (info) ? &info->port_b : &nul_info;
2069 fsi = &master->fsib;
2070 fsi->base = master->base + 0x40;
2071 fsi->master = master;
2073 fsi_handler_init(fsi, pinfo);
2074 ret = fsi_stream_probe(fsi, &pdev->dev);
2076 dev_err(&pdev->dev, "FSIB stream probe failed\n");
2080 pm_runtime_enable(&pdev->dev);
2081 dev_set_drvdata(&pdev->dev, master);
2083 ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
2084 id_entry->name, master);
2086 dev_err(&pdev->dev, "irq request err\n");
2090 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
2092 dev_err(&pdev->dev, "cannot snd soc register\n");
2096 ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai,
2097 ARRAY_SIZE(fsi_soc_dai));
2099 dev_err(&pdev->dev, "cannot snd dai register\n");
2106 snd_soc_unregister_platform(&pdev->dev);
2108 pm_runtime_disable(&pdev->dev);
2109 fsi_stream_remove(&master->fsib);
2111 fsi_stream_remove(&master->fsia);
2116 static int fsi_remove(struct platform_device *pdev)
2118 struct fsi_master *master;
2120 master = dev_get_drvdata(&pdev->dev);
2122 pm_runtime_disable(&pdev->dev);
2124 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
2125 snd_soc_unregister_platform(&pdev->dev);
2127 fsi_stream_remove(&master->fsia);
2128 fsi_stream_remove(&master->fsib);
2133 static void __fsi_suspend(struct fsi_priv *fsi,
2134 struct fsi_stream *io,
2137 if (!fsi_stream_is_working(fsi, io))
2140 fsi_stream_stop(fsi, io);
2141 fsi_hw_shutdown(fsi, dev);
2144 static void __fsi_resume(struct fsi_priv *fsi,
2145 struct fsi_stream *io,
2148 if (!fsi_stream_is_working(fsi, io))
2151 fsi_hw_startup(fsi, io, dev);
2152 fsi_stream_start(fsi, io);
2155 static int fsi_suspend(struct device *dev)
2157 struct fsi_master *master = dev_get_drvdata(dev);
2158 struct fsi_priv *fsia = &master->fsia;
2159 struct fsi_priv *fsib = &master->fsib;
2161 __fsi_suspend(fsia, &fsia->playback, dev);
2162 __fsi_suspend(fsia, &fsia->capture, dev);
2164 __fsi_suspend(fsib, &fsib->playback, dev);
2165 __fsi_suspend(fsib, &fsib->capture, dev);
2170 static int fsi_resume(struct device *dev)
2172 struct fsi_master *master = dev_get_drvdata(dev);
2173 struct fsi_priv *fsia = &master->fsia;
2174 struct fsi_priv *fsib = &master->fsib;
2176 __fsi_resume(fsia, &fsia->playback, dev);
2177 __fsi_resume(fsia, &fsia->capture, dev);
2179 __fsi_resume(fsib, &fsib->playback, dev);
2180 __fsi_resume(fsib, &fsib->capture, dev);
2185 static struct dev_pm_ops fsi_pm_ops = {
2186 .suspend = fsi_suspend,
2187 .resume = fsi_resume,
2190 static struct fsi_core fsi1_core = {
2199 static struct fsi_core fsi2_core = {
2203 .int_st = CPU_INT_ST,
2206 .a_mclk = A_MST_CTLR,
2207 .b_mclk = B_MST_CTLR,
2210 static struct platform_device_id fsi_id_table[] = {
2211 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
2212 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
2215 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2217 static struct platform_driver fsi_driver = {
2219 .name = "fsi-pcm-audio",
2223 .remove = fsi_remove,
2224 .id_table = fsi_id_table,
2227 module_platform_driver(fsi_driver);
2229 MODULE_LICENSE("GPL");
2230 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2231 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2232 MODULE_ALIAS("platform:fsi-pcm-audio");