sound/soc/tegra/tegra20_spdif.c

   1 /*
   2  * tegra20_spdif.c - Tegra20 SPDIF driver
   3  *
   4  * Author: Stephen Warren <swarren@nvidia.com>
   5  * Copyright (C) 2011-2012 - NVIDIA, Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19  * 02110-1301 USA
  20  *
  21  */
  22
  23 #include <linux/clk.h>
  24 #include <linux/debugfs.h>
  25 #include <linux/device.h>
  26 #include <linux/io.h>
  27 #include <linux/module.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/seq_file.h>
  30 #include <linux/slab.h>
  31 #include <sound/core.h>
  32 #include <sound/pcm.h>
  33 #include <sound/pcm_params.h>
  34 #include <sound/soc.h>
  35
  36 #include "tegra20_spdif.h"
  37
  38 #define DRV_NAME "tegra20-spdif"
  39
  40 static inline void tegra20_spdif_write(struct tegra20_spdif *spdif, u32 reg,
  41                                         u32 val)
  42 {
  43         __raw_writel(val, spdif->regs + reg);
  44 }
  45
  46 static inline u32 tegra20_spdif_read(struct tegra20_spdif *spdif, u32 reg)
  47 {
  48         return __raw_readl(spdif->regs + reg);
  49 }
  50
  51 #ifdef CONFIG_DEBUG_FS
  52 static int tegra20_spdif_show(struct seq_file *s, void *unused)
  53 {
  54 #define REG(r) { r, #r }
  55         static const struct {
  56                 int offset;
  57                 const char *name;
  58         } regs[] = {
  59                 REG(TEGRA20_SPDIF_CTRL),
  60                 REG(TEGRA20_SPDIF_STATUS),
  61                 REG(TEGRA20_SPDIF_STROBE_CTRL),
  62                 REG(TEGRA20_SPDIF_DATA_FIFO_CSR),
  63                 REG(TEGRA20_SPDIF_CH_STA_RX_A),
  64                 REG(TEGRA20_SPDIF_CH_STA_RX_B),
  65                 REG(TEGRA20_SPDIF_CH_STA_RX_C),
  66                 REG(TEGRA20_SPDIF_CH_STA_RX_D),
  67                 REG(TEGRA20_SPDIF_CH_STA_RX_E),
  68                 REG(TEGRA20_SPDIF_CH_STA_RX_F),
  69                 REG(TEGRA20_SPDIF_CH_STA_TX_A),
  70                 REG(TEGRA20_SPDIF_CH_STA_TX_B),
  71                 REG(TEGRA20_SPDIF_CH_STA_TX_C),
  72                 REG(TEGRA20_SPDIF_CH_STA_TX_D),
  73                 REG(TEGRA20_SPDIF_CH_STA_TX_E),
  74                 REG(TEGRA20_SPDIF_CH_STA_TX_F),
  75         };
  76 #undef REG
  77
  78         struct tegra20_spdif *spdif = s->private;
  79         int i;
  80
  81         for (i = 0; i < ARRAY_SIZE(regs); i++) {
  82                 u32 val = tegra20_spdif_read(spdif, regs[i].offset);
  83                 seq_printf(s, "%s = %08x\n", regs[i].name, val);
  84         }
  85
  86         return 0;
  87 }
  88
  89 static int tegra20_spdif_debug_open(struct inode *inode, struct file *file)
  90 {
  91         return single_open(file, tegra20_spdif_show, inode->i_private);
  92 }
  93
  94 static const struct file_operations tegra20_spdif_debug_fops = {
  95         .open    = tegra20_spdif_debug_open,
  96         .read    = seq_read,
  97         .llseek  = seq_lseek,
  98         .release = single_release,
  99 };
 100
 101 static void tegra20_spdif_debug_add(struct tegra20_spdif *spdif)
 102 {
 103         spdif->debug = debugfs_create_file(DRV_NAME, S_IRUGO,
 104                                                 snd_soc_debugfs_root, spdif,
 105                                                 &tegra20_spdif_debug_fops);
 106 }
 107
 108 static void tegra20_spdif_debug_remove(struct tegra20_spdif *spdif)
 109 {
 110         if (spdif->debug)
 111                 debugfs_remove(spdif->debug);
 112 }
 113 #else
 114 static inline void tegra20_spdif_debug_add(struct tegra20_spdif *spdif)
 115 {
 116 }
 117
 118 static inline void tegra20_spdif_debug_remove(struct tegra20_spdif *spdif)
 119 {
 120 }
 121 #endif
 122
 123 static int tegra20_spdif_hw_params(struct snd_pcm_substream *substream,
 124                                 struct snd_pcm_hw_params *params,
 125                                 struct snd_soc_dai *dai)
 126 {
 127         struct device *dev = substream->pcm->card->dev;
 128         struct tegra20_spdif *spdif = snd_soc_dai_get_drvdata(dai);
 129         int ret, spdifclock;
 130
 131         spdif->reg_ctrl &= ~TEGRA20_SPDIF_CTRL_PACK;
 132         spdif->reg_ctrl &= ~TEGRA20_SPDIF_CTRL_BIT_MODE_MASK;
 133         switch (params_format(params)) {
 134         case SNDRV_PCM_FORMAT_S16_LE:
 135                 spdif->reg_ctrl |= TEGRA20_SPDIF_CTRL_PACK;
 136                 spdif->reg_ctrl |= TEGRA20_SPDIF_CTRL_BIT_MODE_16BIT;
 137                 break;
 138         default:
 139                 return -EINVAL;
 140         }
 141
 142         switch (params_rate(params)) {
 143         case 32000:
 144                 spdifclock = 4096000;
 145                 break;
 146         case 44100:
 147                 spdifclock = 5644800;
 148                 break;
 149         case 48000:
 150                 spdifclock = 6144000;
 151                 break;
 152         case 88200:
 153                 spdifclock = 11289600;
 154                 break;
 155         case 96000:
 156                 spdifclock = 12288000;
 157                 break;
 158         case 176400:
 159                 spdifclock = 22579200;
 160                 break;
 161         case 192000:
 162                 spdifclock = 24576000;
 163                 break;
 164         default:
 165                 return -EINVAL;
 166         }
 167
 168         ret = clk_set_rate(spdif->clk_spdif_out, spdifclock);
 169         if (ret) {
 170                 dev_err(dev, "Can't set SPDIF clock rate: %d\n", ret);
 171                 return ret;
 172         }
 173
 174         return 0;
 175 }
 176
 177 static void tegra20_spdif_start_playback(struct tegra20_spdif *spdif)
 178 {
 179         spdif->reg_ctrl |= TEGRA20_SPDIF_CTRL_TX_EN;
 180         tegra20_spdif_write(spdif, TEGRA20_SPDIF_CTRL, spdif->reg_ctrl);
 181 }
 182
 183 static void tegra20_spdif_stop_playback(struct tegra20_spdif *spdif)
 184 {
 185         spdif->reg_ctrl &= ~TEGRA20_SPDIF_CTRL_TX_EN;
 186         tegra20_spdif_write(spdif, TEGRA20_SPDIF_CTRL, spdif->reg_ctrl);
 187 }
 188
 189 static int tegra20_spdif_trigger(struct snd_pcm_substream *substream, int cmd,
 190                                 struct snd_soc_dai *dai)
 191 {
 192         struct tegra20_spdif *spdif = snd_soc_dai_get_drvdata(dai);
 193
 194         switch (cmd) {
 195         case SNDRV_PCM_TRIGGER_START:
 196         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 197         case SNDRV_PCM_TRIGGER_RESUME:
 198                 clk_enable(spdif->clk_spdif_out);
 199                 tegra20_spdif_start_playback(spdif);
 200                 break;
 201         case SNDRV_PCM_TRIGGER_STOP:
 202         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 203         case SNDRV_PCM_TRIGGER_SUSPEND:
 204                 tegra20_spdif_stop_playback(spdif);
 205                 clk_disable(spdif->clk_spdif_out);
 206                 break;
 207         default:
 208                 return -EINVAL;
 209         }
 210
 211         return 0;
 212 }
 213
 214 static int tegra20_spdif_probe(struct snd_soc_dai *dai)
 215 {
 216         struct tegra20_spdif *spdif = snd_soc_dai_get_drvdata(dai);
 217
 218         dai->capture_dma_data = NULL;
 219         dai->playback_dma_data = &spdif->playback_dma_data;
 220
 221         return 0;
 222 }
 223
 224 static const struct snd_soc_dai_ops tegra20_spdif_dai_ops = {
 225         .hw_params      = tegra20_spdif_hw_params,
 226         .trigger        = tegra20_spdif_trigger,
 227 };
 228
 229 static struct snd_soc_dai_driver tegra20_spdif_dai = {
 230         .name = DRV_NAME,
 231         .probe = tegra20_spdif_probe,
 232         .playback = {
 233                 .channels_min = 2,
 234                 .channels_max = 2,
 235                 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
 236                                 SNDRV_PCM_RATE_48000,
 237                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 238         },
 239         .ops = &tegra20_spdif_dai_ops,
 240 };
 241
 242 static __devinit int tegra20_spdif_platform_probe(struct platform_device *pdev)
 243 {
 244         struct tegra20_spdif *spdif;
 245         struct resource *mem, *memregion, *dmareq;
 246         int ret;
 247
 248         spdif = kzalloc(sizeof(struct tegra20_spdif), GFP_KERNEL);
 249         if (!spdif) {
 250                 dev_err(&pdev->dev, "Can't allocate tegra20_spdif\n");
 251                 ret = -ENOMEM;
 252                 goto exit;
 253         }
 254         dev_set_drvdata(&pdev->dev, spdif);
 255
 256         spdif->clk_spdif_out = clk_get(&pdev->dev, "spdif_out");
 257         if (IS_ERR(spdif->clk_spdif_out)) {
 258                 pr_err("Can't retrieve spdif clock\n");
 259                 ret = PTR_ERR(spdif->clk_spdif_out);
 260                 goto err_free;
 261         }
 262
 263         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 264         if (!mem) {
 265                 dev_err(&pdev->dev, "No memory resource\n");
 266                 ret = -ENODEV;
 267                 goto err_clk_put;
 268         }
 269
 270         dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0);
 271         if (!dmareq) {
 272                 dev_err(&pdev->dev, "No DMA resource\n");
 273                 ret = -ENODEV;
 274                 goto err_clk_put;
 275         }
 276
 277         memregion = request_mem_region(mem->start, resource_size(mem),
 278                                         DRV_NAME);
 279         if (!memregion) {
 280                 dev_err(&pdev->dev, "Memory region already claimed\n");
 281                 ret = -EBUSY;
 282                 goto err_clk_put;
 283         }
 284
 285         spdif->regs = ioremap(mem->start, resource_size(mem));
 286         if (!spdif->regs) {
 287                 dev_err(&pdev->dev, "ioremap failed\n");
 288                 ret = -ENOMEM;
 289                 goto err_release;
 290         }
 291
 292         spdif->playback_dma_data.addr = mem->start + TEGRA20_SPDIF_DATA_OUT;
 293         spdif->playback_dma_data.wrap = 4;
 294         spdif->playback_dma_data.width = 32;
 295         spdif->playback_dma_data.req_sel = dmareq->start;
 296
 297         ret = snd_soc_register_dai(&pdev->dev, &tegra20_spdif_dai);
 298         if (ret) {
 299                 dev_err(&pdev->dev, "Could not register DAI: %d\n", ret);
 300                 ret = -ENOMEM;
 301                 goto err_unmap;
 302         }
 303
 304         ret = tegra_pcm_platform_register(&pdev->dev);
 305         if (ret) {
 306                 dev_err(&pdev->dev, "Could not register PCM: %d\n", ret);
 307                 goto err_unregister_dai;
 308         }
 309
 310         tegra20_spdif_debug_add(spdif);
 311
 312         return 0;
 313
 314 err_unregister_dai:
 315         snd_soc_unregister_dai(&pdev->dev);
 316 err_unmap:
 317         iounmap(spdif->regs);
 318 err_release:
 319         release_mem_region(mem->start, resource_size(mem));
 320 err_clk_put:
 321         clk_put(spdif->clk_spdif_out);
 322 err_free:
 323         kfree(spdif);
 324 exit:
 325         return ret;
 326 }
 327
 328 static int __devexit tegra20_spdif_platform_remove(struct platform_device *pdev)
 329 {
 330         struct tegra20_spdif *spdif = dev_get_drvdata(&pdev->dev);
 331         struct resource *res;
 332
 333         tegra_pcm_platform_unregister(&pdev->dev);
 334         snd_soc_unregister_dai(&pdev->dev);
 335
 336         tegra20_spdif_debug_remove(spdif);
 337
 338         iounmap(spdif->regs);
 339
 340         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 341         release_mem_region(res->start, resource_size(res));
 342
 343         clk_put(spdif->clk_spdif_out);
 344
 345         kfree(spdif);
 346
 347         return 0;
 348 }
 349
 350 static struct platform_driver tegra20_spdif_driver = {
 351         .driver = {
 352                 .name = DRV_NAME,
 353                 .owner = THIS_MODULE,
 354         },
 355         .probe = tegra20_spdif_platform_probe,
 356         .remove = __devexit_p(tegra20_spdif_platform_remove),
 357 };
 358
 359 module_platform_driver(tegra20_spdif_driver);
 360
 361 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
 362 MODULE_DESCRIPTION("Tegra20 SPDIF ASoC driver");
 363 MODULE_LICENSE("GPL");
 364 MODULE_ALIAS("platform:" DRV_NAME);