target/linux/bcm53xx/patches-4.4/082-0003-USB-bcma-drop-Northstar-PHY-2.0-initialization-code.patch

   1 From e8624859dde2ad07633dac7ec86629a516411ea1 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Wed, 21 Sep 2016 18:01:43 +0200
   4 Subject: [PATCH] USB: bcma: drop Northstar PHY 2.0 initialization code
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 This driver should initialize controller only, PHY initialization should
  10 be handled by separated PHY driver. We already have phy-bcm-ns-usb2 in
  11 place so let it makes its duty.
  12
  13 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  14 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  15 ---
  16  drivers/usb/host/bcma-hcd.c | 80 ++++++++++++++-------------------------------
  17  1 file changed, 25 insertions(+), 55 deletions(-)
  18
  19 --- a/drivers/usb/host/bcma-hcd.c
  20 +++ b/drivers/usb/host/bcma-hcd.c
  21 @@ -239,44 +239,10 @@ static int bcma_hcd_usb20_old_arm_init(s
  22         return 0;
  23  }
  24
  25 -static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
  26 -{
  27 -       struct bcma_device *arm_core;
  28 -       void __iomem *dmu;
  29 -
  30 -       arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
  31 -       if (!arm_core) {
  32 -               dev_err(&dev->dev, "can not find ARM Cortex A9 ihost core\n");
  33 -               return;
  34 -       }
  35 -
  36 -       dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000);
  37 -       if (!dmu) {
  38 -               dev_err(&dev->dev, "can not map ARM Cortex A9 ihost core\n");
  39 -               return;
  40 -       }
  41 -
  42 -       /* Unlock DMU PLL settings */
  43 -       iowrite32(0x0000ea68, dmu + 0x180);
  44 -
  45 -       /* Write USB 2.0 PLL control setting */
  46 -       iowrite32(0x00dd10c3, dmu + 0x164);
  47 -
  48 -       /* Lock DMU PLL settings */
  49 -       iowrite32(0x00000000, dmu + 0x180);
  50 -
  51 -       iounmap(dmu);
  52 -}
  53 -
  54 -static void bcma_hcd_init_chip_arm_hc(struct bcma_device *dev)
  55 +static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
  56  {
  57         u32 val;
  58
  59 -       /*
  60 -        * Delay after PHY initialized to ensure HC is ready to be configured
  61 -        */
  62 -       usleep_range(1000, 2000);
  63 -
  64         /* Set packet buffer OUT threshold */
  65         val = bcma_read32(dev, 0x94);
  66         val &= 0xffff;
  67 @@ -287,20 +253,33 @@ static void bcma_hcd_init_chip_arm_hc(st
  68         val = bcma_read32(dev, 0x9c);
  69         val |= 1;
  70         bcma_write32(dev, 0x9c, val);
  71 +
  72 +       /*
  73 +        * Broadcom initializes PHY and then waits to ensure HC is ready to be
  74 +        * configured. In our case the order is reversed. We just initialized
  75 +        * controller and we let HCD initialize PHY, so let's wait (sleep) now.
  76 +        */
  77 +       usleep_range(1000, 2000);
  78  }
  79
  80 -static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
  81 +/**
  82 + * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
  83 + */
  84 +static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
  85  {
  86 -       bcma_core_enable(dev, 0);
  87 +       struct bcma_device *core = bcma_hcd->core;
  88 +       struct bcma_chipinfo *ci = &core->bus->chipinfo;
  89 +       struct device *dev = &core->dev;
  90 +
  91 +       bcma_core_enable(core, 0);
  92
  93 -       if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
  94 -           dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
  95 -               if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
  96 -                   dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
  97 -                       bcma_hcd_init_chip_arm_phy(dev);
  98 +       if (ci->id == BCMA_CHIP_ID_BCM4707 ||
  99 +           ci->id == BCMA_CHIP_ID_BCM53018)
 100 +               bcma_hcd_usb20_ns_init_hc(core);
 101
 102 -               bcma_hcd_init_chip_arm_hc(dev);
 103 -       }
 104 +       of_platform_default_populate(dev->of_node, NULL, dev);
 105 +
 106 +       return 0;
 107  }
 108
 109  static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
 110 @@ -373,16 +352,7 @@ static int bcma_hcd_usb20_init(struct bc
 111         if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
 112                 return -EOPNOTSUPP;
 113
 114 -       switch (dev->id.id) {
 115 -       case BCMA_CORE_NS_USB20:
 116 -               bcma_hcd_init_chip_arm(dev);
 117 -               break;
 118 -       case BCMA_CORE_USB20_HOST:
 119 -               bcma_hcd_init_chip_mips(dev);
 120 -               break;
 121 -       default:
 122 -               return -ENODEV;
 123 -       }
 124 +       bcma_hcd_init_chip_mips(dev);
 125
 126         /* In AI chips EHCI is addrspace 0, OHCI is 1 */
 127         ohci_addr = dev->addr_s[0];
 128 @@ -451,7 +421,7 @@ static int bcma_hcd_probe(struct bcma_de
 129                         err = -ENOTSUPP;
 130                 break;
 131         case BCMA_CORE_NS_USB20:
 132 -               err = bcma_hcd_usb20_init(usb_dev);
 133 +               err = bcma_hcd_usb20_ns_init(usb_dev);
 134                 break;
 135         case BCMA_CORE_NS_USB30:
 136                 err = bcma_hcd_usb30_init(usb_dev);