target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch

   1 From bd8dd593f7d2211f2273e05741d157b0c8d020ae Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Tue, 13 Sep 2016 09:06:04 +0200
   4 Subject: [PATCH] clk: bcm: Add driver for BCM53573 ILP clock
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 This clock is present on BCM53573 devices (including BCM47189) that use
  10 Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
  11 device so we use syscon (and regmap) for it.
  12
  13 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  14 Acked-by: Rob Herring <robh@kernel.org>
  15 [sboyd@codeaurora.org: Remove 0 from clk_init_data to silence sparse]
  16 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  17 ---
  18  .../bindings/clock/brcm,bcm53573-ilp.txt           |  36 +++++
  19  drivers/clk/bcm/Makefile                           |   1 +
  20  drivers/clk/bcm/clk-bcm53573-ilp.c                 | 148 +++++++++++++++++++++
  21  3 files changed, 185 insertions(+)
  22  create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
  23  create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c
  24
  25 --- /dev/null
  26 +++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt
  27 @@ -0,0 +1,36 @@
  28 +Broadcom BCM53573 ILP clock
  29 +===========================
  30 +
  31 +This binding uses the common clock binding:
  32 +    Documentation/devicetree/bindings/clock/clock-bindings.txt
  33 +
  34 +This binding is used for ILP clock (sometimes referred as "slow clock")
  35 +on Broadcom BCM53573 devices using Cortex-A7 CPU.
  36 +
  37 +ILP's rate has to be calculated on runtime and it depends on ALP clock
  38 +which has to be referenced.
  39 +
  40 +This clock is part of PMU (Power Management Unit), a Broadcom's device
  41 +handing power-related aspects. Its node must be sub-node of the PMU
  42 +device.
  43 +
  44 +Required properties:
  45 +- compatible: "brcm,bcm53573-ilp"
  46 +- clocks: has to reference an ALP clock
  47 +- #clock-cells: should be <0>
  48 +- clock-output-names: from common clock bindings, should contain clock
  49 +                     name
  50 +
  51 +Example:
  52 +
  53 +pmu@18012000 {
  54 +       compatible = "simple-mfd", "syscon";
  55 +       reg = <0x18012000 0x00001000>;
  56 +
  57 +       ilp {
  58 +               compatible = "brcm,bcm53573-ilp";
  59 +               clocks = <&alp>;
  60 +               #clock-cells = <0>;
  61 +               clock-output-names = "ilp";
  62 +       };
  63 +};
  64 --- a/drivers/clk/bcm/Makefile
  65 +++ b/drivers/clk/bcm/Makefile
  66 @@ -4,6 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA)      += clk-bcm281
  67  obj-$(CONFIG_CLK_BCM_KONA)     += clk-bcm21664.o
  68  obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
  69  obj-$(CONFIG_ARCH_BCM2835)     += clk-bcm2835.o
  70 +obj-$(CONFIG_ARCH_BCM_53573)   += clk-bcm53573-ilp.o
  71  obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o
  72  obj-$(CONFIG_ARCH_BCM_CYGNUS)  += clk-cygnus.o
  73  obj-$(CONFIG_ARCH_BCM_NSP)     += clk-nsp.o
  74 --- /dev/null
  75 +++ b/drivers/clk/bcm/clk-bcm53573-ilp.c
  76 @@ -0,0 +1,148 @@
  77 +/*
  78 + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
  79 + *
  80 + * This program is free software; you can redistribute it and/or modify
  81 + * it under the terms of the GNU General Public License version 2 as
  82 + * published by the Free Software Foundation.
  83 + */
  84 +
  85 +#include <linux/clk-provider.h>
  86 +#include <linux/err.h>
  87 +#include <linux/io.h>
  88 +#include <linux/mfd/syscon.h>
  89 +#include <linux/of.h>
  90 +#include <linux/of_address.h>
  91 +#include <linux/regmap.h>
  92 +#include <linux/slab.h>
  93 +
  94 +#define PMU_XTAL_FREQ_RATIO                    0x66c
  95 +#define  XTAL_ALP_PER_4ILP                     0x00001fff
  96 +#define  XTAL_CTL_EN                           0x80000000
  97 +#define PMU_SLOW_CLK_PERIOD                    0x6dc
  98 +
  99 +struct bcm53573_ilp {
 100 +       struct clk_hw hw;
 101 +       struct regmap *regmap;
 102 +};
 103 +
 104 +static int bcm53573_ilp_enable(struct clk_hw *hw)
 105 +{
 106 +       struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
 107 +
 108 +       regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199);
 109 +       regmap_write(ilp->regmap, 0x674, 0x10000);
 110 +
 111 +       return 0;
 112 +}
 113 +
 114 +static void bcm53573_ilp_disable(struct clk_hw *hw)
 115 +{
 116 +       struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
 117 +
 118 +       regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0);
 119 +       regmap_write(ilp->regmap, 0x674, 0);
 120 +}
 121 +
 122 +static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw,
 123 +                                             unsigned long parent_rate)
 124 +{
 125 +       struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw);
 126 +       struct regmap *regmap = ilp->regmap;
 127 +       u32 last_val, cur_val;
 128 +       int sum = 0, num = 0, loop_num = 0;
 129 +       int avg;
 130 +
 131 +       /* Enable measurement */
 132 +       regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN);
 133 +
 134 +       /* Read initial value */
 135 +       regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val);
 136 +       last_val &= XTAL_ALP_PER_4ILP;
 137 +
 138 +       /*
 139 +        * At minimum we should loop for a bit to let hardware do the
 140 +        * measurement. This isn't very accurate however, so for a better
 141 +        * precision lets try getting 20 different values for and use average.
 142 +        */
 143 +       while (num < 20) {
 144 +               regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val);
 145 +               cur_val &= XTAL_ALP_PER_4ILP;
 146 +
 147 +               if (cur_val != last_val) {
 148 +                       /* Got different value, use it */
 149 +                       sum += cur_val;
 150 +                       num++;
 151 +                       loop_num = 0;
 152 +                       last_val = cur_val;
 153 +               } else if (++loop_num > 5000) {
 154 +                       /* Same value over and over, give up */
 155 +                       sum += cur_val;
 156 +                       num++;
 157 +                       break;
 158 +               }
 159 +
 160 +               cpu_relax();
 161 +       }
 162 +
 163 +       /* Disable measurement to save power */
 164 +       regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0);
 165 +
 166 +       avg = sum / num;
 167 +
 168 +       return parent_rate * 4 / avg;
 169 +}
 170 +
 171 +static const struct clk_ops bcm53573_ilp_clk_ops = {
 172 +       .enable = bcm53573_ilp_enable,
 173 +       .disable = bcm53573_ilp_disable,
 174 +       .recalc_rate = bcm53573_ilp_recalc_rate,
 175 +};
 176 +
 177 +static void bcm53573_ilp_init(struct device_node *np)
 178 +{
 179 +       struct bcm53573_ilp *ilp;
 180 +       struct clk_init_data init = { };
 181 +       const char *parent_name;
 182 +       int err;
 183 +
 184 +       ilp = kzalloc(sizeof(*ilp), GFP_KERNEL);
 185 +       if (!ilp)
 186 +               return;
 187 +
 188 +       parent_name = of_clk_get_parent_name(np, 0);
 189 +       if (!parent_name) {
 190 +               err = -ENOENT;
 191 +               goto err_free_ilp;
 192 +       }
 193 +
 194 +       ilp->regmap = syscon_node_to_regmap(of_get_parent(np));
 195 +       if (IS_ERR(ilp->regmap)) {
 196 +               err = PTR_ERR(ilp->regmap);
 197 +               goto err_free_ilp;
 198 +       }
 199 +
 200 +       init.name = np->name;
 201 +       init.ops = &bcm53573_ilp_clk_ops;
 202 +       init.parent_names = &parent_name;
 203 +       init.num_parents = 1;
 204 +
 205 +       ilp->hw.init = &init;
 206 +       err = clk_hw_register(NULL, &ilp->hw);
 207 +       if (err)
 208 +               goto err_free_ilp;
 209 +
 210 +       err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw);
 211 +       if (err)
 212 +               goto err_clk_hw_unregister;
 213 +
 214 +       return;
 215 +
 216 +err_clk_hw_unregister:
 217 +       clk_hw_unregister(&ilp->hw);
 218 +err_free_ilp:
 219 +       kfree(ilp);
 220 +       pr_err("Failed to init ILP clock: %d\n", err);
 221 +}
 222 +
 223 +/* We need it very early for arch code, before device model gets ready */
 224 +CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init);