2 * B53 switch driver main logic
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/delay.h>
22 #include <linux/export.h>
23 #include <linux/gpio.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/switch.h>
27 #include <linux/platform_data/b53.h>
32 /* buffer size needed for displaying all MIBs with max'd values */
33 #define B53_BUF_SIZE 1188
42 /* BCM5365 MIB counters */
43 static const struct b53_mib_desc b53_mibs_65[] = {
44 { 8, 0x00, "TxOctets" },
45 { 4, 0x08, "TxDropPkts" },
46 { 4, 0x10, "TxBroadcastPkts" },
47 { 4, 0x14, "TxMulticastPkts" },
48 { 4, 0x18, "TxUnicastPkts" },
49 { 4, 0x1c, "TxCollisions" },
50 { 4, 0x20, "TxSingleCollision" },
51 { 4, 0x24, "TxMultipleCollision" },
52 { 4, 0x28, "TxDeferredTransmit" },
53 { 4, 0x2c, "TxLateCollision" },
54 { 4, 0x30, "TxExcessiveCollision" },
55 { 4, 0x38, "TxPausePkts" },
56 { 8, 0x44, "RxOctets" },
57 { 4, 0x4c, "RxUndersizePkts" },
58 { 4, 0x50, "RxPausePkts" },
59 { 4, 0x54, "Pkts64Octets" },
60 { 4, 0x58, "Pkts65to127Octets" },
61 { 4, 0x5c, "Pkts128to255Octets" },
62 { 4, 0x60, "Pkts256to511Octets" },
63 { 4, 0x64, "Pkts512to1023Octets" },
64 { 4, 0x68, "Pkts1024to1522Octets" },
65 { 4, 0x6c, "RxOversizePkts" },
66 { 4, 0x70, "RxJabbers" },
67 { 4, 0x74, "RxAlignmentErrors" },
68 { 4, 0x78, "RxFCSErrors" },
69 { 8, 0x7c, "RxGoodOctets" },
70 { 4, 0x84, "RxDropPkts" },
71 { 4, 0x88, "RxUnicastPkts" },
72 { 4, 0x8c, "RxMulticastPkts" },
73 { 4, 0x90, "RxBroadcastPkts" },
74 { 4, 0x94, "RxSAChanges" },
75 { 4, 0x98, "RxFragments" },
79 /* BCM63xx MIB counters */
80 static const struct b53_mib_desc b53_mibs_63xx[] = {
81 { 8, 0x00, "TxOctets" },
82 { 4, 0x08, "TxDropPkts" },
83 { 4, 0x0c, "TxQoSPkts" },
84 { 4, 0x10, "TxBroadcastPkts" },
85 { 4, 0x14, "TxMulticastPkts" },
86 { 4, 0x18, "TxUnicastPkts" },
87 { 4, 0x1c, "TxCollisions" },
88 { 4, 0x20, "TxSingleCollision" },
89 { 4, 0x24, "TxMultipleCollision" },
90 { 4, 0x28, "TxDeferredTransmit" },
91 { 4, 0x2c, "TxLateCollision" },
92 { 4, 0x30, "TxExcessiveCollision" },
93 { 4, 0x38, "TxPausePkts" },
94 { 8, 0x3c, "TxQoSOctets" },
95 { 8, 0x44, "RxOctets" },
96 { 4, 0x4c, "RxUndersizePkts" },
97 { 4, 0x50, "RxPausePkts" },
98 { 4, 0x54, "Pkts64Octets" },
99 { 4, 0x58, "Pkts65to127Octets" },
100 { 4, 0x5c, "Pkts128to255Octets" },
101 { 4, 0x60, "Pkts256to511Octets" },
102 { 4, 0x64, "Pkts512to1023Octets" },
103 { 4, 0x68, "Pkts1024to1522Octets" },
104 { 4, 0x6c, "RxOversizePkts" },
105 { 4, 0x70, "RxJabbers" },
106 { 4, 0x74, "RxAlignmentErrors" },
107 { 4, 0x78, "RxFCSErrors" },
108 { 8, 0x7c, "RxGoodOctets" },
109 { 4, 0x84, "RxDropPkts" },
110 { 4, 0x88, "RxUnicastPkts" },
111 { 4, 0x8c, "RxMulticastPkts" },
112 { 4, 0x90, "RxBroadcastPkts" },
113 { 4, 0x94, "RxSAChanges" },
114 { 4, 0x98, "RxFragments" },
115 { 4, 0xa0, "RxSymbolErrors" },
116 { 4, 0xa4, "RxQoSPkts" },
117 { 8, 0xa8, "RxQoSOctets" },
118 { 4, 0xb0, "Pkts1523to2047Octets" },
119 { 4, 0xb4, "Pkts2048to4095Octets" },
120 { 4, 0xb8, "Pkts4096to8191Octets" },
121 { 4, 0xbc, "Pkts8192to9728Octets" },
122 { 4, 0xc0, "RxDiscarded" },
127 static const struct b53_mib_desc b53_mibs[] = {
128 { 8, 0x00, "TxOctets" },
129 { 4, 0x08, "TxDropPkts" },
130 { 4, 0x10, "TxBroadcastPkts" },
131 { 4, 0x14, "TxMulticastPkts" },
132 { 4, 0x18, "TxUnicastPkts" },
133 { 4, 0x1c, "TxCollisions" },
134 { 4, 0x20, "TxSingleCollision" },
135 { 4, 0x24, "TxMultipleCollision" },
136 { 4, 0x28, "TxDeferredTransmit" },
137 { 4, 0x2c, "TxLateCollision" },
138 { 4, 0x30, "TxExcessiveCollision" },
139 { 4, 0x38, "TxPausePkts" },
140 { 8, 0x50, "RxOctets" },
141 { 4, 0x58, "RxUndersizePkts" },
142 { 4, 0x5c, "RxPausePkts" },
143 { 4, 0x60, "Pkts64Octets" },
144 { 4, 0x64, "Pkts65to127Octets" },
145 { 4, 0x68, "Pkts128to255Octets" },
146 { 4, 0x6c, "Pkts256to511Octets" },
147 { 4, 0x70, "Pkts512to1023Octets" },
148 { 4, 0x74, "Pkts1024to1522Octets" },
149 { 4, 0x78, "RxOversizePkts" },
150 { 4, 0x7c, "RxJabbers" },
151 { 4, 0x80, "RxAlignmentErrors" },
152 { 4, 0x84, "RxFCSErrors" },
153 { 8, 0x88, "RxGoodOctets" },
154 { 4, 0x90, "RxDropPkts" },
155 { 4, 0x94, "RxUnicastPkts" },
156 { 4, 0x98, "RxMulticastPkts" },
157 { 4, 0x9c, "RxBroadcastPkts" },
158 { 4, 0xa0, "RxSAChanges" },
159 { 4, 0xa4, "RxFragments" },
160 { 4, 0xa8, "RxJumboPkts" },
161 { 4, 0xac, "RxSymbolErrors" },
162 { 4, 0xc0, "RxDiscarded" },
166 static int b53_do_vlan_op(struct b53_device *dev, u8 op)
170 b53_write8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], VTA_START_CMD | op);
172 for (i = 0; i < 10; i++) {
175 b53_read8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], &vta);
176 if (!(vta & VTA_START_CMD))
179 usleep_range(100, 200);
185 static void b53_set_vlan_entry(struct b53_device *dev, u16 vid, u16 members,
192 entry = (untag << VA_UNTAG_S) | members | VA_VALID_25;
194 b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);
195 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
196 VTA_RW_STATE_WR | VTA_RW_OP_EN);
197 } else if (is5365(dev)) {
201 entry = (untag << VA_UNTAG_S) | members | VA_VALID_65;
203 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);
204 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
205 VTA_RW_STATE_WR | VTA_RW_OP_EN);
207 b53_write16(dev, B53_ARLIO_PAGE, dev->vta_regs[1], vid);
208 b53_write32(dev, B53_ARLIO_PAGE, dev->vta_regs[2],
209 (untag << VTE_UNTAG_S) | members);
211 b53_do_vlan_op(dev, VTA_CMD_WRITE);
215 void b53_set_forwarding(struct b53_device *dev, int enable)
219 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
222 mgmt |= SM_SW_FWD_EN;
224 mgmt &= ~SM_SW_FWD_EN;
226 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
229 static void b53_enable_vlan(struct b53_device *dev, int enable)
231 u8 mgmt, vc0, vc1, vc4 = 0, vc5;
233 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
234 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, &vc0);
235 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, &vc1);
237 if (is5325(dev) || is5365(dev)) {
238 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
239 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &vc5);
240 } else if (is63xx(dev)) {
241 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, &vc4);
242 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &vc5);
244 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, &vc4);
245 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
248 mgmt &= ~SM_SW_FWD_MODE;
251 vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;
252 vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;
253 vc4 &= ~VC4_ING_VID_CHECK_MASK;
254 vc4 |= VC4_ING_VID_VIO_DROP << VC4_ING_VID_CHECK_S;
255 vc5 |= VC5_DROP_VTABLE_MISS;
258 vc0 &= ~VC0_RESERVED_1;
260 if (is5325(dev) || is5365(dev))
261 vc1 |= VC1_RX_MCST_TAG_EN;
263 if (!is5325(dev) && !is5365(dev)) {
264 if (dev->allow_vid_4095)
265 vc5 |= VC5_VID_FFF_EN;
267 vc5 &= ~VC5_VID_FFF_EN;
270 vc0 &= ~(VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID);
271 vc1 &= ~(VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN);
272 vc4 &= ~VC4_ING_VID_CHECK_MASK;
273 vc5 &= ~VC5_DROP_VTABLE_MISS;
275 if (is5325(dev) || is5365(dev))
276 vc4 |= VC4_ING_VID_VIO_FWD << VC4_ING_VID_CHECK_S;
278 vc4 |= VC4_ING_VID_VIO_TO_IMP << VC4_ING_VID_CHECK_S;
280 if (is5325(dev) || is5365(dev))
281 vc1 &= ~VC1_RX_MCST_TAG_EN;
283 if (!is5325(dev) && !is5365(dev))
284 vc5 &= ~VC5_VID_FFF_EN;
287 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, vc0);
288 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, vc1);
290 if (is5325(dev) || is5365(dev)) {
291 /* enable the high 8 bit vid check on 5325 */
292 if (is5325(dev) && enable)
293 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3,
296 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
298 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, vc4);
299 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);
300 } else if (is63xx(dev)) {
301 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3_63XX, 0);
302 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, vc4);
303 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);
305 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
306 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, vc4);
307 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);
310 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
313 static int b53_set_jumbo(struct b53_device *dev, int enable, int allow_10_100)
316 u16 max_size = JMS_MIN_SIZE;
318 if (is5325(dev) || is5365(dev))
322 port_mask = dev->enabled_ports;
323 max_size = JMS_MAX_SIZE;
325 port_mask |= JPM_10_100_JUMBO_EN;
328 b53_write32(dev, B53_JUMBO_PAGE, dev->jumbo_pm_reg, port_mask);
329 return b53_write16(dev, B53_JUMBO_PAGE, dev->jumbo_size_reg, max_size);
332 static int b53_flush_arl(struct b53_device *dev)
336 b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
337 FAST_AGE_DONE | FAST_AGE_DYNAMIC | FAST_AGE_STATIC);
339 for (i = 0; i < 10; i++) {
342 b53_read8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
345 if (!(fast_age_ctrl & FAST_AGE_DONE))
351 pr_warn("time out while flushing ARL\n");
356 static void b53_enable_ports(struct b53_device *dev)
360 b53_for_each_port(dev, i) {
365 * prevent leaking packets between wan and lan in unmanaged
366 * mode through port vlans.
368 if (dev->enable_vlan || is_cpu_port(dev, i))
370 else if (is531x5(dev))
371 /* BCM53115 may use a different port as cpu port */
372 pvlan_mask = BIT(dev->sw_dev.cpu_port);
374 pvlan_mask = BIT(B53_CPU_PORT);
376 /* BCM5325 CPU port is at 8 */
377 if ((is5325(dev) || is5365(dev)) && i == B53_CPU_PORT_25)
380 if (dev->chip_id == BCM5398_DEVICE_ID && (i == 6 || i == 7))
381 /* disable unused ports 6 & 7 */
382 port_ctrl = PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;
383 else if (i == B53_CPU_PORT)
384 port_ctrl = PORT_CTRL_RX_BCST_EN |
385 PORT_CTRL_RX_MCST_EN |
386 PORT_CTRL_RX_UCST_EN;
390 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i),
393 /* port state is handled by bcm63xx_enet driver */
395 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(i),
400 static void b53_enable_mib(struct b53_device *dev)
404 b53_read8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, &gc);
406 gc &= ~(GC_RESET_MIB | GC_MIB_AC_EN);
408 b53_write8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, gc);
411 static int b53_apply(struct b53_device *dev)
415 /* clear all vlan entries */
416 if (is5325(dev) || is5365(dev)) {
417 for (i = 1; i < dev->sw_dev.vlans; i++)
418 b53_set_vlan_entry(dev, i, 0, 0);
420 b53_do_vlan_op(dev, VTA_CMD_CLEAR);
423 b53_enable_vlan(dev, dev->enable_vlan);
425 /* fill VLAN table */
426 if (dev->enable_vlan) {
427 for (i = 0; i < dev->sw_dev.vlans; i++) {
428 struct b53_vlan *vlan = &dev->vlans[i];
433 b53_set_vlan_entry(dev, i, vlan->members, vlan->untag);
436 b53_for_each_port(dev, i)
437 b53_write16(dev, B53_VLAN_PAGE,
438 B53_VLAN_PORT_DEF_TAG(i),
441 b53_for_each_port(dev, i)
442 b53_write16(dev, B53_VLAN_PAGE,
443 B53_VLAN_PORT_DEF_TAG(i), 1);
447 b53_enable_ports(dev);
449 if (!is5325(dev) && !is5365(dev))
450 b53_set_jumbo(dev, dev->enable_jumbo, 1);
455 void b53_switch_reset_gpio(struct b53_device *dev)
457 int gpio = dev->reset_gpio;
462 gpio_set_value(gpio, 0);
463 gpio_direction_output(gpio, 1);
464 gpio_set_value(gpio, 0);
467 gpio_set_value(gpio, 1);
470 dev->current_page = 0xff;
473 static int b53_switch_reset(struct b53_device *dev)
477 b53_switch_reset_gpio(dev);
479 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
481 if (!(mgmt & SM_SW_FWD_EN)) {
482 mgmt &= ~SM_SW_FWD_MODE;
483 mgmt |= SM_SW_FWD_EN;
485 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
486 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
488 if (!(mgmt & SM_SW_FWD_EN)) {
489 pr_err("Failed to enable switch!\n");
494 /* enable all ports */
495 b53_enable_ports(dev);
497 /* configure MII port if necessary */
499 u8 mii_port_override;
501 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
503 /* reverse mii needs to be enabled */
504 if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
505 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
506 mii_port_override | PORT_OVERRIDE_RV_MII_25);
507 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
510 if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
511 pr_err("Failed to enable reverse MII mode\n");
515 } else if (is531x5(dev) && dev->sw_dev.cpu_port == B53_CPU_PORT) {
516 u8 mii_port_override;
518 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
520 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
521 mii_port_override | PORT_OVERRIDE_EN |
527 return b53_flush_arl(dev);
531 * Swconfig glue functions
534 static int b53_global_get_vlan_enable(struct switch_dev *dev,
535 const struct switch_attr *attr,
536 struct switch_val *val)
538 struct b53_device *priv = sw_to_b53(dev);
540 val->value.i = priv->enable_vlan;
545 static int b53_global_set_vlan_enable(struct switch_dev *dev,
546 const struct switch_attr *attr,
547 struct switch_val *val)
549 struct b53_device *priv = sw_to_b53(dev);
551 priv->enable_vlan = val->value.i;
556 static int b53_global_get_jumbo_enable(struct switch_dev *dev,
557 const struct switch_attr *attr,
558 struct switch_val *val)
560 struct b53_device *priv = sw_to_b53(dev);
562 val->value.i = priv->enable_jumbo;
567 static int b53_global_set_jumbo_enable(struct switch_dev *dev,
568 const struct switch_attr *attr,
569 struct switch_val *val)
571 struct b53_device *priv = sw_to_b53(dev);
573 priv->enable_jumbo = val->value.i;
578 static int b53_global_get_4095_enable(struct switch_dev *dev,
579 const struct switch_attr *attr,
580 struct switch_val *val)
582 struct b53_device *priv = sw_to_b53(dev);
584 val->value.i = priv->allow_vid_4095;
589 static int b53_global_set_4095_enable(struct switch_dev *dev,
590 const struct switch_attr *attr,
591 struct switch_val *val)
593 struct b53_device *priv = sw_to_b53(dev);
595 priv->allow_vid_4095 = val->value.i;
600 static int b53_global_get_ports(struct switch_dev *dev,
601 const struct switch_attr *attr,
602 struct switch_val *val)
604 struct b53_device *priv = sw_to_b53(dev);
606 val->len = snprintf(priv->buf, B53_BUF_SIZE, "0x%04x",
607 priv->enabled_ports);
608 val->value.s = priv->buf;
613 static int b53_port_get_pvid(struct switch_dev *dev, int port, int *val)
615 struct b53_device *priv = sw_to_b53(dev);
617 *val = priv->ports[port].pvid;
622 static int b53_port_set_pvid(struct switch_dev *dev, int port, int val)
624 struct b53_device *priv = sw_to_b53(dev);
626 if (val > 15 && is5325(priv))
628 if (val == 4095 && !priv->allow_vid_4095)
631 priv->ports[port].pvid = val;
636 static int b53_vlan_get_ports(struct switch_dev *dev, struct switch_val *val)
638 struct b53_device *priv = sw_to_b53(dev);
639 struct switch_port *port = &val->value.ports[0];
640 struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
648 for (i = 0; i < dev->ports; i++) {
649 if (!(vlan->members & BIT(i)))
653 if (!(vlan->untag & BIT(i)))
654 port->flags = BIT(SWITCH_PORT_FLAG_TAGGED);
666 static int b53_vlan_set_ports(struct switch_dev *dev, struct switch_val *val)
668 struct b53_device *priv = sw_to_b53(dev);
669 struct switch_port *port;
670 struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
673 /* only BCM5325 and BCM5365 supports VID 0 */
674 if (val->port_vlan == 0 && !is5325(priv) && !is5365(priv))
677 /* VLAN 4095 needs special handling */
678 if (val->port_vlan == 4095 && !priv->allow_vid_4095)
681 port = &val->value.ports[0];
684 for (i = 0; i < val->len; i++, port++) {
685 vlan->members |= BIT(port->id);
687 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED))) {
688 vlan->untag |= BIT(port->id);
689 priv->ports[port->id].pvid = val->port_vlan;
693 /* ignore disabled ports */
694 vlan->members &= priv->enabled_ports;
695 vlan->untag &= priv->enabled_ports;
700 static int b53_port_get_link(struct switch_dev *dev, int port,
701 struct switch_port_link *link)
703 struct b53_device *priv = sw_to_b53(dev);
705 if (is_cpu_port(priv, port)) {
708 link->speed = is5325(priv) || is5365(priv) ?
709 SWITCH_PORT_SPEED_100 : SWITCH_PORT_SPEED_1000;
711 } else if (priv->enabled_ports & BIT(port)) {
715 b53_read16(priv, B53_STAT_PAGE, B53_LINK_STAT, &lnk);
716 b53_read16(priv, B53_STAT_PAGE, priv->duplex_reg, &duplex);
718 lnk = (lnk >> port) & 1;
719 duplex = (duplex >> port) & 1;
721 if (is5325(priv) || is5365(priv)) {
724 b53_read16(priv, B53_STAT_PAGE, B53_SPEED_STAT, &tmp);
725 speed = SPEED_PORT_FE(tmp, port);
727 b53_read32(priv, B53_STAT_PAGE, B53_SPEED_STAT, &speed);
728 speed = SPEED_PORT_GE(speed, port);
733 link->duplex = duplex;
736 link->speed = SWITCH_PORT_SPEED_10;
738 case SPEED_STAT_100M:
739 link->speed = SWITCH_PORT_SPEED_100;
741 case SPEED_STAT_1000M:
742 link->speed = SWITCH_PORT_SPEED_1000;
756 static int b53_global_reset_switch(struct switch_dev *dev)
758 struct b53_device *priv = sw_to_b53(dev);
761 priv->enable_vlan = 0;
762 priv->enable_jumbo = 0;
763 priv->allow_vid_4095 = 0;
765 memset(priv->vlans, 0, sizeof(priv->vlans) * dev->vlans);
766 memset(priv->ports, 0, sizeof(priv->ports) * dev->ports);
768 return b53_switch_reset(priv);
771 static int b53_global_apply_config(struct switch_dev *dev)
773 struct b53_device *priv = sw_to_b53(dev);
775 /* disable switching */
776 b53_set_forwarding(priv, 0);
780 /* enable switching */
781 b53_set_forwarding(priv, 1);
787 static int b53_global_reset_mib(struct switch_dev *dev,
788 const struct switch_attr *attr,
789 struct switch_val *val)
791 struct b53_device *priv = sw_to_b53(dev);
794 b53_read8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
796 b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc | GC_RESET_MIB);
798 b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc & ~GC_RESET_MIB);
804 static int b53_port_get_mib(struct switch_dev *sw_dev,
805 const struct switch_attr *attr,
806 struct switch_val *val)
808 struct b53_device *dev = sw_to_b53(sw_dev);
809 const struct b53_mib_desc *mibs;
810 int port = val->port_vlan;
813 if (!(BIT(port) & dev->enabled_ports))
821 } else if (is63xx(dev)) {
822 mibs = b53_mibs_63xx;
829 for (; mibs->size > 0; mibs++) {
832 if (mibs->size == 8) {
833 b53_read64(dev, B53_MIB_PAGE(port), mibs->offset, &val);
837 b53_read32(dev, B53_MIB_PAGE(port), mibs->offset,
842 len += snprintf(dev->buf + len, B53_BUF_SIZE - len,
843 "%-20s: %llu\n", mibs->name, val);
847 val->value.s = dev->buf;
852 static struct switch_attr b53_global_ops_25[] = {
854 .type = SWITCH_TYPE_INT,
855 .name = "enable_vlan",
856 .description = "Enable VLAN mode",
857 .set = b53_global_set_vlan_enable,
858 .get = b53_global_get_vlan_enable,
862 .type = SWITCH_TYPE_STRING,
864 .description = "Available ports (as bitmask)",
865 .get = b53_global_get_ports,
869 static struct switch_attr b53_global_ops_65[] = {
871 .type = SWITCH_TYPE_INT,
872 .name = "enable_vlan",
873 .description = "Enable VLAN mode",
874 .set = b53_global_set_vlan_enable,
875 .get = b53_global_get_vlan_enable,
879 .type = SWITCH_TYPE_STRING,
881 .description = "Available ports (as bitmask)",
882 .get = b53_global_get_ports,
885 .type = SWITCH_TYPE_INT,
887 .description = "Reset MIB counters",
888 .set = b53_global_reset_mib,
892 static struct switch_attr b53_global_ops[] = {
894 .type = SWITCH_TYPE_INT,
895 .name = "enable_vlan",
896 .description = "Enable VLAN mode",
897 .set = b53_global_set_vlan_enable,
898 .get = b53_global_get_vlan_enable,
902 .type = SWITCH_TYPE_STRING,
904 .description = "Available Ports (as bitmask)",
905 .get = b53_global_get_ports,
908 .type = SWITCH_TYPE_INT,
910 .description = "Reset MIB counters",
911 .set = b53_global_reset_mib,
914 .type = SWITCH_TYPE_INT,
915 .name = "enable_jumbo",
916 .description = "Enable Jumbo Frames",
917 .set = b53_global_set_jumbo_enable,
918 .get = b53_global_get_jumbo_enable,
922 .type = SWITCH_TYPE_INT,
923 .name = "allow_vid_4095",
924 .description = "Allow VID 4095",
925 .set = b53_global_set_4095_enable,
926 .get = b53_global_get_4095_enable,
931 static struct switch_attr b53_port_ops[] = {
933 .type = SWITCH_TYPE_STRING,
935 .description = "Get port's MIB counters",
936 .get = b53_port_get_mib,
940 static struct switch_attr b53_no_ops[] = {
943 static const struct switch_dev_ops b53_switch_ops_25 = {
945 .attr = b53_global_ops_25,
946 .n_attr = ARRAY_SIZE(b53_global_ops_25),
950 .n_attr = ARRAY_SIZE(b53_no_ops),
954 .n_attr = ARRAY_SIZE(b53_no_ops),
957 .get_vlan_ports = b53_vlan_get_ports,
958 .set_vlan_ports = b53_vlan_set_ports,
959 .get_port_pvid = b53_port_get_pvid,
960 .set_port_pvid = b53_port_set_pvid,
961 .apply_config = b53_global_apply_config,
962 .reset_switch = b53_global_reset_switch,
963 .get_port_link = b53_port_get_link,
966 static const struct switch_dev_ops b53_switch_ops_65 = {
968 .attr = b53_global_ops_65,
969 .n_attr = ARRAY_SIZE(b53_global_ops_65),
973 .n_attr = ARRAY_SIZE(b53_port_ops),
977 .n_attr = ARRAY_SIZE(b53_no_ops),
980 .get_vlan_ports = b53_vlan_get_ports,
981 .set_vlan_ports = b53_vlan_set_ports,
982 .get_port_pvid = b53_port_get_pvid,
983 .set_port_pvid = b53_port_set_pvid,
984 .apply_config = b53_global_apply_config,
985 .reset_switch = b53_global_reset_switch,
986 .get_port_link = b53_port_get_link,
989 static const struct switch_dev_ops b53_switch_ops = {
991 .attr = b53_global_ops,
992 .n_attr = ARRAY_SIZE(b53_global_ops),
995 .attr = b53_port_ops,
996 .n_attr = ARRAY_SIZE(b53_port_ops),
1000 .n_attr = ARRAY_SIZE(b53_no_ops),
1003 .get_vlan_ports = b53_vlan_get_ports,
1004 .set_vlan_ports = b53_vlan_set_ports,
1005 .get_port_pvid = b53_port_get_pvid,
1006 .set_port_pvid = b53_port_set_pvid,
1007 .apply_config = b53_global_apply_config,
1008 .reset_switch = b53_global_reset_switch,
1009 .get_port_link = b53_port_get_link,
1012 struct b53_chip_data {
1014 const char *dev_name;
1023 const struct switch_dev_ops *sw_ops;
1026 #define B53_VTA_REGS \
1027 { B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
1028 #define B53_VTA_REGS_9798 \
1029 { B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
1030 #define B53_VTA_REGS_63XX \
1031 { B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
1033 static const struct b53_chip_data b53_switch_chips[] = {
1035 .chip_id = BCM5325_DEVICE_ID,
1036 .dev_name = "BCM5325",
1039 .enabled_ports = 0x1f,
1040 .cpu_port = B53_CPU_PORT_25,
1041 .duplex_reg = B53_DUPLEX_STAT_FE,
1042 .sw_ops = &b53_switch_ops_25,
1045 .chip_id = BCM5365_DEVICE_ID,
1046 .dev_name = "BCM5365",
1049 .enabled_ports = 0x1f,
1050 .cpu_port = B53_CPU_PORT_25,
1051 .duplex_reg = B53_DUPLEX_STAT_FE,
1052 .sw_ops = &b53_switch_ops_65,
1055 .chip_id = BCM5395_DEVICE_ID,
1056 .dev_name = "BCM5395",
1059 .enabled_ports = 0x1f,
1060 .cpu_port = B53_CPU_PORT,
1061 .vta_regs = B53_VTA_REGS,
1062 .duplex_reg = B53_DUPLEX_STAT_GE,
1063 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1064 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1065 .sw_ops = &b53_switch_ops,
1068 .chip_id = BCM5397_DEVICE_ID,
1069 .dev_name = "BCM5397",
1072 .enabled_ports = 0x1f,
1073 .cpu_port = B53_CPU_PORT,
1074 .vta_regs = B53_VTA_REGS_9798,
1075 .duplex_reg = B53_DUPLEX_STAT_GE,
1076 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1077 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1078 .sw_ops = &b53_switch_ops,
1081 .chip_id = BCM5398_DEVICE_ID,
1082 .dev_name = "BCM5398",
1085 .enabled_ports = 0x7f,
1086 .cpu_port = B53_CPU_PORT,
1087 .vta_regs = B53_VTA_REGS_9798,
1088 .duplex_reg = B53_DUPLEX_STAT_GE,
1089 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1090 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1091 .sw_ops = &b53_switch_ops,
1094 .chip_id = BCM53115_DEVICE_ID,
1095 .dev_name = "BCM53115",
1096 .alias = "bcm53115",
1098 .enabled_ports = 0x1f,
1099 .vta_regs = B53_VTA_REGS,
1100 .cpu_port = B53_CPU_PORT,
1101 .duplex_reg = B53_DUPLEX_STAT_GE,
1102 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1103 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1104 .sw_ops = &b53_switch_ops,
1107 .chip_id = BCM53125_DEVICE_ID,
1108 .dev_name = "BCM53125",
1109 .alias = "bcm53125",
1111 .enabled_ports = 0x1f,
1112 .cpu_port = B53_CPU_PORT,
1113 .vta_regs = B53_VTA_REGS,
1114 .duplex_reg = B53_DUPLEX_STAT_GE,
1115 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1116 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1117 .sw_ops = &b53_switch_ops,
1120 .chip_id = BCM63XX_DEVICE_ID,
1121 .dev_name = "BCM63xx",
1124 .enabled_ports = 0, /* pdata must provide them */
1125 .cpu_port = B53_CPU_PORT,
1126 .vta_regs = B53_VTA_REGS_63XX,
1127 .duplex_reg = B53_DUPLEX_STAT_63XX,
1128 .jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
1129 .jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
1130 .sw_ops = &b53_switch_ops,
1134 int b53_switch_init(struct b53_device *dev)
1136 struct switch_dev *sw_dev = &dev->sw_dev;
1140 for (i = 0; i < ARRAY_SIZE(b53_switch_chips); i++) {
1141 const struct b53_chip_data *chip = &b53_switch_chips[i];
1143 if (chip->chip_id == dev->chip_id) {
1144 sw_dev->name = chip->dev_name;
1146 sw_dev->alias = chip->alias;
1147 if (!dev->enabled_ports)
1148 dev->enabled_ports = chip->enabled_ports;
1149 dev->duplex_reg = chip->duplex_reg;
1150 dev->vta_regs[0] = chip->vta_regs[0];
1151 dev->vta_regs[1] = chip->vta_regs[1];
1152 dev->vta_regs[2] = chip->vta_regs[2];
1153 dev->jumbo_pm_reg = chip->jumbo_pm_reg;
1154 sw_dev->ops = chip->sw_ops;
1155 sw_dev->cpu_port = chip->cpu_port;
1156 sw_dev->vlans = chip->vlans;
1164 /* check which BCM5325x version we have */
1168 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
1170 /* check reserved bits */
1176 /* BCM5325F - do not use port 4 */
1177 dev->enabled_ports &= ~BIT(4);
1180 /* On the BCM47XX SoCs this is the supported internal switch.*/
1181 #ifndef CONFIG_BCM47XX
1188 } else if (dev->chip_id == BCM53115_DEVICE_ID) {
1191 b53_read48(dev, B53_STAT_PAGE, B53_STRAP_VALUE, &strap_value);
1192 /* use second IMP port if GMII is enabled */
1193 if (strap_value & SV_GMII_CTRL_115)
1194 sw_dev->cpu_port = 5;
1197 /* cpu port is always last */
1198 sw_dev->ports = sw_dev->cpu_port + 1;
1199 dev->enabled_ports |= BIT(sw_dev->cpu_port);
1201 dev->ports = devm_kzalloc(dev->dev,
1202 sizeof(struct b53_port) * sw_dev->ports,
1207 dev->vlans = devm_kzalloc(dev->dev,
1208 sizeof(struct b53_vlan) * sw_dev->vlans,
1213 dev->buf = devm_kzalloc(dev->dev, B53_BUF_SIZE, GFP_KERNEL);
1217 dev->reset_gpio = b53_switch_get_reset_gpio(dev);
1218 if (dev->reset_gpio >= 0) {
1219 ret = devm_gpio_request(dev->dev, dev->reset_gpio, "robo_reset");
1224 return b53_switch_reset(dev);
1227 struct b53_device *b53_switch_alloc(struct device *base, struct b53_io_ops *ops,
1230 struct b53_device *dev;
1232 dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
1239 mutex_init(&dev->reg_mutex);
1243 EXPORT_SYMBOL(b53_switch_alloc);
1245 int b53_switch_detect(struct b53_device *dev)
1252 ret = b53_read8(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id8);
1259 * BCM5325 and BCM5365 do not have this register so reads
1260 * return 0. But the read operation did succeed, so assume
1261 * this is one of them.
1263 * Next check if we can write to the 5325's VTA register; for
1264 * 5365 it is read only.
1267 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);
1268 b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &tmp);
1271 dev->chip_id = BCM5325_DEVICE_ID;
1273 dev->chip_id = BCM5365_DEVICE_ID;
1275 case BCM5395_DEVICE_ID:
1276 case BCM5397_DEVICE_ID:
1277 case BCM5398_DEVICE_ID:
1281 ret = b53_read32(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id32);
1286 case BCM53115_DEVICE_ID:
1287 case BCM53125_DEVICE_ID:
1288 dev->chip_id = id32;
1291 pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
1297 return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID, &dev->core_rev);
1299 EXPORT_SYMBOL(b53_switch_detect);
1301 int b53_switch_register(struct b53_device *dev)
1306 dev->chip_id = dev->pdata->chip_id;
1307 dev->enabled_ports = dev->pdata->enabled_ports;
1308 dev->sw_dev.alias = dev->pdata->alias;
1311 if (!dev->chip_id && b53_switch_detect(dev))
1314 ret = b53_switch_init(dev);
1318 pr_info("found switch: %s, rev %i\n", dev->sw_dev.name, dev->core_rev);
1320 return register_switch(&dev->sw_dev, NULL);
1322 EXPORT_SYMBOL(b53_switch_register);
1324 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
1325 MODULE_DESCRIPTION("B53 switch library");
1326 MODULE_LICENSE("Dual BSD/GPL");