kernel: b53: add support for GPIO reset
[lede.git] / target / linux / generic / files / drivers / net / phy / b53 / b53_common.c
1 /*
2  * B53 switch driver main logic
3  *
4  * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
5  *
6  * Permission to use, copy, modify, and/or distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21 #include <linux/delay.h>
22 #include <linux/export.h>
23 #include <linux/gpio.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/switch.h>
27 #include <linux/platform_data/b53.h>
28
29 #include "b53_regs.h"
30 #include "b53_priv.h"
31
32 /* buffer size needed for displaying all MIBs with max'd values */
33 #define B53_BUF_SIZE    1188
34
35 struct b53_mib_desc {
36         u8 size;
37         u8 offset;
38         const char *name;
39 };
40
41
42 /* BCM5365 MIB counters */
43 static const struct b53_mib_desc b53_mibs_65[] = {
44         { 8, 0x00, "TxOctets" },
45         { 4, 0x08, "TxDropPkts" },
46         { 4, 0x10, "TxBroadcastPkts" },
47         { 4, 0x14, "TxMulticastPkts" },
48         { 4, 0x18, "TxUnicastPkts" },
49         { 4, 0x1c, "TxCollisions" },
50         { 4, 0x20, "TxSingleCollision" },
51         { 4, 0x24, "TxMultipleCollision" },
52         { 4, 0x28, "TxDeferredTransmit" },
53         { 4, 0x2c, "TxLateCollision" },
54         { 4, 0x30, "TxExcessiveCollision" },
55         { 4, 0x38, "TxPausePkts" },
56         { 8, 0x44, "RxOctets" },
57         { 4, 0x4c, "RxUndersizePkts" },
58         { 4, 0x50, "RxPausePkts" },
59         { 4, 0x54, "Pkts64Octets" },
60         { 4, 0x58, "Pkts65to127Octets" },
61         { 4, 0x5c, "Pkts128to255Octets" },
62         { 4, 0x60, "Pkts256to511Octets" },
63         { 4, 0x64, "Pkts512to1023Octets" },
64         { 4, 0x68, "Pkts1024to1522Octets" },
65         { 4, 0x6c, "RxOversizePkts" },
66         { 4, 0x70, "RxJabbers" },
67         { 4, 0x74, "RxAlignmentErrors" },
68         { 4, 0x78, "RxFCSErrors" },
69         { 8, 0x7c, "RxGoodOctets" },
70         { 4, 0x84, "RxDropPkts" },
71         { 4, 0x88, "RxUnicastPkts" },
72         { 4, 0x8c, "RxMulticastPkts" },
73         { 4, 0x90, "RxBroadcastPkts" },
74         { 4, 0x94, "RxSAChanges" },
75         { 4, 0x98, "RxFragments" },
76         { },
77 };
78
79 /* BCM63xx MIB counters */
80 static const struct b53_mib_desc b53_mibs_63xx[] = {
81         { 8, 0x00, "TxOctets" },
82         { 4, 0x08, "TxDropPkts" },
83         { 4, 0x0c, "TxQoSPkts" },
84         { 4, 0x10, "TxBroadcastPkts" },
85         { 4, 0x14, "TxMulticastPkts" },
86         { 4, 0x18, "TxUnicastPkts" },
87         { 4, 0x1c, "TxCollisions" },
88         { 4, 0x20, "TxSingleCollision" },
89         { 4, 0x24, "TxMultipleCollision" },
90         { 4, 0x28, "TxDeferredTransmit" },
91         { 4, 0x2c, "TxLateCollision" },
92         { 4, 0x30, "TxExcessiveCollision" },
93         { 4, 0x38, "TxPausePkts" },
94         { 8, 0x3c, "TxQoSOctets" },
95         { 8, 0x44, "RxOctets" },
96         { 4, 0x4c, "RxUndersizePkts" },
97         { 4, 0x50, "RxPausePkts" },
98         { 4, 0x54, "Pkts64Octets" },
99         { 4, 0x58, "Pkts65to127Octets" },
100         { 4, 0x5c, "Pkts128to255Octets" },
101         { 4, 0x60, "Pkts256to511Octets" },
102         { 4, 0x64, "Pkts512to1023Octets" },
103         { 4, 0x68, "Pkts1024to1522Octets" },
104         { 4, 0x6c, "RxOversizePkts" },
105         { 4, 0x70, "RxJabbers" },
106         { 4, 0x74, "RxAlignmentErrors" },
107         { 4, 0x78, "RxFCSErrors" },
108         { 8, 0x7c, "RxGoodOctets" },
109         { 4, 0x84, "RxDropPkts" },
110         { 4, 0x88, "RxUnicastPkts" },
111         { 4, 0x8c, "RxMulticastPkts" },
112         { 4, 0x90, "RxBroadcastPkts" },
113         { 4, 0x94, "RxSAChanges" },
114         { 4, 0x98, "RxFragments" },
115         { 4, 0xa0, "RxSymbolErrors" },
116         { 4, 0xa4, "RxQoSPkts" },
117         { 8, 0xa8, "RxQoSOctets" },
118         { 4, 0xb0, "Pkts1523to2047Octets" },
119         { 4, 0xb4, "Pkts2048to4095Octets" },
120         { 4, 0xb8, "Pkts4096to8191Octets" },
121         { 4, 0xbc, "Pkts8192to9728Octets" },
122         { 4, 0xc0, "RxDiscarded" },
123         { }
124 };
125
126 /* MIB counters */
127 static const struct b53_mib_desc b53_mibs[] = {
128         { 8, 0x00, "TxOctets" },
129         { 4, 0x08, "TxDropPkts" },
130         { 4, 0x10, "TxBroadcastPkts" },
131         { 4, 0x14, "TxMulticastPkts" },
132         { 4, 0x18, "TxUnicastPkts" },
133         { 4, 0x1c, "TxCollisions" },
134         { 4, 0x20, "TxSingleCollision" },
135         { 4, 0x24, "TxMultipleCollision" },
136         { 4, 0x28, "TxDeferredTransmit" },
137         { 4, 0x2c, "TxLateCollision" },
138         { 4, 0x30, "TxExcessiveCollision" },
139         { 4, 0x38, "TxPausePkts" },
140         { 8, 0x50, "RxOctets" },
141         { 4, 0x58, "RxUndersizePkts" },
142         { 4, 0x5c, "RxPausePkts" },
143         { 4, 0x60, "Pkts64Octets" },
144         { 4, 0x64, "Pkts65to127Octets" },
145         { 4, 0x68, "Pkts128to255Octets" },
146         { 4, 0x6c, "Pkts256to511Octets" },
147         { 4, 0x70, "Pkts512to1023Octets" },
148         { 4, 0x74, "Pkts1024to1522Octets" },
149         { 4, 0x78, "RxOversizePkts" },
150         { 4, 0x7c, "RxJabbers" },
151         { 4, 0x80, "RxAlignmentErrors" },
152         { 4, 0x84, "RxFCSErrors" },
153         { 8, 0x88, "RxGoodOctets" },
154         { 4, 0x90, "RxDropPkts" },
155         { 4, 0x94, "RxUnicastPkts" },
156         { 4, 0x98, "RxMulticastPkts" },
157         { 4, 0x9c, "RxBroadcastPkts" },
158         { 4, 0xa0, "RxSAChanges" },
159         { 4, 0xa4, "RxFragments" },
160         { 4, 0xa8, "RxJumboPkts" },
161         { 4, 0xac, "RxSymbolErrors" },
162         { 4, 0xc0, "RxDiscarded" },
163         { }
164 };
165
166 static int b53_do_vlan_op(struct b53_device *dev, u8 op)
167 {
168         unsigned int i;
169
170         b53_write8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], VTA_START_CMD | op);
171
172         for (i = 0; i < 10; i++) {
173                 u8 vta;
174
175                 b53_read8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], &vta);
176                 if (!(vta & VTA_START_CMD))
177                         return 0;
178
179                 usleep_range(100, 200);
180         }
181
182         return -EIO;
183 }
184
185 static void b53_set_vlan_entry(struct b53_device *dev, u16 vid, u16 members,
186                                u16 untag)
187 {
188         if (is5325(dev)) {
189                 u32 entry = 0;
190
191                 if (members)
192                         entry = (untag << VA_UNTAG_S) | members | VA_VALID_25;
193
194                 b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);
195                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
196                             VTA_RW_STATE_WR | VTA_RW_OP_EN);
197         } else if (is5365(dev)) {
198                 u16 entry = 0;
199
200                 if (members)
201                         entry = (untag << VA_UNTAG_S) | members | VA_VALID_65;
202
203                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);
204                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
205                             VTA_RW_STATE_WR | VTA_RW_OP_EN);
206         } else {
207                 b53_write16(dev, B53_ARLIO_PAGE, dev->vta_regs[1], vid);
208                 b53_write32(dev, B53_ARLIO_PAGE, dev->vta_regs[2],
209                             (untag << VTE_UNTAG_S) | members);
210
211                 b53_do_vlan_op(dev, VTA_CMD_WRITE);
212         }
213 }
214
215 void b53_set_forwarding(struct b53_device *dev, int enable)
216 {
217         u8 mgmt;
218
219         b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
220
221         if (enable)
222                 mgmt |= SM_SW_FWD_EN;
223         else
224                 mgmt &= ~SM_SW_FWD_EN;
225
226         b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
227 }
228
229 static void b53_enable_vlan(struct b53_device *dev, int enable)
230 {
231         u8 mgmt, vc0, vc1, vc4 = 0, vc5;
232
233         b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
234         b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, &vc0);
235         b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, &vc1);
236
237         if (is5325(dev) || is5365(dev)) {
238                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
239                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &vc5);
240         } else if (is63xx(dev)) {
241                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, &vc4);
242                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &vc5);
243         } else {
244                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, &vc4);
245                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
246         }
247
248         mgmt &= ~SM_SW_FWD_MODE;
249
250         if (enable) {
251                 vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;
252                 vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;
253                 vc4 &= ~VC4_ING_VID_CHECK_MASK;
254                 vc4 |= VC4_ING_VID_VIO_DROP << VC4_ING_VID_CHECK_S;
255                 vc5 |= VC5_DROP_VTABLE_MISS;
256
257                 if (is5325(dev))
258                         vc0 &= ~VC0_RESERVED_1;
259
260                 if (is5325(dev) || is5365(dev))
261                         vc1 |= VC1_RX_MCST_TAG_EN;
262
263                 if (!is5325(dev) && !is5365(dev)) {
264                         if (dev->allow_vid_4095)
265                                 vc5 |= VC5_VID_FFF_EN;
266                         else
267                                 vc5 &= ~VC5_VID_FFF_EN;
268                 }
269         } else {
270                 vc0 &= ~(VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID);
271                 vc1 &= ~(VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN);
272                 vc4 &= ~VC4_ING_VID_CHECK_MASK;
273                 vc5 &= ~VC5_DROP_VTABLE_MISS;
274
275                 if (is5325(dev) || is5365(dev))
276                         vc4 |= VC4_ING_VID_VIO_FWD << VC4_ING_VID_CHECK_S;
277                 else
278                         vc4 |= VC4_ING_VID_VIO_TO_IMP << VC4_ING_VID_CHECK_S;
279
280                 if (is5325(dev) || is5365(dev))
281                         vc1 &= ~VC1_RX_MCST_TAG_EN;
282
283                 if (!is5325(dev) && !is5365(dev))
284                         vc5 &= ~VC5_VID_FFF_EN;
285         }
286
287         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, vc0);
288         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, vc1);
289
290         if (is5325(dev) || is5365(dev)) {
291                 /* enable the high 8 bit vid check on 5325 */
292                 if (is5325(dev) && enable)
293                         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3,
294                                    VC3_HIGH_8BIT_EN);
295                 else
296                         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
297
298                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, vc4);
299                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);
300         } else if (is63xx(dev)) {
301                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3_63XX, 0);
302                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, vc4);
303                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);
304         } else {
305                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
306                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, vc4);
307                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);
308         }
309
310         b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
311 }
312
313 static int b53_set_jumbo(struct b53_device *dev, int enable, int allow_10_100)
314 {
315         u32 port_mask = 0;
316         u16 max_size = JMS_MIN_SIZE;
317
318         if (is5325(dev) || is5365(dev))
319                 return -EINVAL;
320
321         if (enable) {
322                 port_mask = dev->enabled_ports;
323                 max_size = JMS_MAX_SIZE;
324                 if (allow_10_100)
325                         port_mask |= JPM_10_100_JUMBO_EN;
326         }
327
328         b53_write32(dev, B53_JUMBO_PAGE, dev->jumbo_pm_reg, port_mask);
329         return b53_write16(dev, B53_JUMBO_PAGE, dev->jumbo_size_reg, max_size);
330 }
331
332 static int b53_flush_arl(struct b53_device *dev)
333 {
334         unsigned int i;
335
336         b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
337                    FAST_AGE_DONE | FAST_AGE_DYNAMIC | FAST_AGE_STATIC);
338
339         for (i = 0; i < 10; i++) {
340                 u8 fast_age_ctrl;
341
342                 b53_read8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
343                           &fast_age_ctrl);
344
345                 if (!(fast_age_ctrl & FAST_AGE_DONE))
346                         return 0;
347
348                 mdelay(1);
349         }
350
351         pr_warn("time out while flushing ARL\n");
352
353         return -EINVAL;
354 }
355
356 static void b53_enable_ports(struct b53_device *dev)
357 {
358         unsigned i;
359
360         b53_for_each_port(dev, i) {
361                 u8 port_ctrl;
362                 u16 pvlan_mask;
363
364                 /*
365                  * prevent leaking packets between wan and lan in unmanaged
366                  * mode through port vlans.
367                  */
368                 if (dev->enable_vlan || is_cpu_port(dev, i))
369                         pvlan_mask = 0x1ff;
370                 else if (is531x5(dev))
371                         /* BCM53115 may use a different port as cpu port */
372                         pvlan_mask = BIT(dev->sw_dev.cpu_port);
373                 else
374                         pvlan_mask = BIT(B53_CPU_PORT);
375
376                 /* BCM5325 CPU port is at 8 */
377                 if ((is5325(dev) || is5365(dev)) && i == B53_CPU_PORT_25)
378                         i = B53_CPU_PORT;
379
380                 if (dev->chip_id == BCM5398_DEVICE_ID && (i == 6 || i == 7))
381                         /* disable unused ports 6 & 7 */
382                         port_ctrl = PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;
383                 else if (i == B53_CPU_PORT)
384                         port_ctrl = PORT_CTRL_RX_BCST_EN |
385                                     PORT_CTRL_RX_MCST_EN |
386                                     PORT_CTRL_RX_UCST_EN;
387                 else
388                         port_ctrl = 0;
389
390                 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i),
391                             pvlan_mask);
392
393                 /* port state is handled by bcm63xx_enet driver */
394                 if (!is63xx(dev))
395                         b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(i),
396                                    port_ctrl);
397         }
398 }
399
400 static void b53_enable_mib(struct b53_device *dev)
401 {
402         u8 gc;
403
404         b53_read8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, &gc);
405
406         gc &= ~(GC_RESET_MIB | GC_MIB_AC_EN);
407
408         b53_write8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, gc);
409 }
410
411 static int b53_apply(struct b53_device *dev)
412 {
413         int i;
414
415         /* clear all vlan entries */
416         if (is5325(dev) || is5365(dev)) {
417                 for (i = 1; i < dev->sw_dev.vlans; i++)
418                         b53_set_vlan_entry(dev, i, 0, 0);
419         } else {
420                 b53_do_vlan_op(dev, VTA_CMD_CLEAR);
421         }
422
423         b53_enable_vlan(dev, dev->enable_vlan);
424
425         /* fill VLAN table */
426         if (dev->enable_vlan) {
427                 for (i = 0; i < dev->sw_dev.vlans; i++) {
428                         struct b53_vlan *vlan = &dev->vlans[i];
429
430                         if (!vlan->members)
431                                 continue;
432
433                         b53_set_vlan_entry(dev, i, vlan->members, vlan->untag);
434                 }
435
436                 b53_for_each_port(dev, i)
437                         b53_write16(dev, B53_VLAN_PAGE,
438                                     B53_VLAN_PORT_DEF_TAG(i),
439                                     dev->ports[i].pvid);
440         } else {
441                 b53_for_each_port(dev, i)
442                         b53_write16(dev, B53_VLAN_PAGE,
443                                     B53_VLAN_PORT_DEF_TAG(i), 1);
444
445         }
446
447         b53_enable_ports(dev);
448
449         if (!is5325(dev) && !is5365(dev))
450                 b53_set_jumbo(dev, dev->enable_jumbo, 1);
451
452         return 0;
453 }
454
455 void b53_switch_reset_gpio(struct b53_device *dev)
456 {
457         int gpio = dev->reset_gpio;
458
459         if (gpio < 0)
460                 return;
461
462         gpio_set_value(gpio, 0);
463         gpio_direction_output(gpio, 1);
464         gpio_set_value(gpio, 0);
465         mdelay(50);
466
467         gpio_set_value(gpio, 1);
468         mdelay(20);
469
470         dev->current_page = 0xff;
471 }
472
473 static int b53_switch_reset(struct b53_device *dev)
474 {
475         u8 mgmt;
476
477         b53_switch_reset_gpio(dev);
478
479         b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
480
481         if (!(mgmt & SM_SW_FWD_EN)) {
482                 mgmt &= ~SM_SW_FWD_MODE;
483                 mgmt |= SM_SW_FWD_EN;
484
485                 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
486                 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
487
488                 if (!(mgmt & SM_SW_FWD_EN)) {
489                         pr_err("Failed to enable switch!\n");
490                         return -EINVAL;
491                 }
492         }
493
494         /* enable all ports */
495         b53_enable_ports(dev);
496
497         /* configure MII port if necessary */
498         if (is5325(dev)) {
499                 u8 mii_port_override;
500
501                 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
502                           &mii_port_override);
503                 /* reverse mii needs to be enabled */
504                 if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
505                         b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
506                                    mii_port_override | PORT_OVERRIDE_RV_MII_25);
507                         b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
508                                   &mii_port_override);
509
510                         if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
511                                 pr_err("Failed to enable reverse MII mode\n");
512                                 return -EINVAL;
513                         }
514                 }
515         } else if (is531x5(dev) && dev->sw_dev.cpu_port == B53_CPU_PORT) {
516                 u8 mii_port_override;
517
518                 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
519                           &mii_port_override);
520                 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
521                            mii_port_override | PORT_OVERRIDE_EN |
522                            PORT_OVERRIDE_LINK);
523         }
524
525         b53_enable_mib(dev);
526
527         return b53_flush_arl(dev);
528 }
529
530 /*
531  * Swconfig glue functions
532  */
533
534 static int b53_global_get_vlan_enable(struct switch_dev *dev,
535                                       const struct switch_attr *attr,
536                                       struct switch_val *val)
537 {
538         struct b53_device *priv = sw_to_b53(dev);
539
540         val->value.i = priv->enable_vlan;
541
542         return 0;
543 }
544
545 static int b53_global_set_vlan_enable(struct switch_dev *dev,
546                                       const struct switch_attr *attr,
547                                       struct switch_val *val)
548 {
549         struct b53_device *priv = sw_to_b53(dev);
550
551         priv->enable_vlan = val->value.i;
552
553         return 0;
554 }
555
556 static int b53_global_get_jumbo_enable(struct switch_dev *dev,
557                                        const struct switch_attr *attr,
558                                        struct switch_val *val)
559 {
560         struct b53_device *priv = sw_to_b53(dev);
561
562         val->value.i = priv->enable_jumbo;
563
564         return 0;
565 }
566
567 static int b53_global_set_jumbo_enable(struct switch_dev *dev,
568                                        const struct switch_attr *attr,
569                                        struct switch_val *val)
570 {
571         struct b53_device *priv = sw_to_b53(dev);
572
573         priv->enable_jumbo = val->value.i;
574
575         return 0;
576 }
577
578 static int b53_global_get_4095_enable(struct switch_dev *dev,
579                                       const struct switch_attr *attr,
580                                       struct switch_val *val)
581 {
582         struct b53_device *priv = sw_to_b53(dev);
583
584         val->value.i = priv->allow_vid_4095;
585
586         return 0;
587 }
588
589 static int b53_global_set_4095_enable(struct switch_dev *dev,
590                                       const struct switch_attr *attr,
591                                       struct switch_val *val)
592 {
593         struct b53_device *priv = sw_to_b53(dev);
594
595         priv->allow_vid_4095 = val->value.i;
596
597         return 0;
598 }
599
600 static int b53_global_get_ports(struct switch_dev *dev,
601                                 const struct switch_attr *attr,
602                                 struct switch_val *val)
603 {
604         struct b53_device *priv = sw_to_b53(dev);
605
606         val->len = snprintf(priv->buf, B53_BUF_SIZE, "0x%04x",
607                             priv->enabled_ports);
608         val->value.s = priv->buf;
609
610         return 0;
611 }
612
613 static int b53_port_get_pvid(struct switch_dev *dev, int port, int *val)
614 {
615         struct b53_device *priv = sw_to_b53(dev);
616
617         *val = priv->ports[port].pvid;
618
619         return 0;
620 }
621
622 static int b53_port_set_pvid(struct switch_dev *dev, int port, int val)
623 {
624         struct b53_device *priv = sw_to_b53(dev);
625
626         if (val > 15 && is5325(priv))
627                 return -EINVAL;
628         if (val == 4095 && !priv->allow_vid_4095)
629                 return -EINVAL;
630
631         priv->ports[port].pvid = val;
632
633         return 0;
634 }
635
636 static int b53_vlan_get_ports(struct switch_dev *dev, struct switch_val *val)
637 {
638         struct b53_device *priv = sw_to_b53(dev);
639         struct switch_port *port = &val->value.ports[0];
640         struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
641         int i;
642
643         val->len = 0;
644
645         if (!vlan->members)
646                 return 0;
647
648         for (i = 0; i < dev->ports; i++) {
649                 if (!(vlan->members & BIT(i)))
650                         continue;
651
652
653                 if (!(vlan->untag & BIT(i)))
654                         port->flags = BIT(SWITCH_PORT_FLAG_TAGGED);
655                 else
656                         port->flags = 0;
657
658                 port->id = i;
659                 val->len++;
660                 port++;
661         }
662
663         return 0;
664 }
665
666 static int b53_vlan_set_ports(struct switch_dev *dev, struct switch_val *val)
667 {
668         struct b53_device *priv = sw_to_b53(dev);
669         struct switch_port *port;
670         struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
671         int i;
672
673         /* only BCM5325 and BCM5365 supports VID 0 */
674         if (val->port_vlan == 0 && !is5325(priv) && !is5365(priv))
675                 return -EINVAL;
676
677         /* VLAN 4095 needs special handling */
678         if (val->port_vlan == 4095 && !priv->allow_vid_4095)
679                 return -EINVAL;
680
681         port = &val->value.ports[0];
682         vlan->members = 0;
683         vlan->untag = 0;
684         for (i = 0; i < val->len; i++, port++) {
685                 vlan->members |= BIT(port->id);
686
687                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED))) {
688                         vlan->untag |= BIT(port->id);
689                         priv->ports[port->id].pvid = val->port_vlan;
690                 };
691         }
692
693         /* ignore disabled ports */
694         vlan->members &= priv->enabled_ports;
695         vlan->untag &= priv->enabled_ports;
696
697         return 0;
698 }
699
700 static int b53_port_get_link(struct switch_dev *dev, int port,
701                              struct switch_port_link *link)
702 {
703         struct b53_device *priv = sw_to_b53(dev);
704
705         if (is_cpu_port(priv, port)) {
706                 link->link = 1;
707                 link->duplex = 1;
708                 link->speed = is5325(priv) || is5365(priv) ?
709                                 SWITCH_PORT_SPEED_100 : SWITCH_PORT_SPEED_1000;
710                 link->aneg = 0;
711         } else if (priv->enabled_ports & BIT(port)) {
712                 u32 speed;
713                 u16 lnk, duplex;
714
715                 b53_read16(priv, B53_STAT_PAGE, B53_LINK_STAT, &lnk);
716                 b53_read16(priv, B53_STAT_PAGE, priv->duplex_reg, &duplex);
717
718                 lnk = (lnk >> port) & 1;
719                 duplex = (duplex >> port) & 1;
720
721                 if (is5325(priv) || is5365(priv)) {
722                         u16 tmp;
723
724                         b53_read16(priv, B53_STAT_PAGE, B53_SPEED_STAT, &tmp);
725                         speed = SPEED_PORT_FE(tmp, port);
726                 } else {
727                         b53_read32(priv, B53_STAT_PAGE, B53_SPEED_STAT, &speed);
728                         speed = SPEED_PORT_GE(speed, port);
729                 }
730
731                 link->link = lnk;
732                 if (lnk) {
733                         link->duplex = duplex;
734                         switch (speed) {
735                         case SPEED_STAT_10M:
736                                 link->speed = SWITCH_PORT_SPEED_10;
737                                 break;
738                         case SPEED_STAT_100M:
739                                 link->speed = SWITCH_PORT_SPEED_100;
740                                 break;
741                         case SPEED_STAT_1000M:
742                                 link->speed = SWITCH_PORT_SPEED_1000;
743                                 break;
744                         }
745                 }
746
747                 link->aneg = 1;
748         } else {
749                 link->link = 0;
750         }
751
752         return 0;
753
754 }
755
756 static int b53_global_reset_switch(struct switch_dev *dev)
757 {
758         struct b53_device *priv = sw_to_b53(dev);
759
760         /* reset vlans */
761         priv->enable_vlan = 0;
762         priv->enable_jumbo = 0;
763         priv->allow_vid_4095 = 0;
764
765         memset(priv->vlans, 0, sizeof(priv->vlans) * dev->vlans);
766         memset(priv->ports, 0, sizeof(priv->ports) * dev->ports);
767
768         return b53_switch_reset(priv);
769 }
770
771 static int b53_global_apply_config(struct switch_dev *dev)
772 {
773         struct b53_device *priv = sw_to_b53(dev);
774
775         /* disable switching */
776         b53_set_forwarding(priv, 0);
777
778         b53_apply(priv);
779
780         /* enable switching */
781         b53_set_forwarding(priv, 1);
782
783         return 0;
784 }
785
786
787 static int b53_global_reset_mib(struct switch_dev *dev,
788                                 const struct switch_attr *attr,
789                                 struct switch_val *val)
790 {
791         struct b53_device *priv = sw_to_b53(dev);
792         u8 gc;
793
794         b53_read8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
795
796         b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc | GC_RESET_MIB);
797         mdelay(1);
798         b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc & ~GC_RESET_MIB);
799         mdelay(1);
800
801         return 0;
802 }
803
804 static int b53_port_get_mib(struct switch_dev *sw_dev,
805                             const struct switch_attr *attr,
806                             struct switch_val *val)
807 {
808         struct b53_device *dev = sw_to_b53(sw_dev);
809         const struct b53_mib_desc *mibs;
810         int port = val->port_vlan;
811         int len = 0;
812
813         if (!(BIT(port) & dev->enabled_ports))
814                 return -1;
815
816         if (is5365(dev)) {
817                 if (port == 5)
818                         port = 8;
819
820                 mibs = b53_mibs_65;
821         } else if (is63xx(dev)) {
822                 mibs = b53_mibs_63xx;
823         } else {
824                 mibs = b53_mibs;
825         }
826
827         dev->buf[0] = 0;
828
829         for (; mibs->size > 0; mibs++) {
830                 u64 val;
831
832                 if (mibs->size == 8) {
833                         b53_read64(dev, B53_MIB_PAGE(port), mibs->offset, &val);
834                 } else {
835                         u32 val32;
836
837                         b53_read32(dev, B53_MIB_PAGE(port), mibs->offset,
838                                    &val32);
839                         val = val32;
840                 }
841
842                 len += snprintf(dev->buf + len, B53_BUF_SIZE - len,
843                                 "%-20s: %llu\n", mibs->name, val);
844         }
845
846         val->len = len;
847         val->value.s = dev->buf;
848
849         return 0;
850 }
851
852 static struct switch_attr b53_global_ops_25[] = {
853         {
854                 .type = SWITCH_TYPE_INT,
855                 .name = "enable_vlan",
856                 .description = "Enable VLAN mode",
857                 .set = b53_global_set_vlan_enable,
858                 .get = b53_global_get_vlan_enable,
859                 .max = 1,
860         },
861         {
862                 .type = SWITCH_TYPE_STRING,
863                 .name = "ports",
864                 .description = "Available ports (as bitmask)",
865                 .get = b53_global_get_ports,
866         },
867 };
868
869 static struct switch_attr b53_global_ops_65[] = {
870         {
871                 .type = SWITCH_TYPE_INT,
872                 .name = "enable_vlan",
873                 .description = "Enable VLAN mode",
874                 .set = b53_global_set_vlan_enable,
875                 .get = b53_global_get_vlan_enable,
876                 .max = 1,
877         },
878         {
879                 .type = SWITCH_TYPE_STRING,
880                 .name = "ports",
881                 .description = "Available ports (as bitmask)",
882                 .get = b53_global_get_ports,
883         },
884         {
885                 .type = SWITCH_TYPE_INT,
886                 .name = "reset_mib",
887                 .description = "Reset MIB counters",
888                 .set = b53_global_reset_mib,
889         },
890 };
891
892 static struct switch_attr b53_global_ops[] = {
893         {
894                 .type = SWITCH_TYPE_INT,
895                 .name = "enable_vlan",
896                 .description = "Enable VLAN mode",
897                 .set = b53_global_set_vlan_enable,
898                 .get = b53_global_get_vlan_enable,
899                 .max = 1,
900         },
901         {
902                 .type = SWITCH_TYPE_STRING,
903                 .name = "ports",
904                 .description = "Available Ports (as bitmask)",
905                 .get = b53_global_get_ports,
906         },
907         {
908                 .type = SWITCH_TYPE_INT,
909                 .name = "reset_mib",
910                 .description = "Reset MIB counters",
911                 .set = b53_global_reset_mib,
912         },
913         {
914                 .type = SWITCH_TYPE_INT,
915                 .name = "enable_jumbo",
916                 .description = "Enable Jumbo Frames",
917                 .set = b53_global_set_jumbo_enable,
918                 .get = b53_global_get_jumbo_enable,
919                 .max = 1,
920         },
921         {
922                 .type = SWITCH_TYPE_INT,
923                 .name = "allow_vid_4095",
924                 .description = "Allow VID 4095",
925                 .set = b53_global_set_4095_enable,
926                 .get = b53_global_get_4095_enable,
927                 .max = 1,
928         },
929 };
930
931 static struct switch_attr b53_port_ops[] = {
932         {
933                 .type = SWITCH_TYPE_STRING,
934                 .name = "mib",
935                 .description = "Get port's MIB counters",
936                 .get = b53_port_get_mib,
937         },
938 };
939
940 static struct switch_attr b53_no_ops[] = {
941 };
942
943 static const struct switch_dev_ops b53_switch_ops_25 = {
944         .attr_global = {
945                 .attr = b53_global_ops_25,
946                 .n_attr = ARRAY_SIZE(b53_global_ops_25),
947         },
948         .attr_port = {
949                 .attr = b53_no_ops,
950                 .n_attr = ARRAY_SIZE(b53_no_ops),
951         },
952         .attr_vlan = {
953                 .attr = b53_no_ops,
954                 .n_attr = ARRAY_SIZE(b53_no_ops),
955         },
956
957         .get_vlan_ports = b53_vlan_get_ports,
958         .set_vlan_ports = b53_vlan_set_ports,
959         .get_port_pvid = b53_port_get_pvid,
960         .set_port_pvid = b53_port_set_pvid,
961         .apply_config = b53_global_apply_config,
962         .reset_switch = b53_global_reset_switch,
963         .get_port_link = b53_port_get_link,
964 };
965
966 static const struct switch_dev_ops b53_switch_ops_65 = {
967         .attr_global = {
968                 .attr = b53_global_ops_65,
969                 .n_attr = ARRAY_SIZE(b53_global_ops_65),
970         },
971         .attr_port = {
972                 .attr = b53_no_ops,
973                 .n_attr = ARRAY_SIZE(b53_port_ops),
974         },
975         .attr_vlan = {
976                 .attr = b53_no_ops,
977                 .n_attr = ARRAY_SIZE(b53_no_ops),
978         },
979
980         .get_vlan_ports = b53_vlan_get_ports,
981         .set_vlan_ports = b53_vlan_set_ports,
982         .get_port_pvid = b53_port_get_pvid,
983         .set_port_pvid = b53_port_set_pvid,
984         .apply_config = b53_global_apply_config,
985         .reset_switch = b53_global_reset_switch,
986         .get_port_link = b53_port_get_link,
987 };
988
989 static const struct switch_dev_ops b53_switch_ops = {
990         .attr_global = {
991                 .attr = b53_global_ops,
992                 .n_attr = ARRAY_SIZE(b53_global_ops),
993         },
994         .attr_port = {
995                 .attr = b53_port_ops,
996                 .n_attr = ARRAY_SIZE(b53_port_ops),
997         },
998         .attr_vlan = {
999                 .attr = b53_no_ops,
1000                 .n_attr = ARRAY_SIZE(b53_no_ops),
1001         },
1002
1003         .get_vlan_ports = b53_vlan_get_ports,
1004         .set_vlan_ports = b53_vlan_set_ports,
1005         .get_port_pvid = b53_port_get_pvid,
1006         .set_port_pvid = b53_port_set_pvid,
1007         .apply_config = b53_global_apply_config,
1008         .reset_switch = b53_global_reset_switch,
1009         .get_port_link = b53_port_get_link,
1010 };
1011
1012 struct b53_chip_data {
1013         u32 chip_id;
1014         const char *dev_name;
1015         const char *alias;
1016         u16 vlans;
1017         u16 enabled_ports;
1018         u8 cpu_port;
1019         u8 vta_regs[3];
1020         u8 duplex_reg;
1021         u8 jumbo_pm_reg;
1022         u8 jumbo_size_reg;
1023         const struct switch_dev_ops *sw_ops;
1024 };
1025
1026 #define B53_VTA_REGS    \
1027         { B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
1028 #define B53_VTA_REGS_9798 \
1029         { B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
1030 #define B53_VTA_REGS_63XX \
1031         { B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
1032
1033 static const struct b53_chip_data b53_switch_chips[] = {
1034         {
1035                 .chip_id = BCM5325_DEVICE_ID,
1036                 .dev_name = "BCM5325",
1037                 .alias = "bcm5325",
1038                 .vlans = 16,
1039                 .enabled_ports = 0x1f,
1040                 .cpu_port = B53_CPU_PORT_25,
1041                 .duplex_reg = B53_DUPLEX_STAT_FE,
1042                 .sw_ops = &b53_switch_ops_25,
1043         },
1044         {
1045                 .chip_id = BCM5365_DEVICE_ID,
1046                 .dev_name = "BCM5365",
1047                 .alias = "bcm5365",
1048                 .vlans = 256,
1049                 .enabled_ports = 0x1f,
1050                 .cpu_port = B53_CPU_PORT_25,
1051                 .duplex_reg = B53_DUPLEX_STAT_FE,
1052                 .sw_ops = &b53_switch_ops_65,
1053         },
1054         {
1055                 .chip_id = BCM5395_DEVICE_ID,
1056                 .dev_name = "BCM5395",
1057                 .alias = "bcm5395",
1058                 .vlans = 4096,
1059                 .enabled_ports = 0x1f,
1060                 .cpu_port = B53_CPU_PORT,
1061                 .vta_regs = B53_VTA_REGS,
1062                 .duplex_reg = B53_DUPLEX_STAT_GE,
1063                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1064                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1065                 .sw_ops = &b53_switch_ops,
1066         },
1067         {
1068                 .chip_id = BCM5397_DEVICE_ID,
1069                 .dev_name = "BCM5397",
1070                 .alias = "bcm5397",
1071                 .vlans = 4096,
1072                 .enabled_ports = 0x1f,
1073                 .cpu_port = B53_CPU_PORT,
1074                 .vta_regs = B53_VTA_REGS_9798,
1075                 .duplex_reg = B53_DUPLEX_STAT_GE,
1076                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1077                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1078                 .sw_ops = &b53_switch_ops,
1079         },
1080         {
1081                 .chip_id = BCM5398_DEVICE_ID,
1082                 .dev_name = "BCM5398",
1083                 .alias = "bcm5398",
1084                 .vlans = 4096,
1085                 .enabled_ports = 0x7f,
1086                 .cpu_port = B53_CPU_PORT,
1087                 .vta_regs = B53_VTA_REGS_9798,
1088                 .duplex_reg = B53_DUPLEX_STAT_GE,
1089                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1090                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1091                 .sw_ops = &b53_switch_ops,
1092         },
1093         {
1094                 .chip_id = BCM53115_DEVICE_ID,
1095                 .dev_name = "BCM53115",
1096                 .alias = "bcm53115",
1097                 .vlans = 4096,
1098                 .enabled_ports = 0x1f,
1099                 .vta_regs = B53_VTA_REGS,
1100                 .cpu_port = B53_CPU_PORT,
1101                 .duplex_reg = B53_DUPLEX_STAT_GE,
1102                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1103                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1104                 .sw_ops = &b53_switch_ops,
1105         },
1106         {
1107                 .chip_id = BCM53125_DEVICE_ID,
1108                 .dev_name = "BCM53125",
1109                 .alias = "bcm53125",
1110                 .vlans = 4096,
1111                 .enabled_ports = 0x1f,
1112                 .cpu_port = B53_CPU_PORT,
1113                 .vta_regs = B53_VTA_REGS,
1114                 .duplex_reg = B53_DUPLEX_STAT_GE,
1115                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1116                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1117                 .sw_ops = &b53_switch_ops,
1118         },
1119         {
1120                 .chip_id = BCM63XX_DEVICE_ID,
1121                 .dev_name = "BCM63xx",
1122                 .alias = "bcm63xx",
1123                 .vlans = 4096,
1124                 .enabled_ports = 0, /* pdata must provide them */
1125                 .cpu_port = B53_CPU_PORT,
1126                 .vta_regs = B53_VTA_REGS_63XX,
1127                 .duplex_reg = B53_DUPLEX_STAT_63XX,
1128                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
1129                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
1130                 .sw_ops = &b53_switch_ops,
1131         },
1132 };
1133
1134 int b53_switch_init(struct b53_device *dev)
1135 {
1136         struct switch_dev *sw_dev = &dev->sw_dev;
1137         unsigned i;
1138         int ret;
1139
1140         for (i = 0; i < ARRAY_SIZE(b53_switch_chips); i++) {
1141                 const struct b53_chip_data *chip = &b53_switch_chips[i];
1142
1143                 if (chip->chip_id == dev->chip_id) {
1144                         sw_dev->name = chip->dev_name;
1145                         if (!sw_dev->alias)
1146                                 sw_dev->alias = chip->alias;
1147                         if (!dev->enabled_ports)
1148                                 dev->enabled_ports = chip->enabled_ports;
1149                         dev->duplex_reg = chip->duplex_reg;
1150                         dev->vta_regs[0] = chip->vta_regs[0];
1151                         dev->vta_regs[1] = chip->vta_regs[1];
1152                         dev->vta_regs[2] = chip->vta_regs[2];
1153                         dev->jumbo_pm_reg = chip->jumbo_pm_reg;
1154                         sw_dev->ops = chip->sw_ops;
1155                         sw_dev->cpu_port = chip->cpu_port;
1156                         sw_dev->vlans = chip->vlans;
1157                         break;
1158                 }
1159         }
1160
1161         if (!sw_dev->name)
1162                 return -EINVAL;
1163
1164         /* check which BCM5325x version we have */
1165         if (is5325(dev)) {
1166                 u8 vc4;
1167
1168                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
1169
1170                 /* check reserved bits */
1171                 switch (vc4 & 3) {
1172                 case 1:
1173                         /* BCM5325E */
1174                         break;
1175                 case 3:
1176                         /* BCM5325F - do not use port 4 */
1177                         dev->enabled_ports &= ~BIT(4);
1178                         break;
1179                 default:
1180 /* On the BCM47XX SoCs this is the supported internal switch.*/
1181 #ifndef CONFIG_BCM47XX
1182                         /* BCM5325M */
1183                         return -EINVAL;
1184 #else
1185                         break;
1186 #endif
1187                 }
1188         } else if (dev->chip_id == BCM53115_DEVICE_ID) {
1189                 u64 strap_value;
1190
1191                 b53_read48(dev, B53_STAT_PAGE, B53_STRAP_VALUE, &strap_value);
1192                 /* use second IMP port if GMII is enabled */
1193                 if (strap_value & SV_GMII_CTRL_115)
1194                         sw_dev->cpu_port = 5;
1195         }
1196
1197         /* cpu port is always last */
1198         sw_dev->ports = sw_dev->cpu_port + 1;
1199         dev->enabled_ports |= BIT(sw_dev->cpu_port);
1200
1201         dev->ports = devm_kzalloc(dev->dev,
1202                                   sizeof(struct b53_port) * sw_dev->ports,
1203                                   GFP_KERNEL);
1204         if (!dev->ports)
1205                 return -ENOMEM;
1206
1207         dev->vlans = devm_kzalloc(dev->dev,
1208                                   sizeof(struct b53_vlan) * sw_dev->vlans,
1209                                   GFP_KERNEL);
1210         if (!dev->vlans)
1211                 return -ENOMEM;
1212
1213         dev->buf = devm_kzalloc(dev->dev, B53_BUF_SIZE, GFP_KERNEL);
1214         if (!dev->buf)
1215                 return -ENOMEM;
1216
1217         dev->reset_gpio = b53_switch_get_reset_gpio(dev);
1218         if (dev->reset_gpio >= 0) {
1219                 ret = devm_gpio_request(dev->dev, dev->reset_gpio, "robo_reset");
1220                 if (ret)
1221                         return ret;
1222         }
1223
1224         return b53_switch_reset(dev);
1225 }
1226
1227 struct b53_device *b53_switch_alloc(struct device *base, struct b53_io_ops *ops,
1228                                     void *priv)
1229 {
1230         struct b53_device *dev;
1231
1232         dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
1233         if (!dev)
1234                 return NULL;
1235
1236         dev->dev = base;
1237         dev->ops = ops;
1238         dev->priv = priv;
1239         mutex_init(&dev->reg_mutex);
1240
1241         return dev;
1242 }
1243 EXPORT_SYMBOL(b53_switch_alloc);
1244
1245 int b53_switch_detect(struct b53_device *dev)
1246 {
1247         u32 id32;
1248         u16 tmp;
1249         u8 id8;
1250         int ret;
1251
1252         ret = b53_read8(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id8);
1253         if (ret)
1254                 return ret;
1255
1256         switch (id8) {
1257         case 0:
1258                 /*
1259                  * BCM5325 and BCM5365 do not have this register so reads
1260                  * return 0. But the read operation did succeed, so assume
1261                  * this is one of them.
1262                  *
1263                  * Next check if we can write to the 5325's VTA register; for
1264                  * 5365 it is read only.
1265                  */
1266
1267                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);
1268                 b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &tmp);
1269
1270                 if (tmp == 0xf)
1271                         dev->chip_id = BCM5325_DEVICE_ID;
1272                 else
1273                         dev->chip_id = BCM5365_DEVICE_ID;
1274                 break;
1275         case BCM5395_DEVICE_ID:
1276         case BCM5397_DEVICE_ID:
1277         case BCM5398_DEVICE_ID:
1278                 dev->chip_id = id8;
1279                 break;
1280         default:
1281                 ret = b53_read32(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id32);
1282                 if (ret)
1283                         return ret;
1284
1285                 switch (id32) {
1286                 case BCM53115_DEVICE_ID:
1287                 case BCM53125_DEVICE_ID:
1288                         dev->chip_id = id32;
1289                         break;
1290                 default:
1291                         pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
1292                                id8, id32);
1293                         return -ENODEV;
1294                 }
1295         }
1296
1297         return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID, &dev->core_rev);
1298 }
1299 EXPORT_SYMBOL(b53_switch_detect);
1300
1301 int b53_switch_register(struct b53_device *dev)
1302 {
1303         int ret;
1304
1305         if (dev->pdata) {
1306                 dev->chip_id = dev->pdata->chip_id;
1307                 dev->enabled_ports = dev->pdata->enabled_ports;
1308                 dev->sw_dev.alias = dev->pdata->alias;
1309         }
1310
1311         if (!dev->chip_id && b53_switch_detect(dev))
1312                 return -EINVAL;
1313
1314         ret = b53_switch_init(dev);
1315         if (ret)
1316                 return ret;
1317
1318         pr_info("found switch: %s, rev %i\n", dev->sw_dev.name, dev->core_rev);
1319
1320         return register_switch(&dev->sw_dev, NULL);
1321 }
1322 EXPORT_SYMBOL(b53_switch_register);
1323
1324 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
1325 MODULE_DESCRIPTION("B53 switch library");
1326 MODULE_LICENSE("Dual BSD/GPL");