target/linux/layerscape/patches-4.4/1100-mtd-spi_nor-Disable-Micron-flash-HW-protection.patch

   1 From e892dea7229d56b75c46a76b9039f9e179584a91 Mon Sep 17 00:00:00 2001
   2 From: Yunhui Cui <B56489@freescale.com>
   3 Date: Mon, 1 Feb 2016 18:48:49 +0800
   4 Subject: [PATCH 100/113] mtd:spi_nor: Disable Micron flash HW protection
   5
   6 For Micron family ,The status register write enable/disable bit,
   7 provides hardware data protection for the device.
   8 When the enable/disable bit is set to 1, the status register
   9 nonvolatile bits become read-only and the WRITE STATUS REGISTER
  10 operation will not execute.
  11
  12 Signed-off-by: Yunhui Cui <B56489@freescale.com>
  13 ---
  14  drivers/mtd/spi-nor/spi-nor.c |    9 +++++++++
  15  1 file changed, 9 insertions(+)
  16
  17 --- a/drivers/mtd/spi-nor/spi-nor.c
  18 +++ b/drivers/mtd/spi-nor/spi-nor.c
  19 @@ -39,6 +39,7 @@
  20
  21  #define SPI_NOR_MAX_ID_LEN     6
  22  #define SPI_NOR_MAX_ADDR_WIDTH 4
  23 +#define SPI_NOR_MICRON_WRITE_ENABLE    0x7f
  24
  25  struct flash_info {
  26         char            *name;
  27 @@ -1239,6 +1240,14 @@ int spi_nor_scan(struct spi_nor *nor, co
  28         if (ret)
  29                 return ret;
  30
  31 +       if (JEDEC_MFR(info) == SNOR_MFR_MICRON) {
  32 +               ret = read_sr(nor);
  33 +               ret &= SPI_NOR_MICRON_WRITE_ENABLE;
  34 +
  35 +               write_enable(nor);
  36 +               write_sr(nor, ret);
  37 +       }
  38 +
  39         if (!mtd->name)
  40                 mtd->name = dev_name(dev);
  41         mtd->priv = nor;