2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
15 * Copyright (C) 2009 John Crispin <blogic@openwrt.org>
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/init.h>
23 #include <linux/skbuff.h>
24 #include <linux/etherdevice.h>
25 #include <linux/ethtool.h>
26 #include <linux/platform_device.h>
28 #include <ramips_eth_platform.h>
29 #include "ramips_eth.h"
31 #define TX_TIMEOUT (20 * HZ / 100)
32 #define MAX_RX_LENGTH 1600
34 #ifdef CONFIG_RALINK_RT305X
35 #include "ramips_esw.c"
38 #define phys_to_bus(a) (a & 0x1FFFFFFF)
40 static struct net_device * ramips_dev;
41 static void __iomem *ramips_fe_base = 0;
44 ramips_fe_wr(u32 val, unsigned reg)
46 __raw_writel(val, ramips_fe_base + reg);
50 ramips_fe_rr(unsigned reg)
52 return __raw_readl(ramips_fe_base + reg);
56 ramips_fe_int_disable(u32 mask)
58 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask,
59 RAMIPS_FE_INT_ENABLE);
61 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
65 ramips_fe_int_enable(u32 mask)
67 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask,
68 RAMIPS_FE_INT_ENABLE);
70 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
74 ramips_hw_set_macaddr(unsigned char *mac)
76 ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
77 ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
78 RAMIPS_GDMA1_MAC_ADRL);
81 #ifdef CONFIG_RALINK_RT288X
83 ramips_setup_mdio_cfg(struct raeth_priv *re)
85 unsigned int mdio_cfg;
87 mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
88 RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
89 RAMIPS_MDIO_CFG_GP1_FRC_EN;
91 if (re->duplex == DUPLEX_FULL)
92 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
95 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
98 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
102 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
105 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
108 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
114 ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
117 static inline void ramips_setup_mdio_cfg(struct raeth_priv *re)
120 #endif /* CONFIG_RALINK_RT288X */
123 ramips_cleanup_dma(struct raeth_priv *re)
127 for (i = 0; i < NUM_RX_DESC; i++)
129 dev_kfree_skb_any(re->rx_skb[i]);
132 dma_free_coherent(NULL,
133 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
137 dma_free_coherent(NULL,
138 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
143 ramips_alloc_dma(struct raeth_priv *re)
148 re->skb_free_idx = 0;
151 re->tx = dma_alloc_coherent(NULL,
152 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
153 &re->phy_tx, GFP_ATOMIC);
157 memset(re->tx, 0, NUM_TX_DESC * sizeof(struct ramips_tx_dma));
158 for (i = 0; i < NUM_TX_DESC; i++) {
159 re->tx[i].txd2 = TX_DMA_LSO | TX_DMA_DONE;
160 re->tx[i].txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
164 re->rx = dma_alloc_coherent(NULL,
165 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
166 &re->phy_rx, GFP_ATOMIC);
170 memset(re->rx, 0, sizeof(struct ramips_rx_dma) * NUM_RX_DESC);
171 for (i = 0; i < NUM_RX_DESC; i++) {
172 struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_LENGTH + 2);
177 skb_reserve(new_skb, 2);
178 re->rx[i].rxd1 = dma_map_single(NULL,
182 re->rx[i].rxd2 |= RX_DMA_LSO;
183 re->rx_skb[i] = new_skb;
189 ramips_cleanup_dma(re);
194 ramips_setup_dma(struct raeth_priv *re)
196 ramips_fe_wr(phys_to_bus(re->phy_tx), RAMIPS_TX_BASE_PTR0);
197 ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0);
198 ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0);
199 ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG);
201 ramips_fe_wr(phys_to_bus(re->phy_rx), RAMIPS_RX_BASE_PTR0);
202 ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0);
203 ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0);
204 ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG);
208 ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
210 struct raeth_priv *priv = netdev_priv(dev);
212 unsigned int tx_next;
213 unsigned int mapped_addr;
216 if (priv->plat->min_pkt_len) {
217 if (skb->len < priv->plat->min_pkt_len) {
218 if (skb_padto(skb, priv->plat->min_pkt_len)) {
220 "ramips_eth: skb_padto failed\n");
224 skb_put(skb, priv->plat->min_pkt_len - skb->len);
228 dev->trans_start = jiffies;
229 mapped_addr = (unsigned int) dma_map_single(NULL, skb->data, skb->len,
231 dma_sync_single_for_device(NULL, mapped_addr, skb->len, DMA_TO_DEVICE);
232 spin_lock_irqsave(&priv->page_lock, flags);
233 tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0);
234 tx_next = (tx + 1) % NUM_TX_DESC;
236 if ((priv->tx_skb[tx]) || (priv->tx_skb[tx_next]) ||
237 !(priv->tx[tx].txd2 & TX_DMA_DONE) ||
238 !(priv->tx[tx_next].txd2 & TX_DMA_DONE))
241 priv->tx[tx].txd1 = mapped_addr;
242 priv->tx[tx].txd2 &= ~(TX_DMA_PLEN0_MASK | TX_DMA_DONE);
243 priv->tx[tx].txd2 |= TX_DMA_PLEN0(skb->len);
244 dev->stats.tx_packets++;
245 dev->stats.tx_bytes += skb->len;
246 priv->tx_skb[tx] = skb;
248 ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0);
249 spin_unlock_irqrestore(&priv->page_lock, flags);
253 spin_unlock_irqrestore(&priv->page_lock, flags);
254 dev->stats.tx_dropped++;
260 ramips_eth_rx_hw(unsigned long ptr)
262 struct net_device *dev = (struct net_device *) ptr;
263 struct raeth_priv *priv = netdev_priv(dev);
268 struct sk_buff *rx_skb, *new_skb;
270 rx = (ramips_fe_rr(RAMIPS_RX_CALC_IDX0) + 1) % NUM_RX_DESC;
271 if (!(priv->rx[rx].rxd2 & RX_DMA_DONE))
275 rx_skb = priv->rx_skb[rx];
276 skb_put(rx_skb, RX_DMA_PLEN0(priv->rx[rx].rxd2));
278 rx_skb->protocol = eth_type_trans(rx_skb, dev);
279 rx_skb->ip_summed = CHECKSUM_NONE;
280 dev->stats.rx_packets++;
281 dev->stats.rx_bytes += rx_skb->len;
284 new_skb = netdev_alloc_skb(dev, MAX_RX_LENGTH + 2);
285 priv->rx_skb[rx] = new_skb;
287 skb_reserve(new_skb, 2);
288 priv->rx[rx].rxd1 = dma_map_single(NULL,
292 priv->rx[rx].rxd2 &= ~RX_DMA_DONE;
294 ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0);
298 tasklet_schedule(&priv->rx_tasklet);
300 ramips_fe_int_enable(RAMIPS_RX_DLY_INT);
304 ramips_eth_tx_housekeeping(unsigned long ptr)
306 struct net_device *dev = (struct net_device*)ptr;
307 struct raeth_priv *priv = netdev_priv(dev);
309 while ((priv->tx[priv->skb_free_idx].txd2 & TX_DMA_DONE) &&
310 (priv->tx_skb[priv->skb_free_idx])) {
311 dev_kfree_skb_irq(priv->tx_skb[priv->skb_free_idx]);
312 priv->tx_skb[priv->skb_free_idx] = 0;
313 priv->skb_free_idx++;
314 if (priv->skb_free_idx >= NUM_TX_DESC)
315 priv->skb_free_idx = 0;
318 ramips_fe_int_enable(RAMIPS_TX_DLY_INT);
322 ramips_eth_timeout(struct net_device *dev)
324 struct raeth_priv *priv = netdev_priv(dev);
326 tasklet_schedule(&priv->tx_housekeeping_tasklet);
330 ramips_eth_irq(int irq, void *dev)
332 struct raeth_priv *priv = netdev_priv(dev);
333 unsigned long fe_int = ramips_fe_rr(RAMIPS_FE_INT_STATUS);
335 ramips_fe_wr(0xFFFFFFFF, RAMIPS_FE_INT_STATUS);
337 if (fe_int & RAMIPS_RX_DLY_INT) {
338 ramips_fe_int_disable(RAMIPS_RX_DLY_INT);
339 tasklet_schedule(&priv->rx_tasklet);
342 if (fe_int & RAMIPS_TX_DLY_INT)
343 ramips_eth_tx_housekeeping((unsigned long)dev);
349 ramips_eth_open(struct net_device *dev)
351 struct raeth_priv *priv = netdev_priv(dev);
354 err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
359 err = ramips_alloc_dma(priv);
363 ramips_hw_set_macaddr(dev->dev_addr);
365 ramips_setup_dma(priv);
366 ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) |
367 (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
368 RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
369 RAMIPS_PDMA_GLO_CFG);
370 ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
371 ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
372 ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
375 tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
377 tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
379 ramips_setup_mdio_cfg(priv);
381 ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG);
382 ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE);
383 ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
384 ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
385 RAMIPS_GDMA1_FWD_CFG);
386 ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
387 ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
388 RAMIPS_CDMA_CSG_CFG);
389 ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
390 ramips_fe_wr(1, RAMIPS_FE_RST_GL);
391 ramips_fe_wr(0, RAMIPS_FE_RST_GL);
393 netif_start_queue(dev);
397 free_irq(dev->irq, dev);
402 ramips_eth_stop(struct net_device *dev)
404 struct raeth_priv *priv = netdev_priv(dev);
406 ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) &
407 ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
408 RAMIPS_PDMA_GLO_CFG);
410 /* disable all interrupts in the hw */
411 ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE);
413 free_irq(dev->irq, dev);
414 netif_stop_queue(dev);
415 tasklet_kill(&priv->tx_housekeeping_tasklet);
416 tasklet_kill(&priv->rx_tasklet);
417 ramips_cleanup_dma(priv);
418 printk(KERN_DEBUG "ramips_eth: stopped\n");
423 ramips_eth_probe(struct net_device *dev)
425 struct raeth_priv *priv = netdev_priv(dev);
427 BUG_ON(!priv->plat->reset_fe);
428 priv->plat->reset_fe();
429 net_srandom(jiffies);
430 memcpy(dev->dev_addr, priv->plat->mac, ETH_ALEN);
434 dev->watchdog_timeo = TX_TIMEOUT;
435 spin_lock_init(&priv->page_lock);
440 static const struct net_device_ops ramips_eth_netdev_ops = {
441 .ndo_init = ramips_eth_probe,
442 .ndo_open = ramips_eth_open,
443 .ndo_stop = ramips_eth_stop,
444 .ndo_start_xmit = ramips_eth_hard_start_xmit,
445 .ndo_tx_timeout = ramips_eth_timeout,
446 .ndo_change_mtu = eth_change_mtu,
447 .ndo_set_mac_address = eth_mac_addr,
448 .ndo_validate_addr = eth_validate_addr,
452 ramips_eth_plat_probe(struct platform_device *plat)
454 struct raeth_priv *priv;
455 struct ramips_eth_platform_data *data = plat->dev.platform_data;
456 struct resource *res;
460 dev_err(&plat->dev, "no platform data specified\n");
464 res = platform_get_resource(plat, IORESOURCE_MEM, 0);
466 dev_err(&plat->dev, "no memory resource found\n");
470 ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
474 ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
476 dev_err(&plat->dev, "alloc_etherdev failed\n");
481 strcpy(ramips_dev->name, "eth%d");
482 ramips_dev->irq = platform_get_irq(plat, 0);
483 if (ramips_dev->irq < 0) {
484 dev_err(&plat->dev, "no IRQ resource found\n");
488 ramips_dev->addr_len = ETH_ALEN;
489 ramips_dev->base_addr = (unsigned long)ramips_fe_base;
490 ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
492 priv = netdev_priv(ramips_dev);
494 priv->speed = data->speed;
495 priv->duplex = data->duplex;
496 priv->rx_fc = data->rx_fc;
497 priv->tx_fc = data->tx_fc;
500 err = register_netdev(ramips_dev);
502 dev_err(&plat->dev, "error bringing up device\n");
506 #ifdef CONFIG_RALINK_RT305X
509 printk(KERN_DEBUG "ramips_eth: loaded\n");
515 iounmap(ramips_fe_base);
520 ramips_eth_plat_remove(struct platform_device *plat)
522 unregister_netdev(ramips_dev);
523 free_netdev(ramips_dev);
524 printk(KERN_DEBUG "ramips_eth: unloaded\n");
528 static struct platform_driver ramips_eth_driver = {
529 .probe = ramips_eth_plat_probe,
530 .remove = ramips_eth_plat_remove,
532 .name = "ramips_eth",
533 .owner = THIS_MODULE,
538 ramips_eth_init(void)
540 int ret = platform_driver_register(&ramips_eth_driver);
543 "ramips_eth: Error registering platfom driver!\n");
548 ramips_eth_cleanup(void)
550 platform_driver_unregister(&ramips_eth_driver);
553 module_init(ramips_eth_init);
554 module_exit(ramips_eth_cleanup);
556 MODULE_LICENSE("GPL");
557 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
558 MODULE_DESCRIPTION("ethernet driver for ramips boards");