1 /* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.c $
4 * $Date: 2008-11-27 09:21:25 $
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
12 * any End User Software License Agreement or Agreement for Licensed Product
13 * with Synopsys or any supplement thereto. You are permitted to use and
14 * redistribute this Software in source and binary forms, with or without
15 * modification, provided that redistributions of source code must retain this
16 * notice. You may not view, use, disclose, copy or distribute this file or
17 * any information contained herein except pursuant to this license grant from
18 * Synopsys. If you do not agree with this notice, including the disclaimer
19 * below, then you are not authorized to use the Software.
21 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
32 * ========================================================================== */
36 * This file implements the Peripheral Controller Driver.
38 * The Peripheral Controller Driver (PCD) is responsible for
39 * translating requests from the Function Driver into the appropriate
40 * actions on the DWC_otg controller. It isolates the Function Driver
41 * from the specifics of the controller by providing an API to the
44 * The Peripheral Controller Driver for Linux will implement the
45 * Gadget API, so that the existing Gadget drivers can be used.
46 * (Gadget Driver is the Linux terminology for a Function Driver.)
48 * The Linux Gadget API is defined in the header file
49 * <code><linux/usb_gadget.h></code>. The USB EP operations API is
50 * defined in the structure <code>usb_ep_ops</code> and the USB
51 * Controller API is defined in the structure
52 * <code>usb_gadget_ops</code>.
54 * An important function of the PCD is managing interrupts generated
55 * by the DWC_otg controller. The implementation of the DWC_otg device
56 * mode interrupt service routines is in dwc_otg_pcd_intr.c.
58 * @todo Add Device Mode test modes (Test J mode, Test K mode, etc).
59 * @todo Does it work when the request size is greater than DEPTSIZ
65 #include <linux/kernel.h>
66 #include <linux/module.h>
67 #include <linux/moduleparam.h>
68 #include <linux/init.h>
69 #include <linux/device.h>
70 #include <linux/errno.h>
71 #include <linux/list.h>
72 #include <linux/interrupt.h>
73 #include <linux/string.h>
74 #include <linux/dma-mapping.h>
75 #include <linux/version.h>
77 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)
78 # include <linux/usb/ch9.h>
80 # include <linux/usb_ch9.h>
83 #include <linux/usb_gadget.h>
85 #include "dwc_otg_driver.h"
86 #include "dwc_otg_pcd.h"
90 * Static PCD pointer for use in usb_gadget_register_driver and
91 * usb_gadget_unregister_driver. Initialized in dwc_otg_pcd_init.
93 static dwc_otg_pcd_t *s_pcd = 0;
96 /* Display the contents of the buffer */
97 extern void dump_msg(const u8 *buf, unsigned int length);
101 * This function completes a request. It call's the request call back.
103 void dwc_otg_request_done(dwc_otg_pcd_ep_t *ep, dwc_otg_pcd_request_t *req,
106 unsigned stopped = ep->stopped;
108 DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, ep);
109 list_del_init(&req->queue);
111 if (req->req.status == -EINPROGRESS) {
112 req->req.status = status;
114 status = req->req.status;
117 /* don't modify queue heads during completion callback */
119 SPIN_UNLOCK(&ep->pcd->lock);
120 req->req.complete(&ep->ep, &req->req);
121 SPIN_LOCK(&ep->pcd->lock);
123 if (ep->pcd->request_pending > 0) {
124 --ep->pcd->request_pending;
127 ep->stopped = stopped;
131 * This function terminates all the requsts in the EP request queue.
133 void dwc_otg_request_nuke(dwc_otg_pcd_ep_t *ep)
135 dwc_otg_pcd_request_t *req;
139 /* called with irqs blocked?? */
140 while (!list_empty(&ep->queue)) {
141 req = list_entry(ep->queue.next, dwc_otg_pcd_request_t,
143 dwc_otg_request_done(ep, req, -ESHUTDOWN);
147 /* USB Endpoint Operations */
149 * The following sections briefly describe the behavior of the Gadget
150 * API endpoint operations implemented in the DWC_otg driver
151 * software. Detailed descriptions of the generic behavior of each of
152 * these functions can be found in the Linux header file
153 * include/linux/usb_gadget.h.
155 * The Gadget API provides wrapper functions for each of the function
156 * pointers defined in usb_ep_ops. The Gadget Driver calls the wrapper
157 * function, which then calls the underlying PCD function. The
158 * following sections are named according to the wrapper
159 * functions. Within each section, the corresponding DWC_otg PCD
160 * function name is specified.
165 * This function assigns periodic Tx FIFO to an periodic EP
166 * in shared Tx FIFO mode
168 static uint32_t assign_perio_tx_fifo(dwc_otg_core_if_t *core_if)
170 uint32_t PerTxMsk = 1;
172 for(i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; ++i)
174 if((PerTxMsk & core_if->p_tx_msk) == 0) {
175 core_if->p_tx_msk |= PerTxMsk;
183 * This function releases periodic Tx FIFO
184 * in shared Tx FIFO mode
186 static void release_perio_tx_fifo(dwc_otg_core_if_t *core_if, uint32_t fifo_num)
188 core_if->p_tx_msk = (core_if->p_tx_msk & (1 << (fifo_num - 1))) ^ core_if->p_tx_msk;
191 * This function assigns periodic Tx FIFO to an periodic EP
192 * in shared Tx FIFO mode
194 static uint32_t assign_tx_fifo(dwc_otg_core_if_t *core_if)
199 for(i = 0; i < core_if->hwcfg4.b.num_in_eps; ++i)
201 if((TxMsk & core_if->tx_msk) == 0) {
202 core_if->tx_msk |= TxMsk;
210 * This function releases periodic Tx FIFO
211 * in shared Tx FIFO mode
213 static void release_tx_fifo(dwc_otg_core_if_t *core_if, uint32_t fifo_num)
215 core_if->tx_msk = (core_if->tx_msk & (1 << (fifo_num - 1))) ^ core_if->tx_msk;
219 * This function is called by the Gadget Driver for each EP to be
220 * configured for the current configuration (SET_CONFIGURATION).
222 * This function initializes the dwc_otg_ep_t data structure, and then
223 * calls dwc_otg_ep_activate.
225 static int dwc_otg_pcd_ep_enable(struct usb_ep *usb_ep,
226 const struct usb_endpoint_descriptor *ep_desc)
228 dwc_otg_pcd_ep_t *ep = 0;
229 dwc_otg_pcd_t *pcd = 0;
232 DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p)\n", __func__, usb_ep, ep_desc);
234 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
235 if (!usb_ep || !ep_desc || ep->desc ||
236 ep_desc->bDescriptorType != USB_DT_ENDPOINT) {
237 DWC_WARN("%s, bad ep or descriptor\n", __func__);
240 if (ep == &ep->pcd->ep0) {
241 DWC_WARN("%s, bad ep(0)\n", __func__);
245 /* Check FIFO size? */
246 if (!ep_desc->wMaxPacketSize) {
247 DWC_WARN("%s, bad %s maxpacket\n", __func__, usb_ep->name);
252 if (!pcd->driver || pcd->gadget.speed == USB_SPEED_UNKNOWN) {
253 DWC_WARN("%s, bogus device state\n", __func__);
257 SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
260 ep->ep.maxpacket = le16_to_cpu (ep_desc->wMaxPacketSize);
267 ep->dwc_ep.is_in = (USB_DIR_IN & ep_desc->bEndpointAddress) != 0;
268 ep->dwc_ep.maxpacket = ep->ep.maxpacket;
270 ep->dwc_ep.type = ep_desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
272 if(ep->dwc_ep.is_in) {
273 if(!pcd->otg_dev->core_if->en_multiple_tx_fifo) {
274 ep->dwc_ep.tx_fifo_num = 0;
276 if (ep->dwc_ep.type == USB_ENDPOINT_XFER_ISOC) {
278 * if ISOC EP then assign a Periodic Tx FIFO.
280 ep->dwc_ep.tx_fifo_num = assign_perio_tx_fifo(pcd->otg_dev->core_if);
284 * if Dedicated FIFOs mode is on then assign a Tx FIFO.
286 ep->dwc_ep.tx_fifo_num = assign_tx_fifo(pcd->otg_dev->core_if);
290 /* Set initial data PID. */
291 if (ep->dwc_ep.type == USB_ENDPOINT_XFER_BULK) {
292 ep->dwc_ep.data_pid_start = 0;
295 DWC_DEBUGPL(DBG_PCD, "Activate %s-%s: type=%d, mps=%d desc=%p\n",
296 ep->ep.name, (ep->dwc_ep.is_in ?"IN":"OUT"),
297 ep->dwc_ep.type, ep->dwc_ep.maxpacket, ep->desc);
299 if(ep->dwc_ep.type != USB_ENDPOINT_XFER_ISOC) {
300 ep->dwc_ep.desc_addr = dwc_otg_ep_alloc_desc_chain(&ep->dwc_ep.dma_desc_addr, MAX_DMA_DESC_CNT);
303 dwc_otg_ep_activate(GET_CORE_IF(pcd), &ep->dwc_ep);
304 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
310 * This function is called when an EP is disabled due to disconnect or
311 * change in configuration. Any pending requests will terminate with a
312 * status of -ESHUTDOWN.
314 * This function modifies the dwc_otg_ep_t data structure for this EP,
315 * and then calls dwc_otg_ep_deactivate.
317 static int dwc_otg_pcd_ep_disable(struct usb_ep *usb_ep)
319 dwc_otg_pcd_ep_t *ep;
320 dwc_otg_pcd_t *pcd = 0;
323 DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, usb_ep);
324 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
325 if (!usb_ep || !ep->desc) {
326 DWC_DEBUGPL(DBG_PCD, "%s, %s not enabled\n", __func__,
327 usb_ep ? ep->ep.name : NULL);
331 SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
333 dwc_otg_request_nuke(ep);
335 dwc_otg_ep_deactivate(GET_CORE_IF(ep->pcd), &ep->dwc_ep);
339 if(ep->dwc_ep.is_in) {
340 dwc_otg_flush_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
341 release_perio_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
342 release_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
345 /* Free DMA Descriptors */
348 SPIN_UNLOCK_IRQRESTORE(&ep->pcd->lock, flags);
350 if(ep->dwc_ep.type != USB_ENDPOINT_XFER_ISOC && ep->dwc_ep.desc_addr) {
351 dwc_otg_ep_free_desc_chain(ep->dwc_ep.desc_addr, ep->dwc_ep.dma_desc_addr, MAX_DMA_DESC_CNT);
354 DWC_DEBUGPL(DBG_PCD, "%s disabled\n", usb_ep->name);
360 * This function allocates a request object to use with the specified
363 * @param ep The endpoint to be used with with the request
364 * @param gfp_flags the GFP_* flags to use.
366 static struct usb_request *dwc_otg_pcd_alloc_request(struct usb_ep *ep,
367 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
374 dwc_otg_pcd_request_t *req;
376 DWC_DEBUGPL(DBG_PCDV,"%s(%p,%d)\n", __func__, ep, gfp_flags);
378 DWC_WARN("%s() %s\n", __func__, "Invalid EP!\n");
381 req = kmalloc(sizeof(dwc_otg_pcd_request_t), gfp_flags);
383 DWC_WARN("%s() %s\n", __func__,
384 "request allocation failed!\n");
387 memset(req, 0, sizeof(dwc_otg_pcd_request_t));
388 req->req.dma = DMA_ADDR_INVALID;
389 INIT_LIST_HEAD(&req->queue);
394 * This function frees a request object.
396 * @param ep The endpoint associated with the request
397 * @param req The request being freed
399 static void dwc_otg_pcd_free_request(struct usb_ep *ep,
400 struct usb_request *req)
402 dwc_otg_pcd_request_t *request;
403 DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p)\n", __func__, ep, req);
405 if (0 == ep || 0 == req) {
406 DWC_WARN("%s() %s\n", __func__,
407 "Invalid ep or req argument!\n");
411 request = container_of(req, dwc_otg_pcd_request_t, req);
416 * This function allocates an I/O buffer to be used for a transfer
417 * to/from the specified endpoint.
419 * @param usb_ep The endpoint to be used with with the request
420 * @param bytes The desired number of bytes for the buffer
421 * @param dma Pointer to the buffer's DMA address; must be valid
422 * @param gfp_flags the GFP_* flags to use.
423 * @return address of a new buffer or null is buffer could not be allocated.
425 static void *dwc_otg_pcd_alloc_buffer(struct usb_ep *usb_ep, unsigned bytes,
427 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
435 dwc_otg_pcd_ep_t *ep;
436 dwc_otg_pcd_t *pcd = 0;
438 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
441 DWC_DEBUGPL(DBG_PCDV,"%s(%p,%d,%p,%0x)\n", __func__, usb_ep, bytes,
444 /* Check dword alignment */
445 if ((bytes & 0x3UL) != 0) {
446 DWC_WARN("%s() Buffer size is not a multiple of"
447 "DWORD size (%d)",__func__, bytes);
450 if (GET_CORE_IF(pcd)->dma_enable) {
451 buf = dma_alloc_coherent (NULL, bytes, dma, gfp_flags);
454 buf = kmalloc(bytes, gfp_flags);
457 /* Check dword alignment */
458 if (((int)buf & 0x3UL) != 0) {
459 DWC_WARN("%s() Buffer is not DWORD aligned (%p)",
467 * This function frees an I/O buffer that was allocated by alloc_buffer.
469 * @param usb_ep the endpoint associated with the buffer
470 * @param buf address of the buffer
471 * @param dma The buffer's DMA address
472 * @param bytes The number of bytes of the buffer
474 static void dwc_otg_pcd_free_buffer(struct usb_ep *usb_ep, void *buf,
475 dma_addr_t dma, unsigned bytes)
477 dwc_otg_pcd_ep_t *ep;
478 dwc_otg_pcd_t *pcd = 0;
480 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
483 DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p,%0x,%d)\n", __func__, ep, buf, dma, bytes);
485 if (GET_CORE_IF(pcd)->dma_enable) {
486 dma_free_coherent (NULL, bytes, buf, dma);
495 * This function is used to submit an I/O Request to an EP.
497 * - When the request completes the request's completion callback
498 * is called to return the request to the driver.
499 * - An EP, except control EPs, may have multiple requests
501 * - Once submitted the request cannot be examined or modified.
502 * - Each request is turned into one or more packets.
503 * - A BULK EP can queue any amount of data; the transfer is
505 * - Zero length Packets are specified with the request 'zero'
508 static int dwc_otg_pcd_ep_queue(struct usb_ep *usb_ep,
509 struct usb_request *usb_req,
510 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
518 dwc_otg_pcd_request_t *req;
519 dwc_otg_pcd_ep_t *ep;
521 unsigned long flags = 0;
522 dwc_otg_core_if_t *_core_if;
524 DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p,%d)\n",
525 __func__, usb_ep, usb_req, gfp_flags);
527 req = container_of(usb_req, dwc_otg_pcd_request_t, req);
528 if (!usb_req || !usb_req->complete || !usb_req->buf ||
529 !list_empty(&req->queue)) {
530 DWC_WARN("%s, bad params\n", __func__);
534 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
535 if (!usb_ep || (!ep->desc && ep->dwc_ep.num != 0)/* || ep->stopped != 0*/) {
536 DWC_WARN("%s, bad ep\n", __func__);
541 if (!pcd->driver || pcd->gadget.speed == USB_SPEED_UNKNOWN) {
542 DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", pcd->gadget.speed);
543 DWC_WARN("%s, bogus device state\n", __func__);
548 DWC_DEBUGPL(DBG_PCD, "%s queue req %p, len %d buf %p\n",
549 usb_ep->name, usb_req, usb_req->length, usb_req->buf);
551 if (!GET_CORE_IF(pcd)->core_params->opt) {
552 if (ep->dwc_ep.num != 0) {
553 DWC_ERROR("%s queue req %p, len %d buf %p\n",
554 usb_ep->name, usb_req, usb_req->length, usb_req->buf);
558 SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
561 /**************************************************
562 New add by kaiker ,for DMA mode bug
563 ************************************************/
564 //by kaiker ,for RT3052 USB OTG device mode
566 _core_if = GET_CORE_IF(pcd);
568 if (_core_if->dma_enable)
570 usb_req->dma = virt_to_phys((void *)usb_req->buf);
575 dma_cache_wback_inv((unsigned long)usb_req->buf, usb_req->length + 2);
581 #if defined(DEBUG) & defined(VERBOSE)
582 dump_msg(usb_req->buf, usb_req->length);
585 usb_req->status = -EINPROGRESS;
589 * For EP0 IN without premature status, zlp is required?
591 if (ep->dwc_ep.num == 0 && ep->dwc_ep.is_in) {
592 DWC_DEBUGPL(DBG_PCDV, "%s-OUT ZLP\n", usb_ep->name);
596 /* Start the transfer */
597 if (list_empty(&ep->queue) && !ep->stopped) {
599 if (ep->dwc_ep.num == 0) {
600 switch (pcd->ep0state) {
601 case EP0_IN_DATA_PHASE:
603 "%s ep0: EP0_IN_DATA_PHASE\n",
607 case EP0_OUT_DATA_PHASE:
609 "%s ep0: EP0_OUT_DATA_PHASE\n",
611 if (pcd->request_config) {
612 /* Complete STATUS PHASE */
613 ep->dwc_ep.is_in = 1;
614 pcd->ep0state = EP0_IN_STATUS_PHASE;
618 case EP0_IN_STATUS_PHASE:
620 "%s ep0: EP0_IN_STATUS_PHASE\n",
625 DWC_DEBUGPL(DBG_ANY, "ep0: odd state %d\n",
627 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
630 ep->dwc_ep.dma_addr = usb_req->dma;
631 ep->dwc_ep.start_xfer_buff = usb_req->buf;
632 ep->dwc_ep.xfer_buff = usb_req->buf;
633 ep->dwc_ep.xfer_len = usb_req->length;
634 ep->dwc_ep.xfer_count = 0;
635 ep->dwc_ep.sent_zlp = 0;
636 ep->dwc_ep.total_len = ep->dwc_ep.xfer_len;
639 if((ep->dwc_ep.xfer_len % ep->dwc_ep.maxpacket == 0)
640 && (ep->dwc_ep.xfer_len != 0)) {
641 ep->dwc_ep.sent_zlp = 1;
646 dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep->dwc_ep);
650 uint32_t max_transfer = GET_CORE_IF(ep->pcd)->core_params->max_transfer_size;
652 /* Setup and start the Transfer */
653 ep->dwc_ep.dma_addr = usb_req->dma;
654 ep->dwc_ep.start_xfer_buff = usb_req->buf;
655 ep->dwc_ep.xfer_buff = usb_req->buf;
656 ep->dwc_ep.sent_zlp = 0;
657 ep->dwc_ep.total_len = usb_req->length;
658 ep->dwc_ep.xfer_len = 0;
659 ep->dwc_ep.xfer_count = 0;
661 if(max_transfer > MAX_TRANSFER_SIZE) {
662 ep->dwc_ep.maxxfer = max_transfer - (max_transfer % ep->dwc_ep.maxpacket);
664 ep->dwc_ep.maxxfer = max_transfer;
668 if((ep->dwc_ep.total_len % ep->dwc_ep.maxpacket == 0)
669 && (ep->dwc_ep.total_len != 0)) {
670 ep->dwc_ep.sent_zlp = 1;
674 dwc_otg_ep_start_transfer(GET_CORE_IF(pcd), &ep->dwc_ep);
678 if ((req != 0) || prevented) {
679 ++pcd->request_pending;
680 list_add_tail(&req->queue, &ep->queue);
681 if (ep->dwc_ep.is_in && ep->stopped && !(GET_CORE_IF(pcd)->dma_enable)) {
682 /** @todo NGS Create a function for this. */
683 diepmsk_data_t diepmsk = { .d32 = 0};
684 diepmsk.b.intktxfemp = 1;
685 if(&GET_CORE_IF(pcd)->multiproc_int_enable) {
686 dwc_modify_reg32(&GET_CORE_IF(pcd)->dev_if->dev_global_regs->diepeachintmsk[ep->dwc_ep.num],
689 dwc_modify_reg32(&GET_CORE_IF(pcd)->dev_if->dev_global_regs->diepmsk, 0, diepmsk.d32);
694 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
699 * This function cancels an I/O request from an EP.
701 static int dwc_otg_pcd_ep_dequeue(struct usb_ep *usb_ep,
702 struct usb_request *usb_req)
704 dwc_otg_pcd_request_t *req;
705 dwc_otg_pcd_ep_t *ep;
709 DWC_DEBUGPL(DBG_PCDV,"%s(%p,%p)\n", __func__, usb_ep, usb_req);
711 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
712 if (!usb_ep || !usb_req || (!ep->desc && ep->dwc_ep.num != 0)) {
713 DWC_WARN("%s, bad argument\n", __func__);
717 if (!pcd->driver || pcd->gadget.speed == USB_SPEED_UNKNOWN) {
718 DWC_WARN("%s, bogus device state\n", __func__);
722 SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
723 DWC_DEBUGPL(DBG_PCDV, "%s %s %s %p\n", __func__, usb_ep->name,
724 ep->dwc_ep.is_in ? "IN" : "OUT",
727 /* make sure it's actually queued on this endpoint */
728 list_for_each_entry(req, &ep->queue, queue)
730 if (&req->req == usb_req) {
735 if (&req->req != usb_req) {
736 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
740 if (!list_empty(&req->queue)) {
741 dwc_otg_request_done(ep, req, -ECONNRESET);
747 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
749 return req ? 0 : -EOPNOTSUPP;
753 * usb_ep_set_halt stalls an endpoint.
755 * usb_ep_clear_halt clears an endpoint halt and resets its data
758 * Both of these functions are implemented with the same underlying
759 * function. The behavior depends on the value argument.
761 * @param[in] usb_ep the Endpoint to halt or clear halt.
763 * - 0 means clear_halt.
764 * - 1 means set_halt,
765 * - 2 means clear stall lock flag.
766 * - 3 means set stall lock flag.
768 static int dwc_otg_pcd_ep_set_halt(struct usb_ep *usb_ep, int value)
772 dwc_otg_pcd_ep_t *ep = 0;
775 DWC_DEBUGPL(DBG_PCD,"HALT %s %d\n", usb_ep->name, value);
777 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
779 if (!usb_ep || (!ep->desc && ep != &ep->pcd->ep0) ||
780 ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
781 DWC_WARN("%s, bad ep\n", __func__);
785 SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
786 if (!list_empty(&ep->queue)) {
787 DWC_WARN("%s() %s XFer In process\n", __func__, usb_ep->name);
790 else if (value == 0) {
791 dwc_otg_ep_clear_stall(ep->pcd->otg_dev->core_if,
794 else if(value == 1) {
795 if (ep->dwc_ep.is_in == 1 && ep->pcd->otg_dev->core_if->dma_desc_enable) {
796 dtxfsts_data_t txstatus;
797 fifosize_data_t txfifosize;
799 txfifosize.d32 = dwc_read_reg32(&ep->pcd->otg_dev->core_if->core_global_regs->dptxfsiz_dieptxf[ep->dwc_ep.tx_fifo_num]);
800 txstatus.d32 = dwc_read_reg32(&ep->pcd->otg_dev->core_if->dev_if->in_ep_regs[ep->dwc_ep.num]->dtxfsts);
802 if(txstatus.b.txfspcavail < txfifosize.b.depth) {
803 DWC_WARN("%s() %s Data In Tx Fifo\n", __func__, usb_ep->name);
807 if (ep->dwc_ep.num == 0) {
808 ep->pcd->ep0state = EP0_STALL;
812 dwc_otg_ep_set_stall(ep->pcd->otg_dev->core_if,
817 if (ep->dwc_ep.num == 0) {
818 ep->pcd->ep0state = EP0_STALL;
822 dwc_otg_ep_set_stall(ep->pcd->otg_dev->core_if,
826 else if (value == 2) {
827 ep->dwc_ep.stall_clear_flag = 0;
829 else if (value == 3) {
830 ep->dwc_ep.stall_clear_flag = 1;
833 SPIN_UNLOCK_IRQRESTORE(&ep->pcd->lock, flags);
838 * This function allocates a DMA Descriptor chain for the Endpoint
839 * buffer to be used for a transfer to/from the specified endpoint.
841 dwc_otg_dma_desc_t* dwc_otg_ep_alloc_desc_chain(uint32_t * dma_desc_addr, uint32_t count)
844 return dma_alloc_coherent(NULL, count * sizeof(dwc_otg_dma_desc_t), dma_desc_addr, GFP_KERNEL);
848 * This function frees a DMA Descriptor chain that was allocated by ep_alloc_desc.
850 void dwc_otg_ep_free_desc_chain(dwc_otg_dma_desc_t* desc_addr, uint32_t dma_desc_addr, uint32_t count)
852 dma_free_coherent(NULL, count * sizeof(dwc_otg_dma_desc_t), desc_addr, dma_desc_addr);
858 * This function initializes a descriptor chain for Isochronous transfer
860 * @param core_if Programming view of DWC_otg controller.
861 * @param dwc_ep The EP to start the transfer on.
864 void dwc_otg_iso_ep_start_ddma_transfer(dwc_otg_core_if_t *core_if, dwc_ep_t *dwc_ep)
867 dsts_data_t dsts = { .d32 = 0};
868 depctl_data_t depctl = { .d32 = 0 };
869 volatile uint32_t *addr;
873 dwc_ep->desc_cnt = dwc_ep->buf_proc_intrvl / dwc_ep->bInterval;
875 dwc_ep->desc_cnt = dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / dwc_ep->bInterval;
878 /** Allocate descriptors for double buffering */
879 dwc_ep->iso_desc_addr = dwc_otg_ep_alloc_desc_chain(&dwc_ep->iso_dma_desc_addr,dwc_ep->desc_cnt*2);
880 if(dwc_ep->desc_addr) {
881 DWC_WARN("%s, can't allocate DMA descriptor chain\n", __func__);
885 dsts.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dsts);
888 if(dwc_ep->is_in == 0) {
889 desc_sts_data_t sts = { .d32 =0 };
890 dwc_otg_dma_desc_t* dma_desc = dwc_ep->iso_desc_addr;
892 uint32_t data_per_desc;
893 dwc_otg_dev_out_ep_regs_t *out_regs =
894 core_if->dev_if->out_ep_regs[dwc_ep->num];
897 addr = &core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl;
898 dma_ad = (dma_addr_t)dwc_read_reg32(&(out_regs->doepdma));
900 /** Buffer 0 descriptors setup */
901 dma_ad = dwc_ep->dma_addr0;
903 sts.b_iso_out.bs = BS_HOST_READY;
904 sts.b_iso_out.rxsts = 0;
906 sts.b_iso_out.sp = 0;
907 sts.b_iso_out.ioc = 0;
908 sts.b_iso_out.pid = 0;
909 sts.b_iso_out.framenum = 0;
912 for(i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; i+= dwc_ep->pkt_per_frm)
915 for(j = 0; j < dwc_ep->pkt_per_frm; ++j)
917 data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
918 dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
920 data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
921 sts.b_iso_out.rxbytes = data_per_desc;
922 writel((uint32_t)dma_ad, &dma_desc->buf);
923 writel(sts.d32, &dma_desc->status);
925 offset += data_per_desc;
927 (uint32_t)dma_ad += data_per_desc;
931 for(j = 0; j < dwc_ep->pkt_per_frm - 1; ++j)
933 data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
934 dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
935 data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
936 sts.b_iso_out.rxbytes = data_per_desc;
937 writel((uint32_t)dma_ad, &dma_desc->buf);
938 writel(sts.d32, &dma_desc->status);
940 offset += data_per_desc;
942 (uint32_t)dma_ad += data_per_desc;
945 sts.b_iso_out.ioc = 1;
946 data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
947 dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
948 data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
949 sts.b_iso_out.rxbytes = data_per_desc;
951 writel((uint32_t)dma_ad, &dma_desc->buf);
952 writel(sts.d32, &dma_desc->status);
955 /** Buffer 1 descriptors setup */
956 sts.b_iso_out.ioc = 0;
957 dma_ad = dwc_ep->dma_addr1;
960 for(i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; i+= dwc_ep->pkt_per_frm)
962 for(j = 0; j < dwc_ep->pkt_per_frm; ++j)
964 data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
965 dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
966 data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
967 sts.b_iso_out.rxbytes = data_per_desc;
968 writel((uint32_t)dma_ad, &dma_desc->buf);
969 writel(sts.d32, &dma_desc->status);
971 offset += data_per_desc;
973 (uint32_t)dma_ad += data_per_desc;
976 for(j = 0; j < dwc_ep->pkt_per_frm - 1; ++j)
978 data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
979 dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
980 data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
981 sts.b_iso_out.rxbytes = data_per_desc;
982 writel((uint32_t)dma_ad, &dma_desc->buf);
983 writel(sts.d32, &dma_desc->status);
985 offset += data_per_desc;
987 (uint32_t)dma_ad += data_per_desc;
990 sts.b_iso_out.ioc = 1;
992 data_per_desc = ((j + 1) * dwc_ep->maxpacket > dwc_ep->data_per_frame) ?
993 dwc_ep->data_per_frame - j * dwc_ep->maxpacket : dwc_ep->maxpacket;
994 data_per_desc += (data_per_desc % 4) ? (4 - data_per_desc % 4):0;
995 sts.b_iso_out.rxbytes = data_per_desc;
997 writel((uint32_t)dma_ad, &dma_desc->buf);
998 writel(sts.d32, &dma_desc->status);
1000 dwc_ep->next_frame = 0;
1002 /** Write dma_ad into DOEPDMA register */
1003 dwc_write_reg32(&(out_regs->doepdma),(uint32_t)dwc_ep->iso_dma_desc_addr);
1008 desc_sts_data_t sts = { .d32 =0 };
1009 dwc_otg_dma_desc_t* dma_desc = dwc_ep->iso_desc_addr;
1011 dwc_otg_dev_in_ep_regs_t *in_regs =
1012 core_if->dev_if->in_ep_regs[dwc_ep->num];
1013 unsigned int frmnumber;
1014 fifosize_data_t txfifosize,rxfifosize;
1016 txfifosize.d32 = dwc_read_reg32(&core_if->dev_if->in_ep_regs[dwc_ep->num]->dtxfsts);
1017 rxfifosize.d32 = dwc_read_reg32(&core_if->core_global_regs->grxfsiz);
1020 addr = &core_if->dev_if->in_ep_regs[dwc_ep->num]->diepctl;
1022 dma_ad = dwc_ep->dma_addr0;
1024 dsts.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dsts);
1026 sts.b_iso_in.bs = BS_HOST_READY;
1027 sts.b_iso_in.txsts = 0;
1028 sts.b_iso_in.sp = (dwc_ep->data_per_frame % dwc_ep->maxpacket)? 1 : 0;
1029 sts.b_iso_in.ioc = 0;
1030 sts.b_iso_in.pid = dwc_ep->pkt_per_frm;
1033 frmnumber = dwc_ep->next_frame;
1035 sts.b_iso_in.framenum = frmnumber;
1036 sts.b_iso_in.txbytes = dwc_ep->data_per_frame;
1039 /** Buffer 0 descriptors setup */
1040 for(i = 0; i < dwc_ep->desc_cnt - 1; i++)
1042 writel((uint32_t)dma_ad, &dma_desc->buf);
1043 writel(sts.d32, &dma_desc->status);
1046 (uint32_t)dma_ad += dwc_ep->data_per_frame;
1047 sts.b_iso_in.framenum += dwc_ep->bInterval;
1050 sts.b_iso_in.ioc = 1;
1051 writel((uint32_t)dma_ad, &dma_desc->buf);
1052 writel(sts.d32, &dma_desc->status);
1055 /** Buffer 1 descriptors setup */
1056 sts.b_iso_in.ioc = 0;
1057 dma_ad = dwc_ep->dma_addr1;
1059 for(i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; i+= dwc_ep->pkt_per_frm)
1061 writel((uint32_t)dma_ad, &dma_desc->buf);
1062 writel(sts.d32, &dma_desc->status);
1065 (uint32_t)dma_ad += dwc_ep->data_per_frame;
1066 sts.b_iso_in.framenum += dwc_ep->bInterval;
1068 sts.b_iso_in.ioc = 0;
1070 sts.b_iso_in.ioc = 1;
1073 writel((uint32_t)dma_ad, &dma_desc->buf);
1074 writel(sts.d32, &dma_desc->status);
1076 dwc_ep->next_frame = sts.b_iso_in.framenum + dwc_ep->bInterval;
1078 /** Write dma_ad into diepdma register */
1079 dwc_write_reg32(&(in_regs->diepdma),(uint32_t)dwc_ep->iso_dma_desc_addr);
1081 /** Enable endpoint, clear nak */
1084 depctl.b.usbactep = 1;
1087 dwc_modify_reg32(addr, depctl.d32,depctl.d32);
1088 depctl.d32 = dwc_read_reg32(addr);
1092 * This function initializes a descriptor chain for Isochronous transfer
1094 * @param core_if Programming view of DWC_otg controller.
1095 * @param ep The EP to start the transfer on.
1099 void dwc_otg_iso_ep_start_buf_transfer(dwc_otg_core_if_t *core_if, dwc_ep_t *ep)
1101 depctl_data_t depctl = { .d32 = 0 };
1102 volatile uint32_t *addr;
1106 addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
1108 addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
1112 if(core_if->dma_enable == 0 || core_if->dma_desc_enable!= 0) {
1115 deptsiz_data_t deptsiz = { .d32 = 0 };
1117 ep->xfer_len = ep->data_per_frame * ep->buf_proc_intrvl / ep->bInterval;
1118 ep->pkt_cnt = (ep->xfer_len - 1 + ep->maxpacket) /
1121 ep->xfer_buff = (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
1122 ep->dma_addr = (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
1125 /* Program the transfer size and packet count
1126 * as follows: xfersize = N * maxpacket +
1127 * short_packet pktcnt = N + (short_packet
1130 deptsiz.b.mc = ep->pkt_per_frm;
1131 deptsiz.b.xfersize = ep->xfer_len;
1133 (ep->xfer_len - 1 + ep->maxpacket) /
1135 dwc_write_reg32(&core_if->dev_if->in_ep_regs[ep->num]->dieptsiz, deptsiz.d32);
1137 /* Write the DMA register */
1138 dwc_write_reg32 (&(core_if->dev_if->in_ep_regs[ep->num]->diepdma), (uint32_t)ep->dma_addr);
1142 (ep->xfer_len + (ep->maxpacket - 1)) /
1144 deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket;
1146 dwc_write_reg32(&core_if->dev_if->out_ep_regs[ep->num]->doeptsiz, deptsiz.d32);
1148 /* Write the DMA register */
1149 dwc_write_reg32 (&(core_if->dev_if->out_ep_regs[ep->num]->doepdma), (uint32_t)ep->dma_addr);
1152 /** Enable endpoint, clear nak */
1154 dwc_modify_reg32(addr, depctl.d32,depctl.d32);
1159 dwc_modify_reg32(addr, depctl.d32,depctl.d32);
1165 * This function does the setup for a data transfer for an EP and
1166 * starts the transfer. For an IN transfer, the packets will be
1167 * loaded into the appropriate Tx FIFO in the ISR. For OUT transfers,
1168 * the packets are unloaded from the Rx FIFO in the ISR. the ISR.
1170 * @param core_if Programming view of DWC_otg controller.
1171 * @param ep The EP to start the transfer on.
1174 void dwc_otg_iso_ep_start_transfer(dwc_otg_core_if_t *core_if, dwc_ep_t *ep)
1176 if(core_if->dma_enable) {
1177 if(core_if->dma_desc_enable) {
1179 ep->desc_cnt = ep->pkt_cnt / ep->pkt_per_frm;
1181 ep->desc_cnt = ep->pkt_cnt;
1183 dwc_otg_iso_ep_start_ddma_transfer(core_if, ep);
1185 if(core_if->pti_enh_enable) {
1186 dwc_otg_iso_ep_start_buf_transfer(core_if, ep);
1188 ep->cur_pkt_addr = (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
1189 ep->cur_pkt_dma_addr = (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
1190 dwc_otg_iso_ep_start_frm_transfer(core_if, ep);
1194 ep->cur_pkt_addr = (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0;
1195 ep->cur_pkt_dma_addr = (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0;
1196 dwc_otg_iso_ep_start_frm_transfer(core_if, ep);
1201 * This function does the setup for a data transfer for an EP and
1202 * starts the transfer. For an IN transfer, the packets will be
1203 * loaded into the appropriate Tx FIFO in the ISR. For OUT transfers,
1204 * the packets are unloaded from the Rx FIFO in the ISR. the ISR.
1206 * @param core_if Programming view of DWC_otg controller.
1207 * @param ep The EP to start the transfer on.
1210 void dwc_otg_iso_ep_stop_transfer(dwc_otg_core_if_t *core_if, dwc_ep_t *ep)
1212 depctl_data_t depctl = { .d32 = 0 };
1213 volatile uint32_t *addr;
1215 if(ep->is_in == 1) {
1216 addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl;
1219 addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl;
1222 /* disable the ep */
1223 depctl.d32 = dwc_read_reg32(addr);
1228 dwc_write_reg32(addr, depctl.d32);
1230 if(core_if->dma_desc_enable &&
1231 ep->iso_desc_addr && ep->iso_dma_desc_addr) {
1232 dwc_otg_ep_free_desc_chain(ep->iso_desc_addr,ep->iso_dma_desc_addr,ep->desc_cnt * 2);
1235 /* reset varibales */
1240 ep->data_per_frame = 0;
1241 ep->data_pattern_frame = 0;
1243 ep->buf_proc_intrvl = 0;
1245 ep->proc_buf_num = 0;
1246 ep->pkt_per_frm = 0;
1247 ep->pkt_per_frm = 0;
1249 ep->iso_desc_addr = 0;
1250 ep->iso_dma_desc_addr = 0;
1255 * This function is used to submit an ISOC Transfer Request to an EP.
1257 * - Every time a sync period completes the request's completion callback
1258 * is called to provide data to the gadget driver.
1259 * - Once submitted the request cannot be modified.
1260 * - Each request is turned into periodic data packets untill ISO
1261 * Transfer is stopped..
1263 static int dwc_otg_pcd_iso_ep_start(struct usb_ep *usb_ep, struct usb_iso_request *req,
1264 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
1271 dwc_otg_pcd_ep_t *ep;
1274 unsigned long flags = 0;
1276 dwc_otg_core_if_t *core_if;
1281 if (!req || !req->process_buffer || !req->buf0 || !req->buf1) {
1282 DWC_WARN("%s, bad params\n", __func__);
1286 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
1288 if (!usb_ep || !ep->desc || ep->dwc_ep.num == 0) {
1289 DWC_WARN("%s, bad ep\n", __func__);
1294 core_if = GET_CORE_IF(pcd);
1296 dcfg.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dcfg);
1298 if (!pcd->driver || pcd->gadget.speed == USB_SPEED_UNKNOWN) {
1299 DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", pcd->gadget.speed);
1300 DWC_WARN("%s, bogus device state\n", __func__);
1304 SPIN_LOCK_IRQSAVE(&ep->pcd->lock, flags);
1306 dwc_ep = &ep->dwc_ep;
1309 DWC_WARN("%s, iso request in progress\n", __func__);
1311 req->status = -EINPROGRESS;
1313 dwc_ep->dma_addr0 = req->dma0;
1314 dwc_ep->dma_addr1 = req->dma1;
1316 dwc_ep->xfer_buff0 = req->buf0;
1317 dwc_ep->xfer_buff1 = req->buf1;
1321 dwc_ep->data_per_frame = req->data_per_frame;
1323 /** @todo - pattern data support is to be implemented in the future */
1324 dwc_ep->data_pattern_frame = req->data_pattern_frame;
1325 dwc_ep->sync_frame = req->sync_frame;
1327 dwc_ep->buf_proc_intrvl = req->buf_proc_intrvl;
1329 dwc_ep->bInterval = 1 << (ep->desc->bInterval - 1);
1331 dwc_ep->proc_buf_num = 0;
1333 dwc_ep->pkt_per_frm = 0;
1334 frm_data = ep->dwc_ep.data_per_frame;
1335 while(frm_data > 0) {
1336 dwc_ep->pkt_per_frm++;
1337 frm_data -= ep->dwc_ep.maxpacket;
1340 dsts.d32 = dwc_read_reg32(&core_if->dev_if->dev_global_regs->dsts);
1342 if(req->flags & USB_REQ_ISO_ASAP) {
1343 dwc_ep->next_frame = dsts.b.soffn + 1;
1344 if(dwc_ep->bInterval != 1){
1345 dwc_ep->next_frame = dwc_ep->next_frame + (dwc_ep->bInterval - 1 - dwc_ep->next_frame % dwc_ep->bInterval);
1348 dwc_ep->next_frame = req->start_frame;
1352 if(!core_if->pti_enh_enable) {
1353 dwc_ep->pkt_cnt = dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / dwc_ep->bInterval;
1356 (dwc_ep->data_per_frame * (dwc_ep->buf_proc_intrvl / dwc_ep->bInterval)
1357 - 1 + dwc_ep->maxpacket) / dwc_ep->maxpacket;
1360 if(core_if->dma_desc_enable) {
1362 dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / dwc_ep->bInterval;
1365 dwc_ep->pkt_info = kmalloc(sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt, GFP_KERNEL);
1366 if(!dwc_ep->pkt_info) {
1369 if(core_if->pti_enh_enable) {
1370 memset(dwc_ep->pkt_info, 0, sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt);
1373 dwc_ep->cur_pkt = 0;
1375 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
1377 dwc_otg_iso_ep_start_transfer(core_if, dwc_ep);
1383 * This function stops ISO EP Periodic Data Transfer.
1385 static int dwc_otg_pcd_iso_ep_stop(struct usb_ep *usb_ep, struct usb_iso_request *req)
1387 dwc_otg_pcd_ep_t *ep;
1390 unsigned long flags;
1392 ep = container_of(usb_ep, dwc_otg_pcd_ep_t, ep);
1394 if (!usb_ep || !ep->desc || ep->dwc_ep.num == 0) {
1395 DWC_WARN("%s, bad ep\n", __func__);
1401 if (!pcd->driver || pcd->gadget.speed == USB_SPEED_UNKNOWN) {
1402 DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", pcd->gadget.speed);
1403 DWC_WARN("%s, bogus device state\n", __func__);
1407 dwc_ep = &ep->dwc_ep;
1409 dwc_otg_iso_ep_stop_transfer(GET_CORE_IF(pcd), dwc_ep);
1411 kfree(dwc_ep->pkt_info);
1413 SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
1415 if(ep->iso_req != req) {
1419 req->status = -ECONNRESET;
1421 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
1430 * This function is used for perodical data exchnage between PCD and gadget drivers.
1431 * for Isochronous EPs
1433 * - Every time a sync period completes this function is called to
1434 * perform data exchange between PCD and gadget
1436 void dwc_otg_iso_buffer_done(dwc_otg_pcd_ep_t *ep, dwc_otg_pcd_iso_request_t *req)
1439 struct usb_gadget_iso_packet_descriptor *iso_packet;
1442 dwc_ep = &ep->dwc_ep;
1444 if(ep->iso_req->status == -ECONNRESET) {
1445 DWC_PRINT("Device has already disconnected\n");
1446 /*Device has been disconnected*/
1450 if(dwc_ep->proc_buf_num != 0) {
1451 iso_packet = ep->iso_req->iso_packet_desc0;
1455 iso_packet = ep->iso_req->iso_packet_desc1;
1458 /* Fill in ISOC packets descriptors & pass to gadget driver*/
1460 for(i = 0; i < dwc_ep->pkt_cnt; ++i) {
1461 iso_packet[i].status = dwc_ep->pkt_info[i].status;
1462 iso_packet[i].offset = dwc_ep->pkt_info[i].offset;
1463 iso_packet[i].actual_length = dwc_ep->pkt_info[i].length;
1464 dwc_ep->pkt_info[i].status = 0;
1465 dwc_ep->pkt_info[i].offset = 0;
1466 dwc_ep->pkt_info[i].length = 0;
1469 /* Call callback function to process data buffer */
1470 ep->iso_req->status = 0;/* success */
1472 SPIN_UNLOCK(&ep->pcd->lock);
1473 ep->iso_req->process_buffer(&ep->ep, ep->iso_req);
1474 SPIN_LOCK(&ep->pcd->lock);
1478 static struct usb_iso_request *dwc_otg_pcd_alloc_iso_request(struct usb_ep *ep,int packets,
1479 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
1486 struct usb_iso_request *pReq = NULL;
1490 req_size = sizeof(struct usb_iso_request);
1491 req_size += (2 * packets * (sizeof(struct usb_gadget_iso_packet_descriptor)));
1494 pReq = kmalloc(req_size, gfp_flags);
1496 DWC_WARN("%s, can't allocate Iso Request\n", __func__);
1499 pReq->iso_packet_desc0 = (void*) (pReq + 1);
1501 pReq->iso_packet_desc1 = pReq->iso_packet_desc0 + packets;
1506 static void dwc_otg_pcd_free_iso_request(struct usb_ep *ep, struct usb_iso_request *req)
1511 static struct usb_isoc_ep_ops dwc_otg_pcd_ep_ops =
1515 .enable = dwc_otg_pcd_ep_enable,
1516 .disable = dwc_otg_pcd_ep_disable,
1518 .alloc_request = dwc_otg_pcd_alloc_request,
1519 .free_request = dwc_otg_pcd_free_request,
1521 .alloc_buffer = dwc_otg_pcd_alloc_buffer,
1522 .free_buffer = dwc_otg_pcd_free_buffer,
1524 .queue = dwc_otg_pcd_ep_queue,
1525 .dequeue = dwc_otg_pcd_ep_dequeue,
1527 .set_halt = dwc_otg_pcd_ep_set_halt,
1531 .iso_ep_start = dwc_otg_pcd_iso_ep_start,
1532 .iso_ep_stop = dwc_otg_pcd_iso_ep_stop,
1533 .alloc_iso_request = dwc_otg_pcd_alloc_iso_request,
1534 .free_iso_request = dwc_otg_pcd_free_iso_request,
1540 static struct usb_ep_ops dwc_otg_pcd_ep_ops =
1542 .enable = dwc_otg_pcd_ep_enable,
1543 .disable = dwc_otg_pcd_ep_disable,
1545 .alloc_request = dwc_otg_pcd_alloc_request,
1546 .free_request = dwc_otg_pcd_free_request,
1548 .alloc_buffer = dwc_otg_pcd_alloc_buffer,
1549 .free_buffer = dwc_otg_pcd_free_buffer,
1551 .queue = dwc_otg_pcd_ep_queue,
1552 .dequeue = dwc_otg_pcd_ep_dequeue,
1554 .set_halt = dwc_otg_pcd_ep_set_halt,
1561 #endif /* DWC_EN_ISOC */
1562 /* Gadget Operations */
1564 * The following gadget operations will be implemented in the DWC_otg
1565 * PCD. Functions in the API that are not described below are not
1568 * The Gadget API provides wrapper functions for each of the function
1569 * pointers defined in usb_gadget_ops. The Gadget Driver calls the
1570 * wrapper function, which then calls the underlying PCD function. The
1571 * following sections are named according to the wrapper functions
1572 * (except for ioctl, which doesn't have a wrapper function). Within
1573 * each section, the corresponding DWC_otg PCD function name is
1579 *Gets the USB Frame number of the last SOF.
1581 static int dwc_otg_pcd_get_frame(struct usb_gadget *gadget)
1585 DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, gadget);
1591 pcd = container_of(gadget, dwc_otg_pcd_t, gadget);
1592 dwc_otg_get_frame_number(GET_CORE_IF(pcd));
1598 void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t *pcd)
1600 uint32_t *addr = (uint32_t *)&(GET_CORE_IF(pcd)->core_global_regs->gotgctl);
1604 val.d32 = dwc_read_reg32(addr);
1606 DWC_ERROR("Session Request Already active!\n");
1610 DWC_NOTICE("Session Request Initated\n");
1611 mem.d32 = dwc_read_reg32(addr);
1613 dwc_write_reg32(addr, mem.d32);
1615 /* Start the SRP timer */
1616 dwc_otg_pcd_start_srp_timer(pcd);
1620 void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t *pcd, int set)
1622 dctl_data_t dctl = {.d32=0};
1623 volatile uint32_t *addr = &(GET_CORE_IF(pcd)->dev_if->dev_global_regs->dctl);
1625 if (dwc_otg_is_device_mode(GET_CORE_IF(pcd))) {
1626 if (pcd->remote_wakeup_enable) {
1628 dctl.b.rmtwkupsig = 1;
1629 dwc_modify_reg32(addr, 0, dctl.d32);
1630 DWC_DEBUGPL(DBG_PCD, "Set Remote Wakeup\n");
1632 dwc_modify_reg32(addr, dctl.d32, 0);
1633 DWC_DEBUGPL(DBG_PCD, "Clear Remote Wakeup\n");
1639 DWC_DEBUGPL(DBG_PCD, "Remote Wakeup is disabled\n");
1646 * Initiates Session Request Protocol (SRP) to wakeup the host if no
1647 * session is in progress. If a session is already in progress, but
1648 * the device is suspended, remote wakeup signaling is started.
1651 static int dwc_otg_pcd_wakeup(struct usb_gadget *gadget)
1653 unsigned long flags;
1656 gotgctl_data_t gotgctl;
1658 DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, gadget);
1664 pcd = container_of(gadget, dwc_otg_pcd_t, gadget);
1666 SPIN_LOCK_IRQSAVE(&pcd->lock, flags);
1669 * This function starts the Protocol if no session is in progress. If
1670 * a session is already in progress, but the device is suspended,
1671 * remote wakeup signaling is started.
1674 /* Check if valid session */
1675 gotgctl.d32 = dwc_read_reg32(&(GET_CORE_IF(pcd)->core_global_regs->gotgctl));
1676 if (gotgctl.b.bsesvld) {
1677 /* Check if suspend state */
1678 dsts.d32 = dwc_read_reg32(&(GET_CORE_IF(pcd)->dev_if->dev_global_regs->dsts));
1679 if (dsts.b.suspsts) {
1680 dwc_otg_pcd_remote_wakeup(pcd, 1);
1684 dwc_otg_pcd_initiate_srp(pcd);
1687 SPIN_UNLOCK_IRQRESTORE(&pcd->lock, flags);
1691 static const struct usb_gadget_ops dwc_otg_pcd_ops =
1693 .get_frame = dwc_otg_pcd_get_frame,
1694 .wakeup = dwc_otg_pcd_wakeup,
1695 // current versions must always be self-powered
1699 * This function updates the otg values in the gadget structure.
1701 void dwc_otg_pcd_update_otg(dwc_otg_pcd_t *pcd, const unsigned reset)
1704 if (!pcd->gadget.is_otg)
1708 pcd->b_hnp_enable = 0;
1709 pcd->a_hnp_support = 0;
1710 pcd->a_alt_hnp_support = 0;
1713 pcd->gadget.b_hnp_enable = pcd->b_hnp_enable;
1714 pcd->gadget.a_hnp_support = pcd->a_hnp_support;
1715 pcd->gadget.a_alt_hnp_support = pcd->a_alt_hnp_support;
1719 * This function is the top level PCD interrupt handler.
1721 static irqreturn_t dwc_otg_pcd_irq(int irq, void *dev
1722 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
1727 dwc_otg_pcd_t *pcd = dev;
1728 int32_t retval = IRQ_NONE;
1730 retval = dwc_otg_pcd_handle_intr(pcd);
1731 return IRQ_RETVAL(retval);
1735 * PCD Callback function for initializing the PCD when switching to
1738 * @param p void pointer to the <code>dwc_otg_pcd_t</code>
1740 static int32_t dwc_otg_pcd_start_cb(void *p)
1742 dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *)p;
1745 * Initialized the Core for Device mode.
1747 if (dwc_otg_is_device_mode(GET_CORE_IF(pcd))) {
1748 dwc_otg_core_dev_init(GET_CORE_IF(pcd));
1754 * PCD Callback function for stopping the PCD when switching to Host
1757 * @param p void pointer to the <code>dwc_otg_pcd_t</code>
1759 static int32_t dwc_otg_pcd_stop_cb(void *p)
1761 dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *)p;
1762 extern void dwc_otg_pcd_stop(dwc_otg_pcd_t *_pcd);
1764 dwc_otg_pcd_stop(pcd);
1770 * PCD Callback function for notifying the PCD when resuming from
1773 * @param p void pointer to the <code>dwc_otg_pcd_t</code>
1775 static int32_t dwc_otg_pcd_suspend_cb(void *p)
1777 dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *)p;
1779 if (pcd->driver && pcd->driver->resume) {
1780 SPIN_UNLOCK(&pcd->lock);
1781 pcd->driver->suspend(&pcd->gadget);
1782 SPIN_LOCK(&pcd->lock);
1790 * PCD Callback function for notifying the PCD when resuming from
1793 * @param p void pointer to the <code>dwc_otg_pcd_t</code>
1795 static int32_t dwc_otg_pcd_resume_cb(void *p)
1797 dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *)p;
1799 if (pcd->driver && pcd->driver->resume) {
1800 SPIN_UNLOCK(&pcd->lock);
1801 pcd->driver->resume(&pcd->gadget);
1802 SPIN_LOCK(&pcd->lock);
1805 /* Stop the SRP timeout timer. */
1806 if ((GET_CORE_IF(pcd)->core_params->phy_type != DWC_PHY_TYPE_PARAM_FS) ||
1807 (!GET_CORE_IF(pcd)->core_params->i2c_enable)) {
1808 if (GET_CORE_IF(pcd)->srp_timer_started) {
1809 GET_CORE_IF(pcd)->srp_timer_started = 0;
1810 del_timer(&pcd->srp_timer);
1818 * PCD Callback structure for handling mode switching.
1820 static dwc_otg_cil_callbacks_t pcd_callbacks =
1822 .start = dwc_otg_pcd_start_cb,
1823 .stop = dwc_otg_pcd_stop_cb,
1824 .suspend = dwc_otg_pcd_suspend_cb,
1825 .resume_wakeup = dwc_otg_pcd_resume_cb,
1826 .p = 0, /* Set at registration */
1830 * This function is called when the SRP timer expires. The SRP should
1831 * complete within 6 seconds.
1833 static void srp_timeout(unsigned long ptr)
1835 gotgctl_data_t gotgctl;
1836 dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *)ptr;
1837 volatile uint32_t *addr = &core_if->core_global_regs->gotgctl;
1839 gotgctl.d32 = dwc_read_reg32(addr);
1841 core_if->srp_timer_started = 0;
1843 if ((core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS) &&
1844 (core_if->core_params->i2c_enable)) {
1845 DWC_PRINT("SRP Timeout\n");
1847 if ((core_if->srp_success) &&
1848 (gotgctl.b.bsesvld)) {
1849 if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) {
1850 core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p);
1853 /* Clear Session Request */
1855 gotgctl.b.sesreq = 1;
1856 dwc_modify_reg32(&core_if->core_global_regs->gotgctl,
1859 core_if->srp_success = 0;
1862 DWC_ERROR("Device not connected/responding\n");
1863 gotgctl.b.sesreq = 0;
1864 dwc_write_reg32(addr, gotgctl.d32);
1867 else if (gotgctl.b.sesreq) {
1868 DWC_PRINT("SRP Timeout\n");
1870 DWC_ERROR("Device not connected/responding\n");
1871 gotgctl.b.sesreq = 0;
1872 dwc_write_reg32(addr, gotgctl.d32);
1875 DWC_PRINT(" SRP GOTGCTL=%0x\n", gotgctl.d32);
1880 * Start the SRP timer to detect when the SRP does not complete within
1883 * @param pcd the pcd structure.
1885 void dwc_otg_pcd_start_srp_timer(dwc_otg_pcd_t *pcd)
1887 struct timer_list *srp_timer = &pcd->srp_timer;
1888 GET_CORE_IF(pcd)->srp_timer_started = 1;
1889 init_timer(srp_timer);
1890 srp_timer->function = srp_timeout;
1891 srp_timer->data = (unsigned long)GET_CORE_IF(pcd);
1892 srp_timer->expires = jiffies + (HZ*6);
1893 add_timer(srp_timer);
1900 extern void start_next_request(dwc_otg_pcd_ep_t *ep);
1902 static void start_xfer_tasklet_func (unsigned long data)
1904 dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t*)data;
1905 dwc_otg_core_if_t *core_if = pcd->otg_dev->core_if;
1908 depctl_data_t diepctl;
1910 DWC_DEBUGPL(DBG_PCDV, "Start xfer tasklet\n");
1912 diepctl.d32 = dwc_read_reg32(&core_if->dev_if->in_ep_regs[0]->diepctl);
1914 if (pcd->ep0.queue_sof) {
1915 pcd->ep0.queue_sof = 0;
1916 start_next_request (&pcd->ep0);
1920 for (i=0; i<core_if->dev_if->num_in_eps; i++)
1922 depctl_data_t diepctl;
1923 diepctl.d32 = dwc_read_reg32(&core_if->dev_if->in_ep_regs[i]->diepctl);
1925 if (pcd->in_ep[i].queue_sof) {
1926 pcd->in_ep[i].queue_sof = 0;
1927 start_next_request (&pcd->in_ep[i]);
1941 static struct tasklet_struct start_xfer_tasklet = {
1944 .count = ATOMIC_INIT(0),
1945 .func = start_xfer_tasklet_func,
1949 * This function initialized the pcd Dp structures to there default
1952 * @param pcd the pcd structure.
1954 void dwc_otg_pcd_reinit(dwc_otg_pcd_t *pcd)
1956 static const char * names[] =
1994 int in_ep_cntr, out_ep_cntr;
1996 uint32_t num_in_eps = (GET_CORE_IF(pcd))->dev_if->num_in_eps;
1997 uint32_t num_out_eps = (GET_CORE_IF(pcd))->dev_if->num_out_eps;
1998 dwc_otg_pcd_ep_t *ep;
2000 DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, pcd);
2002 INIT_LIST_HEAD (&pcd->gadget.ep_list);
2003 pcd->gadget.ep0 = &pcd->ep0.ep;
2004 pcd->gadget.speed = USB_SPEED_UNKNOWN;
2006 INIT_LIST_HEAD (&pcd->gadget.ep0->ep_list);
2009 * Initialize the EP0 structure.
2013 /* Init EP structure */
2018 /* Init DWC ep structure */
2020 ep->dwc_ep.active = 0;
2021 ep->dwc_ep.tx_fifo_num = 0;
2022 /* Control until ep is actvated */
2023 ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2024 ep->dwc_ep.maxpacket = MAX_PACKET_SIZE;
2025 ep->dwc_ep.dma_addr = 0;
2026 ep->dwc_ep.start_xfer_buff = 0;
2027 ep->dwc_ep.xfer_buff = 0;
2028 ep->dwc_ep.xfer_len = 0;
2029 ep->dwc_ep.xfer_count = 0;
2030 ep->dwc_ep.sent_zlp = 0;
2031 ep->dwc_ep.total_len = 0;
2033 ep->dwc_ep.desc_addr = 0;
2034 ep->dwc_ep.dma_desc_addr = 0;
2037 /* Init the usb_ep structure. */
2038 ep->ep.name = names[0];
2039 ep->ep.ops = (struct usb_ep_ops*)&dwc_otg_pcd_ep_ops;
2042 * @todo NGS: What should the max packet size be set to
2043 * here? Before EP type is set?
2045 ep->ep.maxpacket = MAX_PACKET_SIZE;
2047 list_add_tail (&ep->ep.ep_list, &pcd->gadget.ep_list);
2049 INIT_LIST_HEAD (&ep->queue);
2051 * Initialize the EP structures.
2054 hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 3;
2056 for (i = 1; in_ep_cntr < num_in_eps; i++)
2058 if((hwcfg1 & 0x1) == 0) {
2059 dwc_otg_pcd_ep_t *ep = &pcd->in_ep[in_ep_cntr];
2062 /* Init EP structure */
2067 /* Init DWC ep structure */
2068 ep->dwc_ep.is_in = 1;
2070 ep->dwc_ep.active = 0;
2071 ep->dwc_ep.tx_fifo_num = 0;
2073 /* Control until ep is actvated */
2074 ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2075 ep->dwc_ep.maxpacket = MAX_PACKET_SIZE;
2076 ep->dwc_ep.dma_addr = 0;
2077 ep->dwc_ep.start_xfer_buff = 0;
2078 ep->dwc_ep.xfer_buff = 0;
2079 ep->dwc_ep.xfer_len = 0;
2080 ep->dwc_ep.xfer_count = 0;
2081 ep->dwc_ep.sent_zlp = 0;
2082 ep->dwc_ep.total_len = 0;
2084 ep->dwc_ep.desc_addr = 0;
2085 ep->dwc_ep.dma_desc_addr = 0;
2087 /* Init the usb_ep structure. */
2088 ep->ep.name = names[i];
2089 ep->ep.ops = (struct usb_ep_ops*)&dwc_otg_pcd_ep_ops;
2092 * @todo NGS: What should the max packet size be set to
2093 * here? Before EP type is set?
2095 ep->ep.maxpacket = MAX_PACKET_SIZE;
2097 list_add_tail (&ep->ep.ep_list, &pcd->gadget.ep_list);
2099 INIT_LIST_HEAD (&ep->queue);
2105 hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 2;
2107 for (i = 1; out_ep_cntr < num_out_eps; i++)
2109 if((hwcfg1 & 0x1) == 0) {
2110 dwc_otg_pcd_ep_t *ep = &pcd->out_ep[out_ep_cntr];
2113 /* Init EP structure */
2118 /* Init DWC ep structure */
2119 ep->dwc_ep.is_in = 0;
2121 ep->dwc_ep.active = 0;
2122 ep->dwc_ep.tx_fifo_num = 0;
2123 /* Control until ep is actvated */
2124 ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2125 ep->dwc_ep.maxpacket = MAX_PACKET_SIZE;
2126 ep->dwc_ep.dma_addr = 0;
2127 ep->dwc_ep.start_xfer_buff = 0;
2128 ep->dwc_ep.xfer_buff = 0;
2129 ep->dwc_ep.xfer_len = 0;
2130 ep->dwc_ep.xfer_count = 0;
2131 ep->dwc_ep.sent_zlp = 0;
2132 ep->dwc_ep.total_len = 0;
2135 /* Init the usb_ep structure. */
2136 ep->ep.name = names[15 + i];
2137 ep->ep.ops = (struct usb_ep_ops*)&dwc_otg_pcd_ep_ops;
2139 * @todo NGS: What should the max packet size be set to
2140 * here? Before EP type is set?
2142 ep->ep.maxpacket = MAX_PACKET_SIZE;
2144 list_add_tail (&ep->ep.ep_list, &pcd->gadget.ep_list);
2146 INIT_LIST_HEAD (&ep->queue);
2151 /* remove ep0 from the list. There is a ep0 pointer.*/
2152 list_del_init (&pcd->ep0.ep.ep_list);
2154 pcd->ep0state = EP0_DISCONNECT;
2155 pcd->ep0.ep.maxpacket = MAX_EP0_SIZE;
2156 pcd->ep0.dwc_ep.maxpacket = MAX_EP0_SIZE;
2157 pcd->ep0.dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL;
2161 * This function releases the Gadget device.
2162 * required by device_unregister().
2164 * @todo Should this do something? Should it free the PCD?
2166 static void dwc_otg_pcd_gadget_release(struct device *dev)
2168 DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, dev);
2174 * This function initialized the PCD portion of the driver.
2178 int dwc_otg_pcd_init(struct device *dev)
2180 static char pcd_name[] = "dwc_otg_pcd";
2182 dwc_otg_core_if_t* core_if;
2183 dwc_otg_dev_if_t* dev_if;
2184 dwc_otg_device_t *otg_dev = dev_get_drvdata(dev);
2188 DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n",__func__, dev);
2190 * Allocate PCD structure
2192 pcd = kmalloc(sizeof(dwc_otg_pcd_t), GFP_KERNEL);
2198 memset(pcd, 0, sizeof(dwc_otg_pcd_t));
2199 spin_lock_init(&pcd->lock);
2203 pcd->gadget.name = pcd_name;
2204 strcpy(pcd->gadget.dev.bus_id, "gadget");
2206 pcd->otg_dev = dev_get_drvdata(dev);
2208 pcd->gadget.dev.parent = dev;
2209 pcd->gadget.dev.release = dwc_otg_pcd_gadget_release;
2210 pcd->gadget.ops = &dwc_otg_pcd_ops;
2212 core_if = GET_CORE_IF(pcd);
2213 dev_if = core_if->dev_if;
2215 if(core_if->hwcfg4.b.ded_fifo_en) {
2216 DWC_PRINT("Dedicated Tx FIFOs mode\n");
2219 DWC_PRINT("Shared Tx FIFO mode\n");
2222 /* If the module is set to FS or if the PHY_TYPE is FS then the gadget
2223 * should not report as dual-speed capable. replace the following line
2224 * with the block of code below it once the software is debugged for
2225 * this. If is_dualspeed = 0 then the gadget driver should not report
2226 * a device qualifier descriptor when queried. */
2227 if ((GET_CORE_IF(pcd)->core_params->speed == DWC_SPEED_PARAM_FULL) ||
2228 ((GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type == 2) &&
2229 (GET_CORE_IF(pcd)->hwcfg2.b.fs_phy_type == 1) &&
2230 (GET_CORE_IF(pcd)->core_params->ulpi_fs_ls))) {
2231 pcd->gadget.is_dualspeed = 0;
2234 pcd->gadget.is_dualspeed = 1;
2237 if ((otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE) ||
2238 (otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST) ||
2239 (otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) ||
2240 (otg_dev->core_if->hwcfg2.b.op_mode == DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)) {
2241 pcd->gadget.is_otg = 0;
2244 pcd->gadget.is_otg = 1;
2249 /* Register the gadget device */
2250 retval = device_register(&pcd->gadget.dev);
2258 * Initialized the Core for Device mode.
2260 if (dwc_otg_is_device_mode(core_if)) {
2261 dwc_otg_core_dev_init(core_if);
2265 * Initialize EP structures
2267 dwc_otg_pcd_reinit(pcd);
2270 * Register the PCD Callbacks.
2272 dwc_otg_cil_register_pcd_callbacks(otg_dev->core_if, &pcd_callbacks,
2275 * Setup interupt handler
2277 DWC_DEBUGPL(DBG_ANY, "registering handler for irq%d\n", otg_dev->irq);
2278 retval = request_irq(otg_dev->irq, dwc_otg_pcd_irq,
2279 SA_SHIRQ, pcd->gadget.name, pcd);
2281 DWC_ERROR("request of irq%d failed\n", otg_dev->irq);
2282 device_unregister(&pcd->gadget.dev);
2288 * Initialize the DMA buffer for SETUP packets
2290 if (GET_CORE_IF(pcd)->dma_enable) {
2291 pcd->setup_pkt = dma_alloc_coherent (NULL, sizeof (*pcd->setup_pkt) * 5, &pcd->setup_pkt_dma_handle, 0);
2292 if (pcd->setup_pkt == 0) {
2293 free_irq(otg_dev->irq, pcd);
2294 device_unregister(&pcd->gadget.dev);
2299 pcd->status_buf = dma_alloc_coherent (NULL, sizeof (uint16_t), &pcd->status_buf_dma_handle, 0);
2300 if (pcd->status_buf == 0) {
2301 dma_free_coherent(NULL, sizeof(*pcd->setup_pkt), pcd->setup_pkt, pcd->setup_pkt_dma_handle);
2302 free_irq(otg_dev->irq, pcd);
2303 device_unregister(&pcd->gadget.dev);
2308 if (GET_CORE_IF(pcd)->dma_desc_enable) {
2309 dev_if->setup_desc_addr[0] = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_setup_desc_addr[0], 1);
2310 dev_if->setup_desc_addr[1] = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_setup_desc_addr[1], 1);
2311 dev_if->in_desc_addr = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_in_desc_addr, 1);
2312 dev_if->out_desc_addr = dwc_otg_ep_alloc_desc_chain(&dev_if->dma_out_desc_addr, 1);
2314 if(dev_if->setup_desc_addr[0] == 0
2315 || dev_if->setup_desc_addr[1] == 0
2316 || dev_if->in_desc_addr == 0
2317 || dev_if->out_desc_addr == 0 ) {
2319 if(dev_if->out_desc_addr)
2320 dwc_otg_ep_free_desc_chain(dev_if->out_desc_addr, dev_if->dma_out_desc_addr, 1);
2321 if(dev_if->in_desc_addr)
2322 dwc_otg_ep_free_desc_chain(dev_if->in_desc_addr, dev_if->dma_in_desc_addr, 1);
2323 if(dev_if->setup_desc_addr[1])
2324 dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[1], dev_if->dma_setup_desc_addr[1], 1);
2325 if(dev_if->setup_desc_addr[0])
2326 dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[0], dev_if->dma_setup_desc_addr[0], 1);
2329 dma_free_coherent(NULL, sizeof(*pcd->status_buf), pcd->status_buf, pcd->setup_pkt_dma_handle);
2330 dma_free_coherent(NULL, sizeof(*pcd->setup_pkt), pcd->setup_pkt, pcd->setup_pkt_dma_handle);
2332 free_irq(otg_dev->irq, pcd);
2333 device_unregister(&pcd->gadget.dev);
2341 pcd->setup_pkt = kmalloc (sizeof (*pcd->setup_pkt) * 5, GFP_KERNEL);
2342 if (pcd->setup_pkt == 0) {
2343 free_irq(otg_dev->irq, pcd);
2344 device_unregister(&pcd->gadget.dev);
2349 pcd->status_buf = kmalloc (sizeof (uint16_t), GFP_KERNEL);
2350 if (pcd->status_buf == 0) {
2351 kfree(pcd->setup_pkt);
2352 free_irq(otg_dev->irq, pcd);
2353 device_unregister(&pcd->gadget.dev);
2360 /* Initialize tasklet */
2361 start_xfer_tasklet.data = (unsigned long)pcd;
2362 pcd->start_xfer_tasklet = &start_xfer_tasklet;
2370 void dwc_otg_pcd_remove(struct device *dev)
2372 dwc_otg_device_t *otg_dev = dev_get_drvdata(dev);
2373 dwc_otg_pcd_t *pcd = otg_dev->pcd;
2374 dwc_otg_dev_if_t* dev_if = GET_CORE_IF(pcd)->dev_if;
2376 DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, dev);
2381 free_irq(otg_dev->irq, pcd);
2383 /* start with the driver above us */
2385 /* should have been done already by driver model core */
2386 DWC_WARN("driver '%s' is still registered\n",
2387 pcd->driver->driver.name);
2388 usb_gadget_unregister_driver(pcd->driver);
2390 device_unregister(&pcd->gadget.dev);
2392 if (GET_CORE_IF(pcd)->dma_enable) {
2393 dma_free_coherent (NULL, sizeof (*pcd->setup_pkt) * 5, pcd->setup_pkt, pcd->setup_pkt_dma_handle);
2394 dma_free_coherent (NULL, sizeof (uint16_t), pcd->status_buf, pcd->status_buf_dma_handle);
2395 if (GET_CORE_IF(pcd)->dma_desc_enable) {
2396 dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[0], dev_if->dma_setup_desc_addr[0], 1);
2397 dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[1], dev_if->dma_setup_desc_addr[1], 1);
2398 dwc_otg_ep_free_desc_chain(dev_if->in_desc_addr, dev_if->dma_in_desc_addr, 1);
2399 dwc_otg_ep_free_desc_chain(dev_if->out_desc_addr, dev_if->dma_out_desc_addr, 1);
2403 kfree (pcd->setup_pkt);
2404 kfree (pcd->status_buf);
2412 * This function registers a gadget driver with the PCD.
2414 * When a driver is successfully registered, it will receive control
2415 * requests including set_configuration(), which enables non-control
2416 * requests. then usb traffic follows until a disconnect is reported.
2417 * then a host may connect again, or the driver might get unbound.
2419 * @param driver The driver being registered
2421 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
2425 DWC_DEBUGPL(DBG_PCD, "registering gadget driver '%s'\n", driver->driver.name);
2427 if (!driver || driver->speed == USB_SPEED_UNKNOWN ||
2430 !driver->disconnect ||
2432 DWC_DEBUGPL(DBG_PCDV,"EINVAL\n");
2436 DWC_DEBUGPL(DBG_PCDV,"ENODEV\n");
2439 if (s_pcd->driver != 0) {
2440 DWC_DEBUGPL(DBG_PCDV,"EBUSY (%p)\n", s_pcd->driver);
2444 /* hook up the driver */
2445 s_pcd->driver = driver;
2446 s_pcd->gadget.dev.driver = &driver->driver;
2448 DWC_DEBUGPL(DBG_PCD, "bind to driver %s\n", driver->driver.name);
2449 retval = driver->bind(&s_pcd->gadget);
2451 DWC_ERROR("bind to driver %s --> error %d\n",
2452 driver->driver.name, retval);
2454 s_pcd->gadget.dev.driver = 0;
2457 DWC_DEBUGPL(DBG_ANY, "registered gadget driver '%s'\n",
2458 driver->driver.name);
2462 EXPORT_SYMBOL(usb_gadget_register_driver);
2465 * This function unregisters a gadget driver
2467 * @param driver The driver being unregistered
2469 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2471 //DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, _driver);
2474 DWC_DEBUGPL(DBG_ANY, "%s Return(%d): s_pcd==0\n", __func__,
2478 if (driver == 0 || driver != s_pcd->driver) {
2479 DWC_DEBUGPL(DBG_ANY, "%s Return(%d): driver?\n", __func__,
2484 driver->unbind(&s_pcd->gadget);
2487 DWC_DEBUGPL(DBG_ANY, "unregistered driver '%s'\n",
2488 driver->driver.name);
2491 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2493 #endif /* DWC_HOST_ONLY */