1 From 3282055a7d0a304d541dbdbe2e32167e1a2f117c Mon Sep 17 00:00:00 2001
2 From: Boris BREZILLON <boris.brezillon@free-electrons.com>
3 Date: Mon, 28 Jul 2014 14:20:54 +0200
4 Subject: [PATCH] mtd: nand: Take nand_ecc_ctrl initialization out of
7 Take ECC initialization code portion out of nand_scan_tail so that we can
8 re-use this implementation.
10 This commit only moves some code around and makes no functional changes.
12 Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
13 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
15 drivers/mtd/nand/nand_base.c | 91 +++++++++++++++++++++++++++-----------------
16 1 file changed, 56 insertions(+), 35 deletions(-)
18 --- a/drivers/mtd/nand/nand_base.c
19 +++ b/drivers/mtd/nand/nand_base.c
20 @@ -3892,42 +3892,15 @@ static bool nand_ecc_strength_good(struc
21 return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds;
25 - * nand_scan_tail - [NAND Interface] Scan for the NAND device
26 - * @mtd: MTD device structure
28 - * This is the second phase of the normal nand_scan() function. It fills out
29 - * all the uninitialized function pointers with the defaults and scans for a
30 - * bad block table if appropriate.
32 + * Initialize ECC struct:
33 + * - fill ECC struct with default function/values when these ones are undefined
34 + * - fill ECC infos based on MTD device
36 -int nand_scan_tail(struct mtd_info *mtd)
37 +static int nand_ecc_ctrl_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc)
40 - struct nand_chip *chip = mtd->priv;
41 - struct nand_ecc_ctrl *ecc = &chip->ecc;
42 - struct nand_buffers *nbuf;
44 - /* New bad blocks should be marked in OOB, flash-based BBT, or both */
45 - BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
46 - !(chip->bbt_options & NAND_BBT_USE_FLASH));
48 - if (!(chip->options & NAND_OWN_BUFFERS)) {
49 - nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize
50 - + mtd->oobsize * 3, GFP_KERNEL);
53 - nbuf->ecccalc = (uint8_t *)(nbuf + 1);
54 - nbuf->ecccode = nbuf->ecccalc + mtd->oobsize;
55 - nbuf->databuf = nbuf->ecccode + mtd->oobsize;
57 - chip->buffers = nbuf;
63 - /* Set the internal oob buffer location, just after the page data */
64 - chip->oob_poi = chip->buffers->databuf + mtd->writesize;
67 * If no default placement scheme is given, select an appropriate one.
68 @@ -3953,9 +3926,6 @@ int nand_scan_tail(struct mtd_info *mtd)
72 - if (!chip->write_page)
73 - chip->write_page = nand_write_page;
76 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
77 * selected and we have 256 byte pagesize fallback to software ECC
78 @@ -4125,6 +4095,57 @@ int nand_scan_tail(struct mtd_info *mtd)
80 ecc->total = ecc->steps * ecc->bytes;
86 + * nand_scan_tail - [NAND Interface] Scan for the NAND device
87 + * @mtd: MTD device structure
89 + * This is the second phase of the normal nand_scan() function. It fills out
90 + * all the uninitialized function pointers with the defaults and scans for a
91 + * bad block table if appropriate.
93 +int nand_scan_tail(struct mtd_info *mtd)
96 + struct nand_chip *chip = mtd->priv;
97 + struct nand_ecc_ctrl *ecc = &chip->ecc;
98 + struct nand_buffers *nbuf;
100 + /* New bad blocks should be marked in OOB, flash-based BBT, or both */
101 + BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&
102 + !(chip->bbt_options & NAND_BBT_USE_FLASH));
104 + if (!(chip->options & NAND_OWN_BUFFERS)) {
105 + nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize
106 + + mtd->oobsize * 3, GFP_KERNEL);
109 + nbuf->ecccalc = (uint8_t *)(nbuf + 1);
110 + nbuf->ecccode = nbuf->ecccalc + mtd->oobsize;
111 + nbuf->databuf = nbuf->ecccode + mtd->oobsize;
112 + chip->buffers = nbuf;
114 + if (!chip->buffers)
118 + /* Set the internal oob buffer location, just after the page data */
119 + chip->oob_poi = chip->buffers->databuf + mtd->writesize;
121 + if (!chip->write_page)
122 + chip->write_page = nand_write_page;
124 + /* Initialize ECC struct */
125 + ret = nand_ecc_ctrl_init(mtd, ecc);
127 + if (!(chip->options & NAND_OWN_BUFFERS))
128 + kfree(chip->buffers);
133 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
134 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
135 switch (ecc->steps) {