2 * arch/ubicom32/kernel/module.c
3 * Ubicom32 architecture loadable module support.
5 * (C) Copyright 2009, Ubicom, Inc.
7 * This file is part of the Ubicom32 Linux Kernel Port.
9 * The Ubicom32 Linux Kernel Port is free software: you can redistribute
10 * it and/or modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation, either version 2 of the
12 * License, or (at your option) any later version.
14 * The Ubicom32 Linux Kernel Port is distributed in the hope that it
15 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
16 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
17 * the GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with the Ubicom32 Linux Kernel Port. If not,
21 * see <http://www.gnu.org/licenses/>.
23 * Ubicom32 implementation derived from (with many thanks):
28 #include <linux/moduleloader.h>
29 #include <linux/bug.h>
30 #include <linux/elf.h>
31 #include <linux/vmalloc.h>
33 #include <linux/string.h>
34 #include <linux/kernel.h>
35 #include <asm/ocm-alloc.h>
40 #define DEBUGP(fmt...)
43 static void _module_free_ocm(struct module *mod)
45 printk(KERN_INFO "module arch cleanup %s: OCM instruction memory free "
46 " of %d @%p\n", mod->name, mod->arch.ocm_inst_size,
49 if (mod->arch.ocm_inst) {
50 ocm_inst_free(mod->arch.ocm_inst);
51 mod->arch.ocm_inst = 0;
52 mod->arch.ocm_inst_size = 0;
56 void *module_alloc(unsigned long size)
64 /* Free memory returned from module_alloc */
65 void module_free(struct module *mod, void *module_region)
68 /* FIXME: If module_region == mod->init_region, trim exception
72 * This is expected to be final module free, use this to prune the
75 if (module_region && module_region == mod->module_core)
76 _module_free_ocm(mod);
81 * module_frob_arch_sections()
82 * Called from kernel/module.c allowing arch specific handling of
85 int module_frob_arch_sections(Elf_Ehdr *hdr,
90 Elf_Shdr *s, *sechdrs_end;
91 void *ocm_inst = NULL;
92 int ocm_inst_size = 0;
95 * Ubicom32 v3 and v4 are almost binary compatible but not completely.
96 * To be safe check that the module was compiled with the correct -march
99 #ifdef CONFIG_UBICOM32_V4
100 if ((hdr->e_flags & 0xFFFF) != EF_UBICOM32_V4) {
101 printk(KERN_WARNING "Module %s was not compiled for "
102 "ubicom32v4, elf_flags:%x,\n",
103 mod->name, hdr->e_flags);
106 #elif defined CONFIG_UBICOM32_V3
107 if ((hdr->e_flags & 0xFFFF) != EF_UBICOM32_V3) {
108 printk(KERN_WARNING "Module %s was not compiled for "
109 "ubicom32v3, elf_flags:%x\n",
110 mod->name, hdr->e_flags);
114 #error Unknown/Unsupported ubicom32 architecture.
118 * XXX: sechdrs are vmalloced in kernel/module.c
119 * and would be vfreed just after module is loaded,
120 * so we hack to keep the only information we needed
121 * in mod->arch to correctly free L1 I/D sram later.
122 * NOTE: this breaks the semantic of mod->arch structure.
124 sechdrs_end = sechdrs + hdr->e_shnum;
125 for (s = sechdrs; s < sechdrs_end; ++s) {
126 if (strncmp(".ocm_text", secstrings + s->sh_name, 9) == 0)
127 ocm_inst_size += s->sh_size;
133 ocm_inst = ocm_inst_alloc(ocm_inst_size, 0 /* internal */);
134 if (ocm_inst == NULL) {
135 #ifdef CONFIG_OCM_MODULES_FALLBACK_TO_DDR
137 "module %s: OCM instruction memory allocation of %d"
138 "failed, fallback to DDR\n", mod->name, ocm_inst_size);
142 "module %s: OCM instruction memory allocation of %d"
143 "failed.\n", mod->name, ocm_inst_size);
148 mod->arch.ocm_inst = ocm_inst;
149 mod->arch.ocm_inst_size = ocm_inst_size;
152 "module %s: OCM instruction memory allocation of %d @%p\n",
153 mod->name, mod->arch.ocm_inst_size, mod->arch.ocm_inst);
155 for (s = sechdrs; s < sechdrs_end; ++s) {
156 if (strncmp(".ocm_text", secstrings + s->sh_name, 9) == 0) {
157 memcpy(ocm_inst, (void *)s->sh_addr, s->sh_size);
158 s->sh_flags &= ~SHF_ALLOC;
159 s->sh_addr = (unsigned long)ocm_inst;
160 ocm_inst += s->sh_size;
167 int apply_relocate(Elf32_Shdr *sechdrs,
169 unsigned int symindex,
173 DEBUGP("Invalid Applying relocate section %u to %u\n", relsec,
174 sechdrs[relsec].sh_info);
178 int apply_relocate_add(Elf32_Shdr *sechdrs,
180 unsigned int symindex,
185 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
190 DEBUGP("Applying relocate_add section %u to %u\n", relsec,
191 sechdrs[relsec].sh_info);
192 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
194 const int elf32_rtype = ELF32_R_TYPE(rel[i].r_info);
196 /* This is where to make the change */
197 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
199 /* This is the symbol it is referring to. Note that all
200 undefined symbols have been resolved. */
201 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
202 + ELF32_R_SYM(rel[i].r_info);
204 v = rel[i].r_addend + sym->st_value;
207 switch (elf32_rtype) {
211 * Store the 32 bit relocation as is.
216 case R_UBICOM32_HI24:
219 * 24 bit relocation that is part of the MOVEAI
220 * instruction. The 24 bits come from bits 7 - 30 of the
221 * relocation. Theses bits eventually get split into 2
222 * fields in the instruction encoding.
224 * - Bits 7 - 27 of the relocation are encoded into bits
225 * 0 - 20 of the instruction.
227 * - Bits 28 - 30 of the relocation are encoded into
228 * bit 24 - 26 of the instruction.
230 uint32_t valid24 = (v >> 7) & 0xffffff;
233 insn &= ~(0x1fffff | (0x7 << 24));
234 insn |= (valid24 & 0x1fffff);
235 insn |= ((valid24 & 0xe00000) << 3);
239 case R_UBICOM32_LO7_S:
240 case R_UBICOM32_LO7_2_S:
241 case R_UBICOM32_LO7_4_S:
244 * Bits 0 - 6 of the relocation are encoded into the
245 * 7bit unsigned immediate fields of the SOURCE-1 field
246 * of the instruction. The immediate value is left
247 * shifted by (0, 1, 2) based on the operand size.
249 uint32_t valid7 = v & 0x7f;
252 if (elf32_rtype == R_UBICOM32_LO7_2_S) {
254 } else if (elf32_rtype == R_UBICOM32_LO7_4_S) {
258 insn &= ~(0x1f | (0x3 << 8));
259 insn |= (valid7 & 0x1f);
260 insn |= ((valid7 & 0x60) << 3);
264 case R_UBICOM32_LO7_D:
265 case R_UBICOM32_LO7_2_D:
266 case R_UBICOM32_LO7_4_D:
269 * Bits 0 - 6 of the relocation are encoded into the
270 * 7bit unsigned immediate fields of the DESTINATION
271 * field of the instruction. The immediate value is
272 * left shifted by (0, 1, 2) based on the operand size.
274 uint32_t valid7 = v & 0x7f;
277 if (elf32_rtype == R_UBICOM32_LO7_2_D) {
279 } else if (elf32_rtype == R_UBICOM32_LO7_4_D) {
283 insn &= ~((0x1f | (0x3 << 8)) << 16);
284 insn |= ((valid7 & 0x1f) << 16);
285 insn |= ((valid7 & 0x60) << 19);
289 case R_UBICOM32_LO7_CALLI:
290 case R_UBICOM32_LO16_CALLI:
293 * Extract the offset for a CALLI instruction. The
294 * offsets can be either 7 bits or 18 bits. Since all
295 * instructions in ubicom32 architecture are at work
296 * aligned addresses the truncated offset is right
297 * shifted by 2 before being encoded in the instruction.
300 if (elf32_rtype == R_UBICOM32_LO7_CALLI) {
311 insn |= (val & 0x1f) << 0;
313 insn |= (val & 0x07) << 8;
315 insn |= (val & 0x1f) << 16;
317 insn |= (val & 0x07) << 24;
321 case R_UBICOM32_24_PCREL:
324 * Extract 26 bit signed PC relative offset for CALL
325 * instructions. Since instruction addresses are word
326 * aligned the offset is right shited by 2 before
327 * encoding into instruction.
329 int32_t val = v - (int32_t)location;
332 * Check that the top 7 bits are all equal to the sign
333 * bit (26), i.e all 0's or all 1's. If they are not then
334 * the absolute difference is greater than 25 bits.
336 if (((uint32_t)val & 0xFE000000) != 0xFE000000 &&
337 ((uint32_t)val & 0xFE000000) != 0x0) {
339 * The relocation is beyond our addressable
340 * range with a 26 bit call.
342 printk(KERN_ERR "module %s: PC Relative "
343 "relocation out of range: "
345 me->name, elf32_rtype,
346 v, (uint32_t) location, val);
350 val = (val & 0x3ffffff) >> 2;
352 insn = insn & 0xf8e00000;
354 insn |= (val >> 21) << 24;
355 insn |= (val & 0x1fffff);
359 case R_UBICOM32_LO16:
360 case R_UBICOM32_HI16:
363 * 16 bit immediate value that is encoded into bit 0 -
364 * 15 of the instruction.
368 if (elf32_rtype == R_UBICOM32_LO16) {
371 val = (v >> 16) & 0xffff;
381 case R_UBICOM32_21_PCREL:
384 * Extract 23 bit signed PC relative offset for JMP<cc>
385 * instructions. Since instruction addresses are word
386 * aligned the offset is right shited by 2 before
387 * encoding into instruction.
389 int32_t val = v - (int32_t)location;
391 val = (val & 0x7fffff) >> 2;
393 insn = insn & 0xffe00000;
395 insn |= (val >> 21) << 24;
402 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
403 me->name, elf32_rtype);
410 int module_finalize(const Elf_Ehdr *hdr,
411 const Elf_Shdr *sechdrs,
414 unsigned int i, strindex = 0, symindex = 0;
418 err = module_bug_finalize(hdr, sechdrs, mod);
422 if (!mod->arch.ocm_inst) {
424 * No OCM code, so nothing more to do.
429 secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
431 for (i = 1; i < hdr->e_shnum; i++) {
432 /* Internal symbols and strings. */
433 if (sechdrs[i].sh_type == SHT_SYMTAB) {
435 strindex = sechdrs[i].sh_link;
439 for (i = 1; i < hdr->e_shnum; i++) {
440 const char *strtab = (char *)sechdrs[strindex].sh_addr;
441 unsigned int info = sechdrs[i].sh_info;
443 /* Not a valid relocation section? */
444 if (info >= hdr->e_shnum)
447 if ((sechdrs[i].sh_type == SHT_RELA) &&
448 (strncmp(".rela.ocm_text",
449 secstrings + sechdrs[i].sh_name, 5 + 9) == 0)) {
450 err = apply_relocate_add((Elf_Shdr *) sechdrs, strtab,
460 void module_arch_cleanup(struct module *mod)
462 module_bug_cleanup(mod);