1 ; RUN: llc -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -mcpu=cyclone -verify-machineinstrs < %s | FileCheck %s
3 define void @branch1() nounwind uwtable ssp {
4 %x = alloca i32, align 4
5 store i32 0, i32* %x, align 4
6 %1 = load i32* %x, align 4
8 br i1 %2, label %3, label %4
10 ; <label>:3 ; preds = %0
13 ; <label>:4 ; preds = %3, %0
17 define void @branch2() nounwind uwtable ssp {
18 %1 = alloca i32, align 4
19 %x = alloca i32, align 4
20 %y = alloca i32, align 4
21 %z = alloca i32, align 4
23 store i32 1, i32* %y, align 4
24 store i32 1, i32* %x, align 4
25 store i32 0, i32* %z, align 4
26 %2 = load i32* %x, align 4
27 %3 = icmp ne i32 %2, 0
28 br i1 %3, label %4, label %5
30 ; <label>:4 ; preds = %0
34 ; <label>:5 ; preds = %0
35 %6 = load i32* %y, align 4
36 %7 = icmp ne i32 %6, 0
37 br i1 %7, label %8, label %13
39 ; <label>:8 ; preds = %5
40 %9 = load i32* %z, align 4
41 %10 = icmp ne i32 %9, 0
42 br i1 %10, label %11, label %12
44 ; <label>:11 ; preds = %8
48 ; <label>:12 ; preds = %8
52 ; <label>:13 ; preds = %5
55 ; <label>:14 ; preds = %4, %11, %12, %13
60 define void @true_() nounwind uwtable ssp {
63 br i1 true, label %1, label %2
73 define void @false_() nounwind uwtable ssp {
76 br i1 false, label %1, label %2
86 define zeroext i8 @trunc_(i8 zeroext %a, i16 zeroext %b, i32 %c, i64 %d) {
88 %a.addr = alloca i8, align 1
89 %b.addr = alloca i16, align 2
90 %c.addr = alloca i32, align 4
91 %d.addr = alloca i64, align 8
92 store i8 %a, i8* %a.addr, align 1
93 store i16 %b, i16* %b.addr, align 2
94 store i32 %c, i32* %c.addr, align 4
95 store i64 %d, i64* %d.addr, align 8
96 %0 = load i16* %b.addr, align 2
97 ; CHECK: and w0, w0, #0x1
100 %conv = trunc i16 %0 to i1
101 br i1 %conv, label %if.then, label %if.end
103 if.then: ; preds = %entry
107 if.end: ; preds = %if.then, %entry
108 %1 = load i32* %c.addr, align 4
109 ; CHECK: and w[[REG:[0-9]+]], w{{[0-9]+}}, #0x1
110 ; CHECK: cmp w[[REG]], #0
112 %conv1 = trunc i32 %1 to i1
113 br i1 %conv1, label %if.then3, label %if.end4
115 if.then3: ; preds = %if.end
119 if.end4: ; preds = %if.then3, %if.end
120 %2 = load i64* %d.addr, align 8
121 ; CHECK: cmp w{{[0-9]+}}, #0
123 %conv5 = trunc i64 %2 to i1
124 br i1 %conv5, label %if.then7, label %if.end8
126 if.then7: ; preds = %if.end4
130 if.end8: ; preds = %if.then7, %if.end4
131 %3 = load i8* %a.addr, align 1
138 define i32 @trunc64(i64 %foo) nounwind {
140 ; CHECK: orr [[REG:x[0-9]+]], xzr, #0x1
141 ; CHECK: and [[REG2:x[0-9]+]], x0, [[REG]]
142 ; CHECK: mov x[[REG3:[0-9]+]], [[REG2]]
143 ; CHECK: and [[REG4:w[0-9]+]], w[[REG3]], #0x1
144 ; CHECK: cmp [[REG4]], #0
147 %b = trunc i64 %a to i1
148 br i1 %b, label %if.then, label %if.else