1 ; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
3 define i32 @icmp_eq_imm(i32 %a) nounwind ssp {
5 ; CHECK-LABEL: icmp_eq_imm
7 ; CHECK-NEXT: cset w0, eq
8 %cmp = icmp eq i32 %a, 31
9 %conv = zext i1 %cmp to i32
13 define i32 @icmp_eq_neg_imm(i32 %a) nounwind ssp {
15 ; CHECK-LABEL: icmp_eq_neg_imm
17 ; CHECK-NEXT: cset w0, eq
18 %cmp = icmp eq i32 %a, -7
19 %conv = zext i1 %cmp to i32
23 define i32 @icmp_eq_i32(i32 %a, i32 %b) nounwind ssp {
25 ; CHECK-LABEL: icmp_eq_i32
27 ; CHECK-NEXT: cset w0, eq
28 %cmp = icmp eq i32 %a, %b
29 %conv = zext i1 %cmp to i32
33 define i32 @icmp_ne(i32 %a, i32 %b) nounwind ssp {
35 ; CHECK-LABEL: icmp_ne
37 ; CHECK-NEXT: cset w0, ne
38 %cmp = icmp ne i32 %a, %b
39 %conv = zext i1 %cmp to i32
43 define i32 @icmp_ugt(i32 %a, i32 %b) nounwind ssp {
45 ; CHECK-LABEL: icmp_ugt
47 ; CHECK-NEXT: cset w0, hi
48 %cmp = icmp ugt i32 %a, %b
49 %conv = zext i1 %cmp to i32
53 define i32 @icmp_uge(i32 %a, i32 %b) nounwind ssp {
55 ; CHECK-LABEL: icmp_uge
57 ; CHECK-NEXT: cset w0, hs
58 %cmp = icmp uge i32 %a, %b
59 %conv = zext i1 %cmp to i32
63 define i32 @icmp_ult(i32 %a, i32 %b) nounwind ssp {
65 ; CHECK-LABEL: icmp_ult
67 ; CHECK-NEXT: cset w0, lo
68 %cmp = icmp ult i32 %a, %b
69 %conv = zext i1 %cmp to i32
73 define i32 @icmp_ule(i32 %a, i32 %b) nounwind ssp {
75 ; CHECK-LABEL: icmp_ule
77 ; CHECK-NEXT: cset w0, ls
78 %cmp = icmp ule i32 %a, %b
79 %conv = zext i1 %cmp to i32
83 define i32 @icmp_sgt(i32 %a, i32 %b) nounwind ssp {
85 ; CHECK-LABEL: icmp_sgt
87 ; CHECK-NEXT: cset w0, gt
88 %cmp = icmp sgt i32 %a, %b
89 %conv = zext i1 %cmp to i32
93 define i32 @icmp_sge(i32 %a, i32 %b) nounwind ssp {
95 ; CHECK-LABEL: icmp_sge
97 ; CHECK-NEXT: cset w0, ge
98 %cmp = icmp sge i32 %a, %b
99 %conv = zext i1 %cmp to i32
103 define i32 @icmp_slt(i32 %a, i32 %b) nounwind ssp {
105 ; CHECK-LABEL: icmp_slt
107 ; CHECK-NEXT: cset w0, lt
108 %cmp = icmp slt i32 %a, %b
109 %conv = zext i1 %cmp to i32
113 define i32 @icmp_sle(i32 %a, i32 %b) nounwind ssp {
115 ; CHECK-LABEL: icmp_sle
117 ; CHECK-NEXT: cset w0, le
118 %cmp = icmp sle i32 %a, %b
119 %conv = zext i1 %cmp to i32
123 define i32 @icmp_i64(i64 %a, i64 %b) nounwind ssp {
125 ; CHECK-LABEL: icmp_i64
127 ; CHECK-NEXT: cset w{{[0-9]+}}, le
128 %cmp = icmp sle i64 %a, %b
129 %conv = zext i1 %cmp to i32
133 define zeroext i1 @icmp_eq_i16(i16 %a, i16 %b) nounwind ssp {
135 ; CHECK-LABEL: icmp_eq_i16
137 ; CHECK: cmp w0, w1, sxth
138 ; CHECK-NEXT: cset w0, eq
139 %cmp = icmp eq i16 %a, %b
143 define zeroext i1 @icmp_eq_i8(i8 %a, i8 %b) nounwind ssp {
145 ; CHECK-LABEL: icmp_eq_i8
147 ; CHECK-NEXT: cmp w0, w1, sxtb
148 ; CHECK-NEXT: cset w0, eq
149 %cmp = icmp eq i8 %a, %b
153 define i32 @icmp_i16_unsigned(i16 %a, i16 %b) nounwind {
155 ; CHECK-LABEL: icmp_i16_unsigned
157 ; CHECK-NEXT: cmp w0, w1, uxth
158 ; CHECK-NEXT: cset w0, lo
159 %cmp = icmp ult i16 %a, %b
160 %conv2 = zext i1 %cmp to i32
164 define i32 @icmp_i8_signed(i8 %a, i8 %b) nounwind {
166 ; CHECK-LABEL: icmp_i8_signed
168 ; CHECK-NEXT: cmp w0, w1, sxtb
169 ; CHECK-NEXT: cset w0, gt
170 %cmp = icmp sgt i8 %a, %b
171 %conv2 = zext i1 %cmp to i32
175 define i32 @icmp_i1_signed(i1 %a, i1 %b) nounwind {
177 ; CHECK-LABEL: icmp_i1_signed
178 ; CHECK: sbfx [[REG1:w[0-9]+]], w0, #0, #1
179 ; CHECK-NEXT: sbfx [[REG2:w[0-9]+]], w1, #0, #1
180 ; CHECK-NEXT: cmp [[REG1]], [[REG2]]
181 ; CHECK-NEXT: cset w0, gt
182 %cmp = icmp sgt i1 %a, %b
183 %conv2 = zext i1 %cmp to i32
187 define i32 @icmp_i16_signed_const(i16 %a) nounwind {
189 ; CHECK-LABEL: icmp_i16_signed_const
191 ; CHECK-NEXT: cmn w0, #233
192 ; CHECK-NEXT: cset w0, lt
193 ; CHECK-NEXT: and w0, w0, #0x1
194 %cmp = icmp slt i16 %a, -233
195 %conv2 = zext i1 %cmp to i32
199 define i32 @icmp_i8_signed_const(i8 %a) nounwind {
201 ; CHECK-LABEL: icmp_i8_signed_const
203 ; CHECK-NEXT: cmp w0, #124
204 ; CHECK-NEXT: cset w0, gt
205 ; CHECK-NEXT: and w0, w0, #0x1
206 %cmp = icmp sgt i8 %a, 124
207 %conv2 = zext i1 %cmp to i32
211 define i32 @icmp_i1_unsigned_const(i1 %a) nounwind {
213 ; CHECK-LABEL: icmp_i1_unsigned_const
214 ; CHECK: and w0, w0, #0x1
215 ; CHECK-NEXT: cmp w0, #0
216 ; CHECK-NEXT: cset w0, lo
217 ; CHECK-NEXT: and w0, w0, #0x1
218 %cmp = icmp ult i1 %a, 0
219 %conv2 = zext i1 %cmp to i32