1 ; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
3 define void @t0(i32 %a) nounwind {
6 ; CHECK: str {{w[0-9]+}}, [sp, #12]
7 ; CHECK-NEXT: ldr [[REGISTER:w[0-9]+]], [sp, #12]
8 ; CHECK-NEXT: str [[REGISTER]], [sp, #12]
10 %a.addr = alloca i32, align 4
11 store i32 %a, i32* %a.addr
12 %tmp = load i32* %a.addr
13 store i32 %tmp, i32* %a.addr
17 define void @t1(i64 %a) nounwind {
19 ; CHECK: str {{x[0-9]+}}, [sp, #8]
20 ; CHECK-NEXT: ldr [[REGISTER:x[0-9]+]], [sp, #8]
21 ; CHECK-NEXT: str [[REGISTER]], [sp, #8]
23 %a.addr = alloca i64, align 4
24 store i64 %a, i64* %a.addr
25 %tmp = load i64* %a.addr
26 store i64 %tmp, i64* %a.addr
30 define zeroext i1 @i1(i1 %a) nounwind {
33 ; CHECK: and w0, w0, #0x1
34 ; CHECK: strb w0, [sp, #15]
35 ; CHECK: ldrb w0, [sp, #15]
36 ; CHECK: and w0, w0, #0x1
37 ; CHECK: and w0, w0, #0x1
38 ; CHECK: add sp, sp, #16
40 %a.addr = alloca i1, align 1
41 store i1 %a, i1* %a.addr, align 1
42 %0 = load i1* %a.addr, align 1
46 define i32 @t2(i32 *%ptr) nounwind {
49 ; CHECK: ldur w0, [x0, #-4]
51 %0 = getelementptr i32 *%ptr, i32 -1
52 %1 = load i32* %0, align 4
56 define i32 @t3(i32 *%ptr) nounwind {
59 ; CHECK: ldur w0, [x0, #-256]
61 %0 = getelementptr i32 *%ptr, i32 -64
62 %1 = load i32* %0, align 4
66 define void @t4(i32 *%ptr) nounwind {
70 ; CHECK: stur w8, [x0, #-4]
72 %0 = getelementptr i32 *%ptr, i32 -1
73 store i32 0, i32* %0, align 4
77 define void @t5(i32 *%ptr) nounwind {
81 ; CHECK: stur w8, [x0, #-256]
83 %0 = getelementptr i32 *%ptr, i32 -64
84 store i32 0, i32* %0, align 4
88 define void @t6() nounwind {
91 tail call void @llvm.trap()
95 declare void @llvm.trap() nounwind