1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
3 define <2 x i32> @fcvtas_2s(<2 x float> %A) nounwind {
4 ;CHECK-LABEL: fcvtas_2s:
6 ;CHECK: fcvtas.2s v0, v0
8 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float> %A)
12 define <4 x i32> @fcvtas_4s(<4 x float> %A) nounwind {
13 ;CHECK-LABEL: fcvtas_4s:
15 ;CHECK: fcvtas.4s v0, v0
17 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtas.v4i32.v4f32(<4 x float> %A)
21 define <2 x i64> @fcvtas_2d(<2 x double> %A) nounwind {
22 ;CHECK-LABEL: fcvtas_2d:
24 ;CHECK: fcvtas.2d v0, v0
26 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtas.v2i64.v2f64(<2 x double> %A)
30 declare <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
31 declare <4 x i32> @llvm.aarch64.neon.fcvtas.v4i32.v4f32(<4 x float>) nounwind readnone
32 declare <2 x i64> @llvm.aarch64.neon.fcvtas.v2i64.v2f64(<2 x double>) nounwind readnone
34 define <2 x i32> @fcvtau_2s(<2 x float> %A) nounwind {
35 ;CHECK-LABEL: fcvtau_2s:
37 ;CHECK: fcvtau.2s v0, v0
39 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float> %A)
43 define <4 x i32> @fcvtau_4s(<4 x float> %A) nounwind {
44 ;CHECK-LABEL: fcvtau_4s:
46 ;CHECK: fcvtau.4s v0, v0
48 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtau.v4i32.v4f32(<4 x float> %A)
52 define <2 x i64> @fcvtau_2d(<2 x double> %A) nounwind {
53 ;CHECK-LABEL: fcvtau_2d:
55 ;CHECK: fcvtau.2d v0, v0
57 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtau.v2i64.v2f64(<2 x double> %A)
61 declare <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float>) nounwind readnone
62 declare <4 x i32> @llvm.aarch64.neon.fcvtau.v4i32.v4f32(<4 x float>) nounwind readnone
63 declare <2 x i64> @llvm.aarch64.neon.fcvtau.v2i64.v2f64(<2 x double>) nounwind readnone
65 define <2 x i32> @fcvtms_2s(<2 x float> %A) nounwind {
66 ;CHECK-LABEL: fcvtms_2s:
68 ;CHECK: fcvtms.2s v0, v0
70 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float> %A)
74 define <4 x i32> @fcvtms_4s(<4 x float> %A) nounwind {
75 ;CHECK-LABEL: fcvtms_4s:
77 ;CHECK: fcvtms.4s v0, v0
79 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtms.v4i32.v4f32(<4 x float> %A)
83 define <2 x i64> @fcvtms_2d(<2 x double> %A) nounwind {
84 ;CHECK-LABEL: fcvtms_2d:
86 ;CHECK: fcvtms.2d v0, v0
88 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtms.v2i64.v2f64(<2 x double> %A)
92 declare <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float>) nounwind readnone
93 declare <4 x i32> @llvm.aarch64.neon.fcvtms.v4i32.v4f32(<4 x float>) nounwind readnone
94 declare <2 x i64> @llvm.aarch64.neon.fcvtms.v2i64.v2f64(<2 x double>) nounwind readnone
96 define <2 x i32> @fcvtmu_2s(<2 x float> %A) nounwind {
97 ;CHECK-LABEL: fcvtmu_2s:
99 ;CHECK: fcvtmu.2s v0, v0
101 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float> %A)
105 define <4 x i32> @fcvtmu_4s(<4 x float> %A) nounwind {
106 ;CHECK-LABEL: fcvtmu_4s:
108 ;CHECK: fcvtmu.4s v0, v0
110 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float> %A)
114 define <2 x i64> @fcvtmu_2d(<2 x double> %A) nounwind {
115 ;CHECK-LABEL: fcvtmu_2d:
117 ;CHECK: fcvtmu.2d v0, v0
119 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double> %A)
123 declare <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float>) nounwind readnone
124 declare <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float>) nounwind readnone
125 declare <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double>) nounwind readnone
127 define <2 x i32> @fcvtps_2s(<2 x float> %A) nounwind {
128 ;CHECK-LABEL: fcvtps_2s:
130 ;CHECK: fcvtps.2s v0, v0
132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float> %A)
136 define <4 x i32> @fcvtps_4s(<4 x float> %A) nounwind {
137 ;CHECK-LABEL: fcvtps_4s:
139 ;CHECK: fcvtps.4s v0, v0
141 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtps.v4i32.v4f32(<4 x float> %A)
145 define <2 x i64> @fcvtps_2d(<2 x double> %A) nounwind {
146 ;CHECK-LABEL: fcvtps_2d:
148 ;CHECK: fcvtps.2d v0, v0
150 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double> %A)
154 declare <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float>) nounwind readnone
155 declare <4 x i32> @llvm.aarch64.neon.fcvtps.v4i32.v4f32(<4 x float>) nounwind readnone
156 declare <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double>) nounwind readnone
158 define <2 x i32> @fcvtpu_2s(<2 x float> %A) nounwind {
159 ;CHECK-LABEL: fcvtpu_2s:
161 ;CHECK: fcvtpu.2s v0, v0
163 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtpu.v2i32.v2f32(<2 x float> %A)
167 define <4 x i32> @fcvtpu_4s(<4 x float> %A) nounwind {
168 ;CHECK-LABEL: fcvtpu_4s:
170 ;CHECK: fcvtpu.4s v0, v0
172 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtpu.v4i32.v4f32(<4 x float> %A)
176 define <2 x i64> @fcvtpu_2d(<2 x double> %A) nounwind {
177 ;CHECK-LABEL: fcvtpu_2d:
179 ;CHECK: fcvtpu.2d v0, v0
181 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtpu.v2i64.v2f64(<2 x double> %A)
185 declare <2 x i32> @llvm.aarch64.neon.fcvtpu.v2i32.v2f32(<2 x float>) nounwind readnone
186 declare <4 x i32> @llvm.aarch64.neon.fcvtpu.v4i32.v4f32(<4 x float>) nounwind readnone
187 declare <2 x i64> @llvm.aarch64.neon.fcvtpu.v2i64.v2f64(<2 x double>) nounwind readnone
189 define <2 x i32> @fcvtns_2s(<2 x float> %A) nounwind {
190 ;CHECK-LABEL: fcvtns_2s:
192 ;CHECK: fcvtns.2s v0, v0
194 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtns.v2i32.v2f32(<2 x float> %A)
198 define <4 x i32> @fcvtns_4s(<4 x float> %A) nounwind {
199 ;CHECK-LABEL: fcvtns_4s:
201 ;CHECK: fcvtns.4s v0, v0
203 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtns.v4i32.v4f32(<4 x float> %A)
207 define <2 x i64> @fcvtns_2d(<2 x double> %A) nounwind {
208 ;CHECK-LABEL: fcvtns_2d:
210 ;CHECK: fcvtns.2d v0, v0
212 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtns.v2i64.v2f64(<2 x double> %A)
216 declare <2 x i32> @llvm.aarch64.neon.fcvtns.v2i32.v2f32(<2 x float>) nounwind readnone
217 declare <4 x i32> @llvm.aarch64.neon.fcvtns.v4i32.v4f32(<4 x float>) nounwind readnone
218 declare <2 x i64> @llvm.aarch64.neon.fcvtns.v2i64.v2f64(<2 x double>) nounwind readnone
220 define <2 x i32> @fcvtnu_2s(<2 x float> %A) nounwind {
221 ;CHECK-LABEL: fcvtnu_2s:
223 ;CHECK: fcvtnu.2s v0, v0
225 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtnu.v2i32.v2f32(<2 x float> %A)
229 define <4 x i32> @fcvtnu_4s(<4 x float> %A) nounwind {
230 ;CHECK-LABEL: fcvtnu_4s:
232 ;CHECK: fcvtnu.4s v0, v0
234 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtnu.v4i32.v4f32(<4 x float> %A)
238 define <2 x i64> @fcvtnu_2d(<2 x double> %A) nounwind {
239 ;CHECK-LABEL: fcvtnu_2d:
241 ;CHECK: fcvtnu.2d v0, v0
243 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtnu.v2i64.v2f64(<2 x double> %A)
247 declare <2 x i32> @llvm.aarch64.neon.fcvtnu.v2i32.v2f32(<2 x float>) nounwind readnone
248 declare <4 x i32> @llvm.aarch64.neon.fcvtnu.v4i32.v4f32(<4 x float>) nounwind readnone
249 declare <2 x i64> @llvm.aarch64.neon.fcvtnu.v2i64.v2f64(<2 x double>) nounwind readnone
251 define <2 x i32> @fcvtzs_2s(<2 x float> %A) nounwind {
252 ;CHECK-LABEL: fcvtzs_2s:
254 ;CHECK: fcvtzs.2s v0, v0
256 %tmp3 = fptosi <2 x float> %A to <2 x i32>
260 define <4 x i32> @fcvtzs_4s(<4 x float> %A) nounwind {
261 ;CHECK-LABEL: fcvtzs_4s:
263 ;CHECK: fcvtzs.4s v0, v0
265 %tmp3 = fptosi <4 x float> %A to <4 x i32>
269 define <2 x i64> @fcvtzs_2d(<2 x double> %A) nounwind {
270 ;CHECK-LABEL: fcvtzs_2d:
272 ;CHECK: fcvtzs.2d v0, v0
274 %tmp3 = fptosi <2 x double> %A to <2 x i64>
279 define <2 x i32> @fcvtzu_2s(<2 x float> %A) nounwind {
280 ;CHECK-LABEL: fcvtzu_2s:
282 ;CHECK: fcvtzu.2s v0, v0
284 %tmp3 = fptoui <2 x float> %A to <2 x i32>
288 define <4 x i32> @fcvtzu_4s(<4 x float> %A) nounwind {
289 ;CHECK-LABEL: fcvtzu_4s:
291 ;CHECK: fcvtzu.4s v0, v0
293 %tmp3 = fptoui <4 x float> %A to <4 x i32>
297 define <2 x i64> @fcvtzu_2d(<2 x double> %A) nounwind {
298 ;CHECK-LABEL: fcvtzu_2d:
300 ;CHECK: fcvtzu.2d v0, v0
302 %tmp3 = fptoui <2 x double> %A to <2 x i64>
306 define <2 x float> @frinta_2s(<2 x float> %A) nounwind {
307 ;CHECK-LABEL: frinta_2s:
309 ;CHECK: frinta.2s v0, v0
311 %tmp3 = call <2 x float> @llvm.round.v2f32(<2 x float> %A)
312 ret <2 x float> %tmp3
315 define <4 x float> @frinta_4s(<4 x float> %A) nounwind {
316 ;CHECK-LABEL: frinta_4s:
318 ;CHECK: frinta.4s v0, v0
320 %tmp3 = call <4 x float> @llvm.round.v4f32(<4 x float> %A)
321 ret <4 x float> %tmp3
324 define <2 x double> @frinta_2d(<2 x double> %A) nounwind {
325 ;CHECK-LABEL: frinta_2d:
327 ;CHECK: frinta.2d v0, v0
329 %tmp3 = call <2 x double> @llvm.round.v2f64(<2 x double> %A)
330 ret <2 x double> %tmp3
333 declare <2 x float> @llvm.round.v2f32(<2 x float>) nounwind readnone
334 declare <4 x float> @llvm.round.v4f32(<4 x float>) nounwind readnone
335 declare <2 x double> @llvm.round.v2f64(<2 x double>) nounwind readnone
337 define <2 x float> @frinti_2s(<2 x float> %A) nounwind {
338 ;CHECK-LABEL: frinti_2s:
340 ;CHECK: frinti.2s v0, v0
342 %tmp3 = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %A)
343 ret <2 x float> %tmp3
346 define <4 x float> @frinti_4s(<4 x float> %A) nounwind {
347 ;CHECK-LABEL: frinti_4s:
349 ;CHECK: frinti.4s v0, v0
351 %tmp3 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %A)
352 ret <4 x float> %tmp3
355 define <2 x double> @frinti_2d(<2 x double> %A) nounwind {
356 ;CHECK-LABEL: frinti_2d:
358 ;CHECK: frinti.2d v0, v0
360 %tmp3 = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %A)
361 ret <2 x double> %tmp3
364 declare <2 x float> @llvm.nearbyint.v2f32(<2 x float>) nounwind readnone
365 declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>) nounwind readnone
366 declare <2 x double> @llvm.nearbyint.v2f64(<2 x double>) nounwind readnone
368 define <2 x float> @frintm_2s(<2 x float> %A) nounwind {
369 ;CHECK-LABEL: frintm_2s:
371 ;CHECK: frintm.2s v0, v0
373 %tmp3 = call <2 x float> @llvm.floor.v2f32(<2 x float> %A)
374 ret <2 x float> %tmp3
377 define <4 x float> @frintm_4s(<4 x float> %A) nounwind {
378 ;CHECK-LABEL: frintm_4s:
380 ;CHECK: frintm.4s v0, v0
382 %tmp3 = call <4 x float> @llvm.floor.v4f32(<4 x float> %A)
383 ret <4 x float> %tmp3
386 define <2 x double> @frintm_2d(<2 x double> %A) nounwind {
387 ;CHECK-LABEL: frintm_2d:
389 ;CHECK: frintm.2d v0, v0
391 %tmp3 = call <2 x double> @llvm.floor.v2f64(<2 x double> %A)
392 ret <2 x double> %tmp3
395 declare <2 x float> @llvm.floor.v2f32(<2 x float>) nounwind readnone
396 declare <4 x float> @llvm.floor.v4f32(<4 x float>) nounwind readnone
397 declare <2 x double> @llvm.floor.v2f64(<2 x double>) nounwind readnone
399 define <2 x float> @frintn_2s(<2 x float> %A) nounwind {
400 ;CHECK-LABEL: frintn_2s:
402 ;CHECK: frintn.2s v0, v0
404 %tmp3 = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %A)
405 ret <2 x float> %tmp3
408 define <4 x float> @frintn_4s(<4 x float> %A) nounwind {
409 ;CHECK-LABEL: frintn_4s:
411 ;CHECK: frintn.4s v0, v0
413 %tmp3 = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %A)
414 ret <4 x float> %tmp3
417 define <2 x double> @frintn_2d(<2 x double> %A) nounwind {
418 ;CHECK-LABEL: frintn_2d:
420 ;CHECK: frintn.2d v0, v0
422 %tmp3 = call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double> %A)
423 ret <2 x double> %tmp3
426 declare <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float>) nounwind readnone
427 declare <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float>) nounwind readnone
428 declare <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>) nounwind readnone
430 define <2 x float> @frintp_2s(<2 x float> %A) nounwind {
431 ;CHECK-LABEL: frintp_2s:
433 ;CHECK: frintp.2s v0, v0
435 %tmp3 = call <2 x float> @llvm.ceil.v2f32(<2 x float> %A)
436 ret <2 x float> %tmp3
439 define <4 x float> @frintp_4s(<4 x float> %A) nounwind {
440 ;CHECK-LABEL: frintp_4s:
442 ;CHECK: frintp.4s v0, v0
444 %tmp3 = call <4 x float> @llvm.ceil.v4f32(<4 x float> %A)
445 ret <4 x float> %tmp3
448 define <2 x double> @frintp_2d(<2 x double> %A) nounwind {
449 ;CHECK-LABEL: frintp_2d:
451 ;CHECK: frintp.2d v0, v0
453 %tmp3 = call <2 x double> @llvm.ceil.v2f64(<2 x double> %A)
454 ret <2 x double> %tmp3
457 declare <2 x float> @llvm.ceil.v2f32(<2 x float>) nounwind readnone
458 declare <4 x float> @llvm.ceil.v4f32(<4 x float>) nounwind readnone
459 declare <2 x double> @llvm.ceil.v2f64(<2 x double>) nounwind readnone
461 define <2 x float> @frintx_2s(<2 x float> %A) nounwind {
462 ;CHECK-LABEL: frintx_2s:
464 ;CHECK: frintx.2s v0, v0
466 %tmp3 = call <2 x float> @llvm.rint.v2f32(<2 x float> %A)
467 ret <2 x float> %tmp3
470 define <4 x float> @frintx_4s(<4 x float> %A) nounwind {
471 ;CHECK-LABEL: frintx_4s:
473 ;CHECK: frintx.4s v0, v0
475 %tmp3 = call <4 x float> @llvm.rint.v4f32(<4 x float> %A)
476 ret <4 x float> %tmp3
479 define <2 x double> @frintx_2d(<2 x double> %A) nounwind {
480 ;CHECK-LABEL: frintx_2d:
482 ;CHECK: frintx.2d v0, v0
484 %tmp3 = call <2 x double> @llvm.rint.v2f64(<2 x double> %A)
485 ret <2 x double> %tmp3
488 declare <2 x float> @llvm.rint.v2f32(<2 x float>) nounwind readnone
489 declare <4 x float> @llvm.rint.v4f32(<4 x float>) nounwind readnone
490 declare <2 x double> @llvm.rint.v2f64(<2 x double>) nounwind readnone
492 define <2 x float> @frintz_2s(<2 x float> %A) nounwind {
493 ;CHECK-LABEL: frintz_2s:
495 ;CHECK: frintz.2s v0, v0
497 %tmp3 = call <2 x float> @llvm.trunc.v2f32(<2 x float> %A)
498 ret <2 x float> %tmp3
501 define <4 x float> @frintz_4s(<4 x float> %A) nounwind {
502 ;CHECK-LABEL: frintz_4s:
504 ;CHECK: frintz.4s v0, v0
506 %tmp3 = call <4 x float> @llvm.trunc.v4f32(<4 x float> %A)
507 ret <4 x float> %tmp3
510 define <2 x double> @frintz_2d(<2 x double> %A) nounwind {
511 ;CHECK-LABEL: frintz_2d:
513 ;CHECK: frintz.2d v0, v0
515 %tmp3 = call <2 x double> @llvm.trunc.v2f64(<2 x double> %A)
516 ret <2 x double> %tmp3
519 declare <2 x float> @llvm.trunc.v2f32(<2 x float>) nounwind readnone
520 declare <4 x float> @llvm.trunc.v4f32(<4 x float>) nounwind readnone
521 declare <2 x double> @llvm.trunc.v2f64(<2 x double>) nounwind readnone
523 define <2 x float> @fcvtxn_2s(<2 x double> %A) nounwind {
524 ;CHECK-LABEL: fcvtxn_2s:
526 ;CHECK: fcvtxn v0.2s, v0.2d
528 %tmp3 = call <2 x float> @llvm.aarch64.neon.fcvtxn.v2f32.v2f64(<2 x double> %A)
529 ret <2 x float> %tmp3
532 define <4 x float> @fcvtxn_4s(<2 x float> %ret, <2 x double> %A) nounwind {
533 ;CHECK-LABEL: fcvtxn_4s:
535 ;CHECK: fcvtxn2 v0.4s, v1.2d
537 %tmp3 = call <2 x float> @llvm.aarch64.neon.fcvtxn.v2f32.v2f64(<2 x double> %A)
538 %res = shufflevector <2 x float> %ret, <2 x float> %tmp3, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
542 declare <2 x float> @llvm.aarch64.neon.fcvtxn.v2f32.v2f64(<2 x double>) nounwind readnone
544 define <2 x i32> @fcvtzsc_2s(<2 x float> %A) nounwind {
545 ;CHECK-LABEL: fcvtzsc_2s:
547 ;CHECK: fcvtzs.2s v0, v0, #1
549 %tmp3 = call <2 x i32> @llvm.aarch64.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %A, i32 1)
553 define <4 x i32> @fcvtzsc_4s(<4 x float> %A) nounwind {
554 ;CHECK-LABEL: fcvtzsc_4s:
556 ;CHECK: fcvtzs.4s v0, v0, #1
558 %tmp3 = call <4 x i32> @llvm.aarch64.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float> %A, i32 1)
562 define <2 x i64> @fcvtzsc_2d(<2 x double> %A) nounwind {
563 ;CHECK-LABEL: fcvtzsc_2d:
565 ;CHECK: fcvtzs.2d v0, v0, #1
567 %tmp3 = call <2 x i64> @llvm.aarch64.neon.vcvtfp2fxs.v2i64.v2f64(<2 x double> %A, i32 1)
571 declare <2 x i32> @llvm.aarch64.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float>, i32) nounwind readnone
572 declare <4 x i32> @llvm.aarch64.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float>, i32) nounwind readnone
573 declare <2 x i64> @llvm.aarch64.neon.vcvtfp2fxs.v2i64.v2f64(<2 x double>, i32) nounwind readnone
575 define <2 x i32> @fcvtzuc_2s(<2 x float> %A) nounwind {
576 ;CHECK-LABEL: fcvtzuc_2s:
578 ;CHECK: fcvtzu.2s v0, v0, #1
580 %tmp3 = call <2 x i32> @llvm.aarch64.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %A, i32 1)
584 define <4 x i32> @fcvtzuc_4s(<4 x float> %A) nounwind {
585 ;CHECK-LABEL: fcvtzuc_4s:
587 ;CHECK: fcvtzu.4s v0, v0, #1
589 %tmp3 = call <4 x i32> @llvm.aarch64.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float> %A, i32 1)
593 define <2 x i64> @fcvtzuc_2d(<2 x double> %A) nounwind {
594 ;CHECK-LABEL: fcvtzuc_2d:
596 ;CHECK: fcvtzu.2d v0, v0, #1
598 %tmp3 = call <2 x i64> @llvm.aarch64.neon.vcvtfp2fxu.v2i64.v2f64(<2 x double> %A, i32 1)
602 declare <2 x i32> @llvm.aarch64.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float>, i32) nounwind readnone
603 declare <4 x i32> @llvm.aarch64.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float>, i32) nounwind readnone
604 declare <2 x i64> @llvm.aarch64.neon.vcvtfp2fxu.v2i64.v2f64(<2 x double>, i32) nounwind readnone
606 define <2 x float> @scvtf_2sc(<2 x i32> %A) nounwind {
607 ;CHECK-LABEL: scvtf_2sc:
609 ;CHECK: scvtf.2s v0, v0, #1
611 %tmp3 = call <2 x float> @llvm.aarch64.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %A, i32 1)
612 ret <2 x float> %tmp3
615 define <4 x float> @scvtf_4sc(<4 x i32> %A) nounwind {
616 ;CHECK-LABEL: scvtf_4sc:
618 ;CHECK: scvtf.4s v0, v0, #1
620 %tmp3 = call <4 x float> @llvm.aarch64.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32> %A, i32 1)
621 ret <4 x float> %tmp3
624 define <2 x double> @scvtf_2dc(<2 x i64> %A) nounwind {
625 ;CHECK-LABEL: scvtf_2dc:
627 ;CHECK: scvtf.2d v0, v0, #1
629 %tmp3 = call <2 x double> @llvm.aarch64.neon.vcvtfxs2fp.v2f64.v2i64(<2 x i64> %A, i32 1)
630 ret <2 x double> %tmp3
633 declare <2 x float> @llvm.aarch64.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
634 declare <4 x float> @llvm.aarch64.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone
635 declare <2 x double> @llvm.aarch64.neon.vcvtfxs2fp.v2f64.v2i64(<2 x i64>, i32) nounwind readnone
637 define <2 x float> @ucvtf_2sc(<2 x i32> %A) nounwind {
638 ;CHECK-LABEL: ucvtf_2sc:
640 ;CHECK: ucvtf.2s v0, v0, #1
642 %tmp3 = call <2 x float> @llvm.aarch64.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %A, i32 1)
643 ret <2 x float> %tmp3
646 define <4 x float> @ucvtf_4sc(<4 x i32> %A) nounwind {
647 ;CHECK-LABEL: ucvtf_4sc:
649 ;CHECK: ucvtf.4s v0, v0, #1
651 %tmp3 = call <4 x float> @llvm.aarch64.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32> %A, i32 1)
652 ret <4 x float> %tmp3
655 define <2 x double> @ucvtf_2dc(<2 x i64> %A) nounwind {
656 ;CHECK-LABEL: ucvtf_2dc:
658 ;CHECK: ucvtf.2d v0, v0, #1
660 %tmp3 = call <2 x double> @llvm.aarch64.neon.vcvtfxu2fp.v2f64.v2i64(<2 x i64> %A, i32 1)
661 ret <2 x double> %tmp3
665 ;CHECK-LABEL: autogen_SD28458:
668 define void @autogen_SD28458(<8 x double> %val.f64, <8 x float>* %addr.f32) {
669 %Tr53 = fptrunc <8 x double> %val.f64 to <8 x float>
670 store <8 x float> %Tr53, <8 x float>* %addr.f32
674 ;CHECK-LABEL: autogen_SD19225:
677 define void @autogen_SD19225(<8 x double>* %addr.f64, <8 x float>* %addr.f32) {
678 %A = load <8 x float>* %addr.f32
679 %Tr53 = fpext <8 x float> %A to <8 x double>
680 store <8 x double> %Tr53, <8 x double>* %addr.f64
684 declare <2 x float> @llvm.aarch64.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
685 declare <4 x float> @llvm.aarch64.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone
686 declare <2 x double> @llvm.aarch64.neon.vcvtfxu2fp.v2f64.v2i64(<2 x i64>, i32) nounwind readnone