1 ; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
5 define i32 @test_sextloadi32() {
6 ; CHECK-LABEL: test_sextloadi32
9 %ret = sext i1 %val to i32
10 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
11 ; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1|sbfx w[0-9]+, w[0-9]+, #0, #1}}
17 define i64 @test_sextloadi64() {
18 ; CHECK-LABEL: test_sextloadi64
21 %ret = sext i1 %val to i64
22 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
23 ; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1}}
29 define i32 @test_zextloadi32() {
30 ; CHECK-LABEL: test_zextloadi32
32 ; It's not actually necessary that "ret" is next, but as far as LLVM
33 ; is concerned only 0 or 1 should be loadable so no extension is
36 %ret = zext i1 %val to i32
37 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
43 define i64 @test_zextloadi64() {
44 ; CHECK-LABEL: test_zextloadi64
46 ; It's not actually necessary that "ret" is next, but as far as LLVM
47 ; is concerned only 0 or 1 should be loadable so no extension is
50 %ret = zext i1 %val to i64
51 ; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]