1 ; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel=0 -verify-machineinstrs < %s | FileCheck %s
2 ; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel=1 -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
5 define zeroext i1 @and_rr_i1(i1 signext %a, i1 signext %b) {
6 ; CHECK-LABEL: and_rr_i1
7 ; CHECK: and [[REG:w[0-9]+]], w0, w1
12 define zeroext i8 @and_rr_i8(i8 signext %a, i8 signext %b) {
13 ; CHECK-LABEL: and_rr_i8
14 ; CHECK: and [[REG:w[0-9]+]], w0, w1
15 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xff
20 define zeroext i16 @and_rr_i16(i16 signext %a, i16 signext %b) {
21 ; CHECK-LABEL: and_rr_i16
22 ; CHECK: and [[REG:w[0-9]+]], w0, w1
23 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xffff
28 define i32 @and_rr_i32(i32 %a, i32 %b) {
29 ; CHECK-LABEL: and_rr_i32
30 ; CHECK: and w0, w0, w1
35 define i64 @and_rr_i64(i64 %a, i64 %b) {
36 ; CHECK-LABEL: and_rr_i64
37 ; CHECK: and x0, x0, x1
42 define zeroext i1 @and_ri_i1(i1 signext %a) {
43 ; CHECK-LABEL: and_ri_i1
44 ; CHECK: and {{w[0-9]+}}, w0, #0x1
49 define zeroext i8 @and_ri_i8(i8 signext %a) {
50 ; CHECK-LABEL: and_ri_i8
51 ; CHECK: and {{w[0-9]+}}, w0, #0xf
56 define zeroext i16 @and_ri_i16(i16 signext %a) {
57 ; CHECK-LABEL: and_ri_i16
58 ; CHECK: and {{w[0-9]+}}, w0, #0xff
63 define i32 @and_ri_i32(i32 %a) {
64 ; CHECK-LABEL: and_ri_i32
65 ; CHECK: and w0, w0, #0xff
70 define i64 @and_ri_i64(i64 %a) {
71 ; CHECK-LABEL: and_ri_i64
72 ; CHECK: and x0, x0, #0xff
77 define zeroext i8 @and_rs_i8(i8 signext %a, i8 signext %b) {
78 ; CHECK-LABEL: and_rs_i8
79 ; CHECK: and [[REG:w[0-9]+]], w0, w1, lsl #4
80 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], {{#0xff|#0xf0}}
86 define zeroext i16 @and_rs_i16(i16 signext %a, i16 signext %b) {
87 ; CHECK-LABEL: and_rs_i16
88 ; CHECK: and [[REG:w[0-9]+]], w0, w1, lsl #8
89 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], {{#0xffff|#0xff00}}
95 define i32 @and_rs_i32(i32 %a, i32 %b) {
96 ; CHECK-LABEL: and_rs_i32
97 ; CHECK: and w0, w0, w1, lsl #8
103 define i64 @and_rs_i64(i64 %a, i64 %b) {
104 ; CHECK-LABEL: and_rs_i64
105 ; CHECK: and x0, x0, x1, lsl #8
112 define zeroext i1 @or_rr_i1(i1 signext %a, i1 signext %b) {
113 ; CHECK-LABEL: or_rr_i1
114 ; CHECK: orr [[REG:w[0-9]+]], w0, w1
119 define zeroext i8 @or_rr_i8(i8 signext %a, i8 signext %b) {
120 ; CHECK-LABEL: or_rr_i8
121 ; CHECK: orr [[REG:w[0-9]+]], w0, w1
122 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xff
127 define zeroext i16 @or_rr_i16(i16 signext %a, i16 signext %b) {
128 ; CHECK-LABEL: or_rr_i16
129 ; CHECK: orr [[REG:w[0-9]+]], w0, w1
130 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xffff
135 define i32 @or_rr_i32(i32 %a, i32 %b) {
136 ; CHECK-LABEL: or_rr_i32
137 ; CHECK: orr w0, w0, w1
142 define i64 @or_rr_i64(i64 %a, i64 %b) {
143 ; CHECK-LABEL: or_rr_i64
144 ; CHECK: orr x0, x0, x1
149 define zeroext i8 @or_ri_i8(i8 %a) {
150 ; CHECK-LABEL: or_ri_i8
151 ; CHECK: orr [[REG:w[0-9]+]], w0, #0xf
152 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xff
157 define zeroext i16 @or_ri_i16(i16 %a) {
158 ; CHECK-LABEL: or_ri_i16
159 ; CHECK: orr [[REG:w[0-9]+]], w0, #0xff
160 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xffff
165 define i32 @or_ri_i32(i32 %a) {
166 ; CHECK-LABEL: or_ri_i32
167 ; CHECK: orr w0, w0, #0xff
172 define i64 @or_ri_i64(i64 %a) {
173 ; CHECK-LABEL: or_ri_i64
174 ; CHECK: orr x0, x0, #0xff
179 define zeroext i8 @or_rs_i8(i8 signext %a, i8 signext %b) {
180 ; CHECK-LABEL: or_rs_i8
181 ; CHECK: orr [[REG:w[0-9]+]], w0, w1, lsl #4
182 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], {{#0xff|#0xf0}}
188 define zeroext i16 @or_rs_i16(i16 signext %a, i16 signext %b) {
189 ; CHECK-LABEL: or_rs_i16
190 ; CHECK: orr [[REG:w[0-9]+]], w0, w1, lsl #8
191 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], {{#0xffff|#0xff00}}
197 define i32 @or_rs_i32(i32 %a, i32 %b) {
198 ; CHECK-LABEL: or_rs_i32
199 ; CHECK: orr w0, w0, w1, lsl #8
205 define i64 @or_rs_i64(i64 %a, i64 %b) {
206 ; CHECK-LABEL: or_rs_i64
207 ; CHECK: orr x0, x0, x1, lsl #8
214 define zeroext i1 @xor_rr_i1(i1 signext %a, i1 signext %b) {
215 ; CHECK-LABEL: xor_rr_i1
216 ; CHECK: eor [[REG:w[0-9]+]], w0, w1
221 define zeroext i8 @xor_rr_i8(i8 signext %a, i8 signext %b) {
222 ; CHECK-LABEL: xor_rr_i8
223 ; CHECK: eor [[REG:w[0-9]+]], w0, w1
224 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xff
229 define zeroext i16 @xor_rr_i16(i16 signext %a, i16 signext %b) {
230 ; CHECK-LABEL: xor_rr_i16
231 ; CHECK: eor [[REG:w[0-9]+]], w0, w1
232 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xffff
237 define i32 @xor_rr_i32(i32 %a, i32 %b) {
238 ; CHECK-LABEL: xor_rr_i32
239 ; CHECK: eor w0, w0, w1
244 define i64 @xor_rr_i64(i64 %a, i64 %b) {
245 ; CHECK-LABEL: xor_rr_i64
246 ; CHECK: eor x0, x0, x1
251 define zeroext i8 @xor_ri_i8(i8 signext %a) {
252 ; CHECK-LABEL: xor_ri_i8
253 ; CHECK: eor [[REG:w[0-9]+]], w0, #0xf
254 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xff
259 define zeroext i16 @xor_ri_i16(i16 signext %a) {
260 ; CHECK-LABEL: xor_ri_i16
261 ; CHECK: eor [[REG:w[0-9]+]], w0, #0xff
262 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], #0xffff
267 define i32 @xor_ri_i32(i32 %a) {
268 ; CHECK-LABEL: xor_ri_i32
269 ; CHECK: eor w0, w0, #0xff
274 define i64 @xor_ri_i64(i64 %a) {
275 ; CHECK-LABEL: xor_ri_i64
276 ; CHECK: eor x0, x0, #0xff
281 define zeroext i8 @xor_rs_i8(i8 %a, i8 %b) {
282 ; CHECK-LABEL: xor_rs_i8
283 ; CHECK: eor [[REG:w[0-9]+]], w0, w1, lsl #4
284 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], {{#0xff|#0xf0}}
290 define zeroext i16 @xor_rs_i16(i16 %a, i16 %b) {
291 ; CHECK-LABEL: xor_rs_i16
292 ; CHECK: eor [[REG:w[0-9]+]], w0, w1, lsl #8
293 ; CHECK-NEXT: and {{w[0-9]+}}, [[REG]], {{#0xffff|#0xff00}}
299 define i32 @xor_rs_i32(i32 %a, i32 %b) {
300 ; CHECK-LABEL: xor_rs_i32
301 ; CHECK: eor w0, w0, w1, lsl #8
307 define i64 @xor_rs_i64(i64 %a, i64 %b) {
308 ; CHECK-LABEL: xor_rs_i64
309 ; CHECK: eor x0, x0, x1, lsl #8