1 ; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
2 ; arm64 has a separate copy: aarch64-large-frame.ll (codegen was too different).
3 declare void @use_addr(i8*)
5 @addr = global i8* null
7 define void @test_bigframe() {
8 ; CHECK-LABEL: test_bigframe:
9 ; CHECK: .cfi_startproc
11 %var1 = alloca i8, i32 20000000
12 %var2 = alloca i8, i32 16
13 %var3 = alloca i8, i32 20000000
14 ; CHECK: sub sp, sp, #496
15 ; CHECK: .cfi_def_cfa sp, 496
16 ; CHECK: str x30, [sp, #488]
17 ; Total adjust is 39999536
18 ; CHECK: movz [[SUBCONST:x[0-9]+]], #22576
19 ; CHECK: movk [[SUBCONST]], #610, lsl #16
20 ; CHECK: sub sp, sp, [[SUBCONST]]
21 ; CHECK: .cfi_def_cfa sp, 40000032
22 ; CHECK: .cfi_offset x30, -8
24 ; Total offset is 20000024
25 ; CHECK: movz [[VAR1OFFSET:x[0-9]+]], #11544
26 ; CHECK: movk [[VAR1OFFSET]], #305, lsl #16
27 ; CHECK: add {{x[0-9]+}}, sp, [[VAR1OFFSET]]
28 store volatile i8* %var1, i8** @addr
30 %var1plus2 = getelementptr i8* %var1, i32 2
31 store volatile i8* %var1plus2, i8** @addr
33 ; CHECK: movz [[VAR2OFFSET:x[0-9]+]], #11528
34 ; CHECK: movk [[VAR2OFFSET]], #305, lsl #16
35 ; CHECK: add {{x[0-9]+}}, sp, [[VAR2OFFSET]]
36 store volatile i8* %var2, i8** @addr
38 %var2plus2 = getelementptr i8* %var2, i32 2
39 store volatile i8* %var2plus2, i8** @addr
41 store volatile i8* %var3, i8** @addr
43 %var3plus2 = getelementptr i8* %var3, i32 2
44 store volatile i8* %var3plus2, i8** @addr
46 ; CHECK: movz [[ADDCONST:x[0-9]+]], #22576
47 ; CHECK: movk [[ADDCONST]], #610, lsl #16
48 ; CHECK: add sp, sp, [[ADDCONST]]
53 define void @test_mediumframe() {
54 ; CHECK-LABEL: test_mediumframe:
55 %var1 = alloca i8, i32 1000000
56 %var2 = alloca i8, i32 16
57 %var3 = alloca i8, i32 1000000
58 ; CHECK: sub sp, sp, #496
59 ; CHECK: str x30, [sp, #488]
60 ; CHECK: sub sp, sp, #688
61 ; CHECK-NEXT: sub sp, sp, #488, lsl #12
63 store volatile i8* %var1, i8** @addr
64 ; CHECK: add [[VAR1ADDR:x[0-9]+]], sp, #600
65 ; CHECK: add [[VAR1ADDR]], [[VAR1ADDR]], #244, lsl #12
67 %var1plus2 = getelementptr i8* %var1, i32 2
68 store volatile i8* %var1plus2, i8** @addr
69 ; CHECK: add [[VAR1PLUS2:x[0-9]+]], {{x[0-9]+}}, #2
71 store volatile i8* %var2, i8** @addr
72 ; CHECK: add [[VAR2ADDR:x[0-9]+]], sp, #584
73 ; CHECK: add [[VAR2ADDR]], [[VAR2ADDR]], #244, lsl #12
75 %var2plus2 = getelementptr i8* %var2, i32 2
76 store volatile i8* %var2plus2, i8** @addr
77 ; CHECK: add [[VAR2PLUS2:x[0-9]+]], {{x[0-9]+}}, #2
79 store volatile i8* %var3, i8** @addr
81 %var3plus2 = getelementptr i8* %var3, i32 2
82 store volatile i8* %var3plus2, i8** @addr
84 ; CHECK: add sp, sp, #688
85 ; CHECK: add sp, sp, #488, lsl #12
86 ; CHECK: ldr x30, [sp, #488]
87 ; CHECK: add sp, sp, #496
92 @bigspace = global [8 x i64] zeroinitializer
94 ; If temporary registers are allocated for adjustment, they should *not* clobber
96 define void @test_tempallocation([8 x i64] %val) nounwind {
97 ; CHECK-LABEL: test_tempallocation:
98 %var = alloca i8, i32 1000000
101 ; Make sure the prologue is reasonably efficient
102 ; CHECK-NEXT: stp x29, x30, [sp,
103 ; CHECK-NEXT: stp x25, x26, [sp,
104 ; CHECK-NEXT: stp x23, x24, [sp,
105 ; CHECK-NEXT: stp x21, x22, [sp,
106 ; CHECK-NEXT: stp x19, x20, [sp,
108 ; Make sure we don't trash an argument register
109 ; CHECK-NOT: movz {{x[0-7],}}
112 ; CHECK-NOT: movz {{x[0-7],}}
115 call void @use_addr(i8* %var)
117 store [8 x i64] %val, [8 x i64]* @bigspace