1 ; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
3 ; Test that we use the correct register class.
4 define i32 @mul_add_imm(i32 %a, i32 %b) {
5 ; CHECK-LABEL: mul_add_imm
6 ; CHECK: orr [[REG:w[0-9]+]], wzr, #0x4
7 ; CHECK-NEXT: madd {{w[0-9]+}}, w0, w1, [[REG]]
13 define i32 @mul_sub_imm1(i32 %a, i32 %b) {
14 ; CHECK-LABEL: mul_sub_imm1
15 ; CHECK: orr [[REG:w[0-9]+]], wzr, #0x4
16 ; CHECK-NEXT: msub {{w[0-9]+}}, w0, w1, [[REG]]