1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
3 define <8 x i8> @add8xi8(<8 x i8> %A, <8 x i8> %B) {
4 ;CHECK: add {{v[0-31]+}}.8b, {{v[0-31]+}}.8b, {{v[0-31]+}}.8b
5 %tmp3 = add <8 x i8> %A, %B;
9 define <16 x i8> @add16xi8(<16 x i8> %A, <16 x i8> %B) {
10 ;CHECK: add {{v[0-31]+}}.16b, {{v[0-31]+}}.16b, {{v[0-31]+}}.16b
11 %tmp3 = add <16 x i8> %A, %B;
15 define <4 x i16> @add4xi16(<4 x i16> %A, <4 x i16> %B) {
16 ;CHECK: add {{v[0-31]+}}.4h, {{v[0-31]+}}.4h, {{v[0-31]+}}.4h
17 %tmp3 = add <4 x i16> %A, %B;
21 define <8 x i16> @add8xi16(<8 x i16> %A, <8 x i16> %B) {
22 ;CHECK: add {{v[0-31]+}}.8h, {{v[0-31]+}}.8h, {{v[0-31]+}}.8h
23 %tmp3 = add <8 x i16> %A, %B;
27 define <2 x i32> @add2xi32(<2 x i32> %A, <2 x i32> %B) {
28 ;CHECK: add {{v[0-31]+}}.2s, {{v[0-31]+}}.2s, {{v[0-31]+}}.2s
29 %tmp3 = add <2 x i32> %A, %B;
33 define <4 x i32> @add4x32(<4 x i32> %A, <4 x i32> %B) {
34 ;CHECK: add {{v[0-31]+}}.4s, {{v[0-31]+}}.4s, {{v[0-31]+}}.4s
35 %tmp3 = add <4 x i32> %A, %B;
39 define <2 x i64> @add2xi64(<2 x i64> %A, <2 x i64> %B) {
40 ;CHECK: add {{v[0-31]+}}.2d, {{v[0-31]+}}.2d, {{v[0-31]+}}.2d
41 %tmp3 = add <2 x i64> %A, %B;
45 define <2 x float> @add2xfloat(<2 x float> %A, <2 x float> %B) {
46 ;CHECK: fadd {{v[0-31]+}}.2s, {{v[0-31]+}}.2s, {{v[0-31]+}}.2s
47 %tmp3 = fadd <2 x float> %A, %B;
51 define <4 x float> @add4xfloat(<4 x float> %A, <4 x float> %B) {
52 ;CHECK: fadd {{v[0-31]+}}.4s, {{v[0-31]+}}.4s, {{v[0-31]+}}.4s
53 %tmp3 = fadd <4 x float> %A, %B;
56 define <2 x double> @add2xdouble(<2 x double> %A, <2 x double> %B) {
57 ;CHECK: add {{v[0-31]+}}.2d, {{v[0-31]+}}.2d, {{v[0-31]+}}.2d
58 %tmp3 = fadd <2 x double> %A, %B;
59 ret <2 x double> %tmp3
62 define <8 x i8> @sub8xi8(<8 x i8> %A, <8 x i8> %B) {
63 ;CHECK: sub {{v[0-31]+}}.8b, {{v[0-31]+}}.8b, {{v[0-31]+}}.8b
64 %tmp3 = sub <8 x i8> %A, %B;
68 define <16 x i8> @sub16xi8(<16 x i8> %A, <16 x i8> %B) {
69 ;CHECK: sub {{v[0-31]+}}.16b, {{v[0-31]+}}.16b, {{v[0-31]+}}.16b
70 %tmp3 = sub <16 x i8> %A, %B;
74 define <4 x i16> @sub4xi16(<4 x i16> %A, <4 x i16> %B) {
75 ;CHECK: sub {{v[0-31]+}}.4h, {{v[0-31]+}}.4h, {{v[0-31]+}}.4h
76 %tmp3 = sub <4 x i16> %A, %B;
80 define <8 x i16> @sub8xi16(<8 x i16> %A, <8 x i16> %B) {
81 ;CHECK: sub {{v[0-31]+}}.8h, {{v[0-31]+}}.8h, {{v[0-31]+}}.8h
82 %tmp3 = sub <8 x i16> %A, %B;
86 define <2 x i32> @sub2xi32(<2 x i32> %A, <2 x i32> %B) {
87 ;CHECK: sub {{v[0-31]+}}.2s, {{v[0-31]+}}.2s, {{v[0-31]+}}.2s
88 %tmp3 = sub <2 x i32> %A, %B;
92 define <4 x i32> @sub4x32(<4 x i32> %A, <4 x i32> %B) {
93 ;CHECK: sub {{v[0-31]+}}.4s, {{v[0-31]+}}.4s, {{v[0-31]+}}.4s
94 %tmp3 = sub <4 x i32> %A, %B;
98 define <2 x i64> @sub2xi64(<2 x i64> %A, <2 x i64> %B) {
99 ;CHECK: sub {{v[0-31]+}}.2d, {{v[0-31]+}}.2d, {{v[0-31]+}}.2d
100 %tmp3 = sub <2 x i64> %A, %B;
104 define <2 x float> @sub2xfloat(<2 x float> %A, <2 x float> %B) {
105 ;CHECK: fsub {{v[0-31]+}}.2s, {{v[0-31]+}}.2s, {{v[0-31]+}}.2s
106 %tmp3 = fsub <2 x float> %A, %B;
107 ret <2 x float> %tmp3
110 define <4 x float> @sub4xfloat(<4 x float> %A, <4 x float> %B) {
111 ;CHECK: fsub {{v[0-31]+}}.4s, {{v[0-31]+}}.4s, {{v[0-31]+}}.4s
112 %tmp3 = fsub <4 x float> %A, %B;
113 ret <4 x float> %tmp3
115 define <2 x double> @sub2xdouble(<2 x double> %A, <2 x double> %B) {
116 ;CHECK: sub {{v[0-31]+}}.2d, {{v[0-31]+}}.2d, {{v[0-31]+}}.2d
117 %tmp3 = fsub <2 x double> %A, %B;
118 ret <2 x double> %tmp3
121 define <1 x i64> @add1xi64(<1 x i64> %A, <1 x i64> %B) {
122 ;CHECK: add {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
123 %tmp3 = add <1 x i64> %A, %B;
127 define <1 x i64> @sub1xi64(<1 x i64> %A, <1 x i64> %B) {
128 ;CHECK: sub {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
129 %tmp3 = sub <1 x i64> %A, %B;