1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
3 define <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) {
5 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x2
7 %vext = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
11 define <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) {
12 ; CHECK: test_vext_s16:
13 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x6
15 %vext = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
19 define <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) {
20 ; CHECK: test_vext_s32:
21 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x4
23 %vext = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 2>
27 define <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) {
28 ; CHECK: test_vext_s64:
30 %vext = shufflevector <1 x i64> %a, <1 x i64> %b, <1 x i32> <i32 0>
34 define <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) {
35 ; CHECK: test_vextq_s8:
36 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x2
38 %vext = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
42 define <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) {
43 ; CHECK: test_vextq_s16:
44 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x6
46 %vext = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>
50 define <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) {
51 ; CHECK: test_vextq_s32:
52 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x4
54 %vext = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
58 define <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) {
59 ; CHECK: test_vextq_s64:
60 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x8
62 %vext = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
66 define <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) {
67 ; CHECK: test_vext_u8:
68 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x2
70 %vext = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
74 define <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) {
75 ; CHECK: test_vext_u16:
76 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x6
78 %vext = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
82 define <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) {
83 ; CHECK: test_vext_u32:
84 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x4
86 %vext = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 2>
90 define <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) {
91 ; CHECK: test_vext_u64:
93 %vext = shufflevector <1 x i64> %a, <1 x i64> %b, <1 x i32> <i32 0>
97 define <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) {
98 ; CHECK: test_vextq_u8:
99 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x2
101 %vext = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
105 define <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) {
106 ; CHECK: test_vextq_u16:
107 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x6
109 %vext = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>
113 define <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) {
114 ; CHECK: test_vextq_u32:
115 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x4
117 %vext = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
121 define <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) {
122 ; CHECK: test_vextq_u64:
123 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x8
125 %vext = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
129 define <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) {
130 ; CHECK: test_vext_f32:
131 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x4
133 %vext = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 2>
134 ret <2 x float> %vext
137 define <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) {
138 ; CHECK: test_vext_f64:
140 %vext = shufflevector <1 x double> %a, <1 x double> %b, <1 x i32> <i32 0>
141 ret <1 x double> %vext
144 define <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) {
145 ; CHECK: test_vextq_f32:
146 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x4
148 %vext = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
149 ret <4 x float> %vext
152 define <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) {
153 ; CHECK: test_vextq_f64:
154 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x8
156 %vext = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 2>
157 ret <2 x double> %vext
160 define <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) {
161 ; CHECK: test_vext_p8:
162 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x2
164 %vext = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
168 define <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) {
169 ; CHECK: test_vext_p16:
170 ; CHECK: ext {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #0x6
172 %vext = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
176 define <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) {
177 ; CHECK: test_vextq_p8:
178 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x2
180 %vext = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
184 define <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) {
185 ; CHECK: test_vextq_p16:
186 ; CHECK: ext {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #0x6
188 %vext = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>