1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
2 ; arm64 does not use these pseudo-vectors, and they're not blessed by the PCS. Skipping.
4 ; Test load/store of v1i8, v1i16, v1i32 types can be selected correctly
5 define void @load.store.v1i8(<1 x i8>* %ptr, <1 x i8>* %ptr2) {
6 ; CHECK-LABEL: load.store.v1i8:
7 ; CHECK: ldr b{{[0-9]+}}, [x{{[0-9]+|sp}}]
8 ; CHECK: str b{{[0-9]+}}, [x{{[0-9]+|sp}}]
9 %a = load <1 x i8>* %ptr
10 store <1 x i8> %a, <1 x i8>* %ptr2
14 define void @load.store.v1i16(<1 x i16>* %ptr, <1 x i16>* %ptr2) {
15 ; CHECK-LABEL: load.store.v1i16:
16 ; CHECK: ldr h{{[0-9]+}}, [x{{[0-9]+|sp}}]
17 ; CHECK: str h{{[0-9]+}}, [x{{[0-9]+|sp}}]
18 %a = load <1 x i16>* %ptr
19 store <1 x i16> %a, <1 x i16>* %ptr2
23 define void @load.store.v1i32(<1 x i32>* %ptr, <1 x i32>* %ptr2) {
24 ; CHECK-LABEL: load.store.v1i32:
25 ; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+|sp}}]
26 ; CHECK: str s{{[0-9]+}}, [x{{[0-9]+|sp}}]
27 %a = load <1 x i32>* %ptr
28 store <1 x i32> %a, <1 x i32>* %ptr2