1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
3 %struct.int8x8x2_t = type { [2 x <8 x i8>] }
4 %struct.int16x4x2_t = type { [2 x <4 x i16>] }
5 %struct.int32x2x2_t = type { [2 x <2 x i32>] }
6 %struct.uint8x8x2_t = type { [2 x <8 x i8>] }
7 %struct.uint16x4x2_t = type { [2 x <4 x i16>] }
8 %struct.uint32x2x2_t = type { [2 x <2 x i32>] }
9 %struct.float32x2x2_t = type { [2 x <2 x float>] }
10 %struct.poly8x8x2_t = type { [2 x <8 x i8>] }
11 %struct.poly16x4x2_t = type { [2 x <4 x i16>] }
12 %struct.int8x16x2_t = type { [2 x <16 x i8>] }
13 %struct.int16x8x2_t = type { [2 x <8 x i16>] }
14 %struct.int32x4x2_t = type { [2 x <4 x i32>] }
15 %struct.uint8x16x2_t = type { [2 x <16 x i8>] }
16 %struct.uint16x8x2_t = type { [2 x <8 x i16>] }
17 %struct.uint32x4x2_t = type { [2 x <4 x i32>] }
18 %struct.float32x4x2_t = type { [2 x <4 x float>] }
19 %struct.poly8x16x2_t = type { [2 x <16 x i8>] }
20 %struct.poly16x8x2_t = type { [2 x <8 x i16>] }
22 define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) {
23 ; CHECK: test_vuzp1_s8:
24 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
26 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
27 ret <8 x i8> %shuffle.i
30 define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) {
31 ; CHECK: test_vuzp1q_s8:
32 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
34 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
35 ret <16 x i8> %shuffle.i
38 define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) {
39 ; CHECK: test_vuzp1_s16:
40 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
42 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
43 ret <4 x i16> %shuffle.i
46 define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) {
47 ; CHECK: test_vuzp1q_s16:
48 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
50 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
51 ret <8 x i16> %shuffle.i
54 define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) {
55 ; CHECK: test_vuzp1_s32:
56 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
58 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
59 ret <2 x i32> %shuffle.i
62 define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) {
63 ; CHECK: test_vuzp1q_s32:
64 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
66 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
67 ret <4 x i32> %shuffle.i
70 define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) {
71 ; CHECK: test_vuzp1q_s64:
72 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
74 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
75 ret <2 x i64> %shuffle.i
78 define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) {
79 ; CHECK: test_vuzp1_u8:
80 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
82 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
83 ret <8 x i8> %shuffle.i
86 define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) {
87 ; CHECK: test_vuzp1q_u8:
88 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
90 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
91 ret <16 x i8> %shuffle.i
94 define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) {
95 ; CHECK: test_vuzp1_u16:
96 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
98 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
99 ret <4 x i16> %shuffle.i
102 define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) {
103 ; CHECK: test_vuzp1q_u16:
104 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
106 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
107 ret <8 x i16> %shuffle.i
110 define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) {
111 ; CHECK: test_vuzp1_u32:
112 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
114 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
115 ret <2 x i32> %shuffle.i
118 define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) {
119 ; CHECK: test_vuzp1q_u32:
120 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
122 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
123 ret <4 x i32> %shuffle.i
126 define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) {
127 ; CHECK: test_vuzp1q_u64:
128 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
130 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
131 ret <2 x i64> %shuffle.i
134 define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) {
135 ; CHECK: test_vuzp1_f32:
136 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
138 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
139 ret <2 x float> %shuffle.i
142 define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) {
143 ; CHECK: test_vuzp1q_f32:
144 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
146 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
147 ret <4 x float> %shuffle.i
150 define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) {
151 ; CHECK: test_vuzp1q_f64:
152 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
154 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
155 ret <2 x double> %shuffle.i
158 define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) {
159 ; CHECK: test_vuzp1_p8:
160 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
162 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
163 ret <8 x i8> %shuffle.i
166 define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) {
167 ; CHECK: test_vuzp1q_p8:
168 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
170 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
171 ret <16 x i8> %shuffle.i
174 define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) {
175 ; CHECK: test_vuzp1_p16:
176 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
178 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
179 ret <4 x i16> %shuffle.i
182 define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) {
183 ; CHECK: test_vuzp1q_p16:
184 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
186 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
187 ret <8 x i16> %shuffle.i
190 define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) {
191 ; CHECK: test_vuzp2_s8:
192 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
194 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
195 ret <8 x i8> %shuffle.i
198 define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) {
199 ; CHECK: test_vuzp2q_s8:
200 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
202 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
203 ret <16 x i8> %shuffle.i
206 define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) {
207 ; CHECK: test_vuzp2_s16:
208 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
210 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
211 ret <4 x i16> %shuffle.i
214 define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) {
215 ; CHECK: test_vuzp2q_s16:
216 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
218 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
219 ret <8 x i16> %shuffle.i
222 define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) {
223 ; CHECK: test_vuzp2_s32:
224 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
226 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
227 ret <2 x i32> %shuffle.i
230 define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) {
231 ; CHECK: test_vuzp2q_s32:
232 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
234 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
235 ret <4 x i32> %shuffle.i
238 define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) {
239 ; CHECK: test_vuzp2q_s64:
240 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
241 ; CHECK-NEXT: orr {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
243 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
244 ret <2 x i64> %shuffle.i
247 define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) {
248 ; CHECK: test_vuzp2_u8:
249 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
251 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
252 ret <8 x i8> %shuffle.i
255 define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) {
256 ; CHECK: test_vuzp2q_u8:
257 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
259 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
260 ret <16 x i8> %shuffle.i
263 define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) {
264 ; CHECK: test_vuzp2_u16:
265 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
267 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
268 ret <4 x i16> %shuffle.i
271 define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) {
272 ; CHECK: test_vuzp2q_u16:
273 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
275 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
276 ret <8 x i16> %shuffle.i
279 define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) {
280 ; CHECK: test_vuzp2_u32:
281 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
283 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
284 ret <2 x i32> %shuffle.i
287 define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) {
288 ; CHECK: test_vuzp2q_u32:
289 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
291 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
292 ret <4 x i32> %shuffle.i
295 define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) {
296 ; CHECK: test_vuzp2q_u64:
297 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
298 ; CHECK-NEXT: orr {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
300 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
301 ret <2 x i64> %shuffle.i
304 define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) {
305 ; CHECK: test_vuzp2_f32:
306 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
308 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
309 ret <2 x float> %shuffle.i
312 define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) {
313 ; CHECK: test_vuzp2q_f32:
314 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
316 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
317 ret <4 x float> %shuffle.i
320 define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) {
321 ; CHECK: test_vuzp2q_f64:
322 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
323 ; CHECK-NEXT: orr {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
325 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
326 ret <2 x double> %shuffle.i
329 define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) {
330 ; CHECK: test_vuzp2_p8:
331 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
333 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
334 ret <8 x i8> %shuffle.i
337 define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) {
338 ; CHECK: test_vuzp2q_p8:
339 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
341 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
342 ret <16 x i8> %shuffle.i
345 define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) {
346 ; CHECK: test_vuzp2_p16:
347 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
349 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
350 ret <4 x i16> %shuffle.i
353 define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) {
354 ; CHECK: test_vuzp2q_p16:
355 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
357 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
358 ret <8 x i16> %shuffle.i
361 define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) {
362 ; CHECK: test_vzip1_s8:
363 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
365 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
366 ret <8 x i8> %shuffle.i
369 define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) {
370 ; CHECK: test_vzip1q_s8:
371 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
373 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
374 ret <16 x i8> %shuffle.i
377 define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) {
378 ; CHECK: test_vzip1_s16:
379 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
381 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
382 ret <4 x i16> %shuffle.i
385 define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) {
386 ; CHECK: test_vzip1q_s16:
387 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
389 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
390 ret <8 x i16> %shuffle.i
393 define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) {
394 ; CHECK: test_vzip1_s32:
395 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
397 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
398 ret <2 x i32> %shuffle.i
401 define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) {
402 ; CHECK: test_vzip1q_s32:
403 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
405 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
406 ret <4 x i32> %shuffle.i
409 define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) {
410 ; CHECK: test_vzip1q_s64:
411 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
413 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
414 ret <2 x i64> %shuffle.i
417 define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) {
418 ; CHECK: test_vzip1_u8:
419 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
421 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
422 ret <8 x i8> %shuffle.i
425 define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) {
426 ; CHECK: test_vzip1q_u8:
427 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
429 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
430 ret <16 x i8> %shuffle.i
433 define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) {
434 ; CHECK: test_vzip1_u16:
435 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
437 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
438 ret <4 x i16> %shuffle.i
441 define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) {
442 ; CHECK: test_vzip1q_u16:
443 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
445 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
446 ret <8 x i16> %shuffle.i
449 define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) {
450 ; CHECK: test_vzip1_u32:
451 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
453 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
454 ret <2 x i32> %shuffle.i
457 define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) {
458 ; CHECK: test_vzip1q_u32:
459 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
461 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
462 ret <4 x i32> %shuffle.i
465 define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) {
466 ; CHECK: test_vzip1q_u64:
467 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
469 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
470 ret <2 x i64> %shuffle.i
473 define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) {
474 ; CHECK: test_vzip1_f32:
475 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
477 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
478 ret <2 x float> %shuffle.i
481 define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) {
482 ; CHECK: test_vzip1q_f32:
483 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
485 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
486 ret <4 x float> %shuffle.i
489 define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) {
490 ; CHECK: test_vzip1q_f64:
491 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
493 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
494 ret <2 x double> %shuffle.i
497 define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) {
498 ; CHECK: test_vzip1_p8:
499 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
501 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
502 ret <8 x i8> %shuffle.i
505 define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) {
506 ; CHECK: test_vzip1q_p8:
507 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
509 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
510 ret <16 x i8> %shuffle.i
513 define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) {
514 ; CHECK: test_vzip1_p16:
515 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
517 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
518 ret <4 x i16> %shuffle.i
521 define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) {
522 ; CHECK: test_vzip1q_p16:
523 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
525 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
526 ret <8 x i16> %shuffle.i
529 define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) {
530 ; CHECK: test_vzip2_s8:
531 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
533 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
534 ret <8 x i8> %shuffle.i
537 define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) {
538 ; CHECK: test_vzip2q_s8:
539 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
541 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
542 ret <16 x i8> %shuffle.i
545 define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) {
546 ; CHECK: test_vzip2_s16:
547 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
549 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
550 ret <4 x i16> %shuffle.i
553 define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) {
554 ; CHECK: test_vzip2q_s16:
555 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
557 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
558 ret <8 x i16> %shuffle.i
561 define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) {
562 ; CHECK: test_vzip2_s32:
563 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
565 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
566 ret <2 x i32> %shuffle.i
569 define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) {
570 ; CHECK: test_vzip2q_s32:
571 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
573 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
574 ret <4 x i32> %shuffle.i
577 define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) {
578 ; CHECK: test_vzip2q_s64:
579 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
581 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
582 ret <2 x i64> %shuffle.i
585 define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) {
586 ; CHECK: test_vzip2_u8:
587 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
589 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
590 ret <8 x i8> %shuffle.i
593 define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) {
594 ; CHECK: test_vzip2q_u8:
595 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
597 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
598 ret <16 x i8> %shuffle.i
601 define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) {
602 ; CHECK: test_vzip2_u16:
603 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
605 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
606 ret <4 x i16> %shuffle.i
609 define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) {
610 ; CHECK: test_vzip2q_u16:
611 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
613 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
614 ret <8 x i16> %shuffle.i
617 define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) {
618 ; CHECK: test_vzip2_u32:
619 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
621 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
622 ret <2 x i32> %shuffle.i
625 define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) {
626 ; CHECK: test_vzip2q_u32:
627 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
629 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
630 ret <4 x i32> %shuffle.i
633 define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) {
634 ; CHECK: test_vzip2q_u64:
635 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
637 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
638 ret <2 x i64> %shuffle.i
641 define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) {
642 ; CHECK: test_vzip2_f32:
643 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
645 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
646 ret <2 x float> %shuffle.i
649 define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) {
650 ; CHECK: test_vzip2q_f32:
651 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
653 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
654 ret <4 x float> %shuffle.i
657 define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) {
658 ; CHECK: test_vzip2q_f64:
659 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
661 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
662 ret <2 x double> %shuffle.i
665 define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) {
666 ; CHECK: test_vzip2_p8:
667 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
669 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
670 ret <8 x i8> %shuffle.i
673 define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) {
674 ; CHECK: test_vzip2q_p8:
675 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
677 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
678 ret <16 x i8> %shuffle.i
681 define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) {
682 ; CHECK: test_vzip2_p16:
683 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
685 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
686 ret <4 x i16> %shuffle.i
689 define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) {
690 ; CHECK: test_vzip2q_p16:
691 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
693 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
694 ret <8 x i16> %shuffle.i
697 define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) {
698 ; CHECK: test_vtrn1_s8:
699 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
701 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
702 ret <8 x i8> %shuffle.i
705 define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) {
706 ; CHECK: test_vtrn1q_s8:
707 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
709 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
710 ret <16 x i8> %shuffle.i
713 define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) {
714 ; CHECK: test_vtrn1_s16:
715 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
717 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
718 ret <4 x i16> %shuffle.i
721 define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) {
722 ; CHECK: test_vtrn1q_s16:
723 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
725 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
726 ret <8 x i16> %shuffle.i
729 define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) {
730 ; CHECK: test_vtrn1_s32:
731 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
733 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
734 ret <2 x i32> %shuffle.i
737 define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) {
738 ; CHECK: test_vtrn1q_s32:
739 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
741 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
742 ret <4 x i32> %shuffle.i
745 define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) {
746 ; CHECK: test_vtrn1q_s64:
747 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
749 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
750 ret <2 x i64> %shuffle.i
753 define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) {
754 ; CHECK: test_vtrn1_u8:
755 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
757 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
758 ret <8 x i8> %shuffle.i
761 define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) {
762 ; CHECK: test_vtrn1q_u8:
763 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
765 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
766 ret <16 x i8> %shuffle.i
769 define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) {
770 ; CHECK: test_vtrn1_u16:
771 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
773 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
774 ret <4 x i16> %shuffle.i
777 define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) {
778 ; CHECK: test_vtrn1q_u16:
779 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
781 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
782 ret <8 x i16> %shuffle.i
785 define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) {
786 ; CHECK: test_vtrn1_u32:
787 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
789 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
790 ret <2 x i32> %shuffle.i
793 define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) {
794 ; CHECK: test_vtrn1q_u32:
795 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
797 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
798 ret <4 x i32> %shuffle.i
801 define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) {
802 ; CHECK: test_vtrn1q_u64:
803 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
805 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
806 ret <2 x i64> %shuffle.i
809 define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) {
810 ; CHECK: test_vtrn1_f32:
811 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
813 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
814 ret <2 x float> %shuffle.i
817 define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) {
818 ; CHECK: test_vtrn1q_f32:
819 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
821 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
822 ret <4 x float> %shuffle.i
825 define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) {
826 ; CHECK: test_vtrn1q_f64:
827 ; CHECK: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
829 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
830 ret <2 x double> %shuffle.i
833 define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) {
834 ; CHECK: test_vtrn1_p8:
835 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
837 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
838 ret <8 x i8> %shuffle.i
841 define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) {
842 ; CHECK: test_vtrn1q_p8:
843 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
845 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
846 ret <16 x i8> %shuffle.i
849 define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) {
850 ; CHECK: test_vtrn1_p16:
851 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
853 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
854 ret <4 x i16> %shuffle.i
857 define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) {
858 ; CHECK: test_vtrn1q_p16:
859 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
861 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
862 ret <8 x i16> %shuffle.i
865 define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) {
866 ; CHECK: test_vtrn2_s8:
867 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
869 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
870 ret <8 x i8> %shuffle.i
873 define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) {
874 ; CHECK: test_vtrn2q_s8:
875 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
877 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
878 ret <16 x i8> %shuffle.i
881 define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) {
882 ; CHECK: test_vtrn2_s16:
883 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
885 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
886 ret <4 x i16> %shuffle.i
889 define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) {
890 ; CHECK: test_vtrn2q_s16:
891 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
893 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
894 ret <8 x i16> %shuffle.i
897 define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) {
898 ; CHECK: test_vtrn2_s32:
899 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
901 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
902 ret <2 x i32> %shuffle.i
905 define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) {
906 ; CHECK: test_vtrn2q_s32:
907 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
909 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
910 ret <4 x i32> %shuffle.i
913 define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) {
914 ; CHECK: test_vtrn2q_s64:
915 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
917 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
918 ret <2 x i64> %shuffle.i
921 define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) {
922 ; CHECK: test_vtrn2_u8:
923 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
925 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
926 ret <8 x i8> %shuffle.i
929 define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) {
930 ; CHECK: test_vtrn2q_u8:
931 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
933 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
934 ret <16 x i8> %shuffle.i
937 define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) {
938 ; CHECK: test_vtrn2_u16:
939 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
941 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
942 ret <4 x i16> %shuffle.i
945 define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) {
946 ; CHECK: test_vtrn2q_u16:
947 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
949 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
950 ret <8 x i16> %shuffle.i
953 define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) {
954 ; CHECK: test_vtrn2_u32:
955 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
957 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
958 ret <2 x i32> %shuffle.i
961 define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) {
962 ; CHECK: test_vtrn2q_u32:
963 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
965 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
966 ret <4 x i32> %shuffle.i
969 define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) {
970 ; CHECK: test_vtrn2q_u64:
971 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
973 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
974 ret <2 x i64> %shuffle.i
977 define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) {
978 ; CHECK: test_vtrn2_f32:
979 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
981 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
982 ret <2 x float> %shuffle.i
985 define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) {
986 ; CHECK: test_vtrn2q_f32:
987 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
989 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
990 ret <4 x float> %shuffle.i
993 define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) {
994 ; CHECK: test_vtrn2q_f64:
995 ; CHECK: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
997 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
998 ret <2 x double> %shuffle.i
1001 define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) {
1002 ; CHECK: test_vtrn2_p8:
1003 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1005 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1006 ret <8 x i8> %shuffle.i
1009 define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) {
1010 ; CHECK: test_vtrn2q_p8:
1011 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1013 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1014 ret <16 x i8> %shuffle.i
1017 define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) {
1018 ; CHECK: test_vtrn2_p16:
1019 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1021 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1022 ret <4 x i16> %shuffle.i
1025 define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) {
1026 ; CHECK: test_vtrn2q_p16:
1027 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1029 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1030 ret <8 x i16> %shuffle.i
1033 define <8 x i8> @test_same_vuzp1_s8(<8 x i8> %a) {
1034 ; CHECK: test_same_vuzp1_s8:
1035 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1037 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1038 ret <8 x i8> %shuffle.i
1041 define <16 x i8> @test_same_vuzp1q_s8(<16 x i8> %a) {
1042 ; CHECK: test_same_vuzp1q_s8:
1043 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1045 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1046 ret <16 x i8> %shuffle.i
1049 define <4 x i16> @test_same_vuzp1_s16(<4 x i16> %a) {
1050 ; CHECK: test_same_vuzp1_s16:
1051 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1053 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1054 ret <4 x i16> %shuffle.i
1057 define <8 x i16> @test_same_vuzp1q_s16(<8 x i16> %a) {
1058 ; CHECK: test_same_vuzp1q_s16:
1059 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1061 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1062 ret <8 x i16> %shuffle.i
1065 define <4 x i32> @test_same_vuzp1q_s32(<4 x i32> %a) {
1066 ; CHECK: test_same_vuzp1q_s32:
1067 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1069 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1070 ret <4 x i32> %shuffle.i
1073 define <8 x i8> @test_same_vuzp1_u8(<8 x i8> %a) {
1074 ; CHECK: test_same_vuzp1_u8:
1075 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1077 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1078 ret <8 x i8> %shuffle.i
1081 define <16 x i8> @test_same_vuzp1q_u8(<16 x i8> %a) {
1082 ; CHECK: test_same_vuzp1q_u8:
1083 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1085 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1086 ret <16 x i8> %shuffle.i
1089 define <4 x i16> @test_same_vuzp1_u16(<4 x i16> %a) {
1090 ; CHECK: test_same_vuzp1_u16:
1091 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1093 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1094 ret <4 x i16> %shuffle.i
1097 define <8 x i16> @test_same_vuzp1q_u16(<8 x i16> %a) {
1098 ; CHECK: test_same_vuzp1q_u16:
1099 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1101 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1102 ret <8 x i16> %shuffle.i
1105 define <4 x i32> @test_same_vuzp1q_u32(<4 x i32> %a) {
1106 ; CHECK: test_same_vuzp1q_u32:
1107 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1109 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1110 ret <4 x i32> %shuffle.i
1113 define <4 x float> @test_same_vuzp1q_f32(<4 x float> %a) {
1114 ; CHECK: test_same_vuzp1q_f32:
1115 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1117 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1118 ret <4 x float> %shuffle.i
1121 define <8 x i8> @test_same_vuzp1_p8(<8 x i8> %a) {
1122 ; CHECK: test_same_vuzp1_p8:
1123 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1125 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1126 ret <8 x i8> %shuffle.i
1129 define <16 x i8> @test_same_vuzp1q_p8(<16 x i8> %a) {
1130 ; CHECK: test_same_vuzp1q_p8:
1131 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1133 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1134 ret <16 x i8> %shuffle.i
1137 define <4 x i16> @test_same_vuzp1_p16(<4 x i16> %a) {
1138 ; CHECK: test_same_vuzp1_p16:
1139 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1141 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1142 ret <4 x i16> %shuffle.i
1145 define <8 x i16> @test_same_vuzp1q_p16(<8 x i16> %a) {
1146 ; CHECK: test_same_vuzp1q_p16:
1147 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1149 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1150 ret <8 x i16> %shuffle.i
1153 define <8 x i8> @test_same_vuzp2_s8(<8 x i8> %a) {
1154 ; CHECK: test_same_vuzp2_s8:
1155 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1157 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1158 ret <8 x i8> %shuffle.i
1161 define <16 x i8> @test_same_vuzp2q_s8(<16 x i8> %a) {
1162 ; CHECK: test_same_vuzp2q_s8:
1163 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1165 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1166 ret <16 x i8> %shuffle.i
1169 define <4 x i16> @test_same_vuzp2_s16(<4 x i16> %a) {
1170 ; CHECK: test_same_vuzp2_s16:
1171 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1173 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1174 ret <4 x i16> %shuffle.i
1177 define <8 x i16> @test_same_vuzp2q_s16(<8 x i16> %a) {
1178 ; CHECK: test_same_vuzp2q_s16:
1179 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1181 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1182 ret <8 x i16> %shuffle.i
1185 define <4 x i32> @test_same_vuzp2q_s32(<4 x i32> %a) {
1186 ; CHECK: test_same_vuzp2q_s32:
1187 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1189 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1190 ret <4 x i32> %shuffle.i
1193 define <8 x i8> @test_same_vuzp2_u8(<8 x i8> %a) {
1194 ; CHECK: test_same_vuzp2_u8:
1195 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1197 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1198 ret <8 x i8> %shuffle.i
1201 define <16 x i8> @test_same_vuzp2q_u8(<16 x i8> %a) {
1202 ; CHECK: test_same_vuzp2q_u8:
1203 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1205 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1206 ret <16 x i8> %shuffle.i
1209 define <4 x i16> @test_same_vuzp2_u16(<4 x i16> %a) {
1210 ; CHECK: test_same_vuzp2_u16:
1211 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1213 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1214 ret <4 x i16> %shuffle.i
1217 define <8 x i16> @test_same_vuzp2q_u16(<8 x i16> %a) {
1218 ; CHECK: test_same_vuzp2q_u16:
1219 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1221 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1222 ret <8 x i16> %shuffle.i
1225 define <4 x i32> @test_same_vuzp2q_u32(<4 x i32> %a) {
1226 ; CHECK: test_same_vuzp2q_u32:
1227 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1229 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1230 ret <4 x i32> %shuffle.i
1233 define <4 x float> @test_same_vuzp2q_f32(<4 x float> %a) {
1234 ; CHECK: test_same_vuzp2q_f32:
1235 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1237 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1238 ret <4 x float> %shuffle.i
1241 define <8 x i8> @test_same_vuzp2_p8(<8 x i8> %a) {
1242 ; CHECK: test_same_vuzp2_p8:
1243 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1245 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1246 ret <8 x i8> %shuffle.i
1249 define <16 x i8> @test_same_vuzp2q_p8(<16 x i8> %a) {
1250 ; CHECK: test_same_vuzp2q_p8:
1251 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1253 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1254 ret <16 x i8> %shuffle.i
1257 define <4 x i16> @test_same_vuzp2_p16(<4 x i16> %a) {
1258 ; CHECK: test_same_vuzp2_p16:
1259 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1261 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1262 ret <4 x i16> %shuffle.i
1265 define <8 x i16> @test_same_vuzp2q_p16(<8 x i16> %a) {
1266 ; CHECK: test_same_vuzp2q_p16:
1267 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1269 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1270 ret <8 x i16> %shuffle.i
1273 define <8 x i8> @test_same_vzip1_s8(<8 x i8> %a) {
1274 ; CHECK: test_same_vzip1_s8:
1275 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1277 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1278 ret <8 x i8> %shuffle.i
1281 define <16 x i8> @test_same_vzip1q_s8(<16 x i8> %a) {
1282 ; CHECK: test_same_vzip1q_s8:
1283 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1285 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1286 ret <16 x i8> %shuffle.i
1289 define <4 x i16> @test_same_vzip1_s16(<4 x i16> %a) {
1290 ; CHECK: test_same_vzip1_s16:
1291 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1293 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1294 ret <4 x i16> %shuffle.i
1297 define <8 x i16> @test_same_vzip1q_s16(<8 x i16> %a) {
1298 ; CHECK: test_same_vzip1q_s16:
1299 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1301 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1302 ret <8 x i16> %shuffle.i
1305 define <4 x i32> @test_same_vzip1q_s32(<4 x i32> %a) {
1306 ; CHECK: test_same_vzip1q_s32:
1307 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1309 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1310 ret <4 x i32> %shuffle.i
1313 define <8 x i8> @test_same_vzip1_u8(<8 x i8> %a) {
1314 ; CHECK: test_same_vzip1_u8:
1315 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1317 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1318 ret <8 x i8> %shuffle.i
1321 define <16 x i8> @test_same_vzip1q_u8(<16 x i8> %a) {
1322 ; CHECK: test_same_vzip1q_u8:
1323 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1325 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1326 ret <16 x i8> %shuffle.i
1329 define <4 x i16> @test_same_vzip1_u16(<4 x i16> %a) {
1330 ; CHECK: test_same_vzip1_u16:
1331 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1333 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1334 ret <4 x i16> %shuffle.i
1337 define <8 x i16> @test_same_vzip1q_u16(<8 x i16> %a) {
1338 ; CHECK: test_same_vzip1q_u16:
1339 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1341 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1342 ret <8 x i16> %shuffle.i
1345 define <4 x i32> @test_same_vzip1q_u32(<4 x i32> %a) {
1346 ; CHECK: test_same_vzip1q_u32:
1347 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1349 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1350 ret <4 x i32> %shuffle.i
1353 define <4 x float> @test_same_vzip1q_f32(<4 x float> %a) {
1354 ; CHECK: test_same_vzip1q_f32:
1355 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1357 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1358 ret <4 x float> %shuffle.i
1361 define <8 x i8> @test_same_vzip1_p8(<8 x i8> %a) {
1362 ; CHECK: test_same_vzip1_p8:
1363 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1365 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1366 ret <8 x i8> %shuffle.i
1369 define <16 x i8> @test_same_vzip1q_p8(<16 x i8> %a) {
1370 ; CHECK: test_same_vzip1q_p8:
1371 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1373 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1374 ret <16 x i8> %shuffle.i
1377 define <4 x i16> @test_same_vzip1_p16(<4 x i16> %a) {
1378 ; CHECK: test_same_vzip1_p16:
1379 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1381 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1382 ret <4 x i16> %shuffle.i
1385 define <8 x i16> @test_same_vzip1q_p16(<8 x i16> %a) {
1386 ; CHECK: test_same_vzip1q_p16:
1387 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1389 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1390 ret <8 x i16> %shuffle.i
1393 define <8 x i8> @test_same_vzip2_s8(<8 x i8> %a) {
1394 ; CHECK: test_same_vzip2_s8:
1395 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1397 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1398 ret <8 x i8> %shuffle.i
1401 define <16 x i8> @test_same_vzip2q_s8(<16 x i8> %a) {
1402 ; CHECK: test_same_vzip2q_s8:
1403 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1405 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1406 ret <16 x i8> %shuffle.i
1409 define <4 x i16> @test_same_vzip2_s16(<4 x i16> %a) {
1410 ; CHECK: test_same_vzip2_s16:
1411 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1413 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1414 ret <4 x i16> %shuffle.i
1417 define <8 x i16> @test_same_vzip2q_s16(<8 x i16> %a) {
1418 ; CHECK: test_same_vzip2q_s16:
1419 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1421 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1422 ret <8 x i16> %shuffle.i
1425 define <4 x i32> @test_same_vzip2q_s32(<4 x i32> %a) {
1426 ; CHECK: test_same_vzip2q_s32:
1427 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1429 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1430 ret <4 x i32> %shuffle.i
1433 define <8 x i8> @test_same_vzip2_u8(<8 x i8> %a) {
1434 ; CHECK: test_same_vzip2_u8:
1435 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1437 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1438 ret <8 x i8> %shuffle.i
1441 define <16 x i8> @test_same_vzip2q_u8(<16 x i8> %a) {
1442 ; CHECK: test_same_vzip2q_u8:
1443 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1445 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1446 ret <16 x i8> %shuffle.i
1449 define <4 x i16> @test_same_vzip2_u16(<4 x i16> %a) {
1450 ; CHECK: test_same_vzip2_u16:
1451 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1453 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1454 ret <4 x i16> %shuffle.i
1457 define <8 x i16> @test_same_vzip2q_u16(<8 x i16> %a) {
1458 ; CHECK: test_same_vzip2q_u16:
1459 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1461 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1462 ret <8 x i16> %shuffle.i
1465 define <4 x i32> @test_same_vzip2q_u32(<4 x i32> %a) {
1466 ; CHECK: test_same_vzip2q_u32:
1467 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1469 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1470 ret <4 x i32> %shuffle.i
1473 define <4 x float> @test_same_vzip2q_f32(<4 x float> %a) {
1474 ; CHECK: test_same_vzip2q_f32:
1475 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1477 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1478 ret <4 x float> %shuffle.i
1481 define <8 x i8> @test_same_vzip2_p8(<8 x i8> %a) {
1482 ; CHECK: test_same_vzip2_p8:
1483 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1485 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1486 ret <8 x i8> %shuffle.i
1489 define <16 x i8> @test_same_vzip2q_p8(<16 x i8> %a) {
1490 ; CHECK: test_same_vzip2q_p8:
1491 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1493 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1494 ret <16 x i8> %shuffle.i
1497 define <4 x i16> @test_same_vzip2_p16(<4 x i16> %a) {
1498 ; CHECK: test_same_vzip2_p16:
1499 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1501 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1502 ret <4 x i16> %shuffle.i
1505 define <8 x i16> @test_same_vzip2q_p16(<8 x i16> %a) {
1506 ; CHECK: test_same_vzip2q_p16:
1507 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1509 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1510 ret <8 x i16> %shuffle.i
1513 define <8 x i8> @test_same_vtrn1_s8(<8 x i8> %a) {
1514 ; CHECK: test_same_vtrn1_s8:
1515 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1517 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1518 ret <8 x i8> %shuffle.i
1521 define <16 x i8> @test_same_vtrn1q_s8(<16 x i8> %a) {
1522 ; CHECK: test_same_vtrn1q_s8:
1523 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1525 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1526 ret <16 x i8> %shuffle.i
1529 define <4 x i16> @test_same_vtrn1_s16(<4 x i16> %a) {
1530 ; CHECK: test_same_vtrn1_s16:
1531 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1533 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1534 ret <4 x i16> %shuffle.i
1537 define <8 x i16> @test_same_vtrn1q_s16(<8 x i16> %a) {
1538 ; CHECK: test_same_vtrn1q_s16:
1539 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1541 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1542 ret <8 x i16> %shuffle.i
1545 define <4 x i32> @test_same_vtrn1q_s32(<4 x i32> %a) {
1546 ; CHECK: test_same_vtrn1q_s32:
1547 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1549 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1550 ret <4 x i32> %shuffle.i
1553 define <8 x i8> @test_same_vtrn1_u8(<8 x i8> %a) {
1554 ; CHECK: test_same_vtrn1_u8:
1555 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1557 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1558 ret <8 x i8> %shuffle.i
1561 define <16 x i8> @test_same_vtrn1q_u8(<16 x i8> %a) {
1562 ; CHECK: test_same_vtrn1q_u8:
1563 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1565 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1566 ret <16 x i8> %shuffle.i
1569 define <4 x i16> @test_same_vtrn1_u16(<4 x i16> %a) {
1570 ; CHECK: test_same_vtrn1_u16:
1571 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1573 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1574 ret <4 x i16> %shuffle.i
1577 define <8 x i16> @test_same_vtrn1q_u16(<8 x i16> %a) {
1578 ; CHECK: test_same_vtrn1q_u16:
1579 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1581 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1582 ret <8 x i16> %shuffle.i
1585 define <4 x i32> @test_same_vtrn1q_u32(<4 x i32> %a) {
1586 ; CHECK: test_same_vtrn1q_u32:
1587 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1589 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1590 ret <4 x i32> %shuffle.i
1593 define <4 x float> @test_same_vtrn1q_f32(<4 x float> %a) {
1594 ; CHECK: test_same_vtrn1q_f32:
1595 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1597 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1598 ret <4 x float> %shuffle.i
1601 define <8 x i8> @test_same_vtrn1_p8(<8 x i8> %a) {
1602 ; CHECK: test_same_vtrn1_p8:
1603 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1605 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1606 ret <8 x i8> %shuffle.i
1609 define <16 x i8> @test_same_vtrn1q_p8(<16 x i8> %a) {
1610 ; CHECK: test_same_vtrn1q_p8:
1611 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1613 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1614 ret <16 x i8> %shuffle.i
1617 define <4 x i16> @test_same_vtrn1_p16(<4 x i16> %a) {
1618 ; CHECK: test_same_vtrn1_p16:
1619 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1621 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1622 ret <4 x i16> %shuffle.i
1625 define <8 x i16> @test_same_vtrn1q_p16(<8 x i16> %a) {
1626 ; CHECK: test_same_vtrn1q_p16:
1627 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1629 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1630 ret <8 x i16> %shuffle.i
1633 define <8 x i8> @test_same_vtrn2_s8(<8 x i8> %a) {
1634 ; CHECK: test_same_vtrn2_s8:
1635 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1637 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1638 ret <8 x i8> %shuffle.i
1641 define <16 x i8> @test_same_vtrn2q_s8(<16 x i8> %a) {
1642 ; CHECK: test_same_vtrn2q_s8:
1643 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1645 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1646 ret <16 x i8> %shuffle.i
1649 define <4 x i16> @test_same_vtrn2_s16(<4 x i16> %a) {
1650 ; CHECK: test_same_vtrn2_s16:
1651 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1653 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1654 ret <4 x i16> %shuffle.i
1657 define <8 x i16> @test_same_vtrn2q_s16(<8 x i16> %a) {
1658 ; CHECK: test_same_vtrn2q_s16:
1659 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1661 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1662 ret <8 x i16> %shuffle.i
1665 define <4 x i32> @test_same_vtrn2q_s32(<4 x i32> %a) {
1666 ; CHECK: test_same_vtrn2q_s32:
1667 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1669 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1670 ret <4 x i32> %shuffle.i
1673 define <8 x i8> @test_same_vtrn2_u8(<8 x i8> %a) {
1674 ; CHECK: test_same_vtrn2_u8:
1675 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1677 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1678 ret <8 x i8> %shuffle.i
1681 define <16 x i8> @test_same_vtrn2q_u8(<16 x i8> %a) {
1682 ; CHECK: test_same_vtrn2q_u8:
1683 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1685 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1686 ret <16 x i8> %shuffle.i
1689 define <4 x i16> @test_same_vtrn2_u16(<4 x i16> %a) {
1690 ; CHECK: test_same_vtrn2_u16:
1691 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1693 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1694 ret <4 x i16> %shuffle.i
1697 define <8 x i16> @test_same_vtrn2q_u16(<8 x i16> %a) {
1698 ; CHECK: test_same_vtrn2q_u16:
1699 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1701 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1702 ret <8 x i16> %shuffle.i
1705 define <4 x i32> @test_same_vtrn2q_u32(<4 x i32> %a) {
1706 ; CHECK: test_same_vtrn2q_u32:
1707 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1709 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1710 ret <4 x i32> %shuffle.i
1713 define <4 x float> @test_same_vtrn2q_f32(<4 x float> %a) {
1714 ; CHECK: test_same_vtrn2q_f32:
1715 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1717 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1718 ret <4 x float> %shuffle.i
1721 define <8 x i8> @test_same_vtrn2_p8(<8 x i8> %a) {
1722 ; CHECK: test_same_vtrn2_p8:
1723 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1725 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1726 ret <8 x i8> %shuffle.i
1729 define <16 x i8> @test_same_vtrn2q_p8(<16 x i8> %a) {
1730 ; CHECK: test_same_vtrn2q_p8:
1731 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1733 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1734 ret <16 x i8> %shuffle.i
1737 define <4 x i16> @test_same_vtrn2_p16(<4 x i16> %a) {
1738 ; CHECK: test_same_vtrn2_p16:
1739 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1741 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1742 ret <4 x i16> %shuffle.i
1745 define <8 x i16> @test_same_vtrn2q_p16(<8 x i16> %a) {
1746 ; CHECK: test_same_vtrn2q_p16:
1747 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1749 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1750 ret <8 x i16> %shuffle.i
1754 define <8 x i8> @test_undef_vuzp1_s8(<8 x i8> %a) {
1755 ; CHECK: test_undef_vuzp1_s8:
1756 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1758 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1759 ret <8 x i8> %shuffle.i
1762 define <16 x i8> @test_undef_vuzp1q_s8(<16 x i8> %a) {
1763 ; CHECK: test_undef_vuzp1q_s8:
1764 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1766 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1767 ret <16 x i8> %shuffle.i
1770 define <4 x i16> @test_undef_vuzp1_s16(<4 x i16> %a) {
1771 ; CHECK: test_undef_vuzp1_s16:
1772 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1774 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1775 ret <4 x i16> %shuffle.i
1778 define <8 x i16> @test_undef_vuzp1q_s16(<8 x i16> %a) {
1779 ; CHECK: test_undef_vuzp1q_s16:
1780 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1782 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1783 ret <8 x i16> %shuffle.i
1786 define <4 x i32> @test_undef_vuzp1q_s32(<4 x i32> %a) {
1787 ; CHECK: test_undef_vuzp1q_s32:
1788 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1790 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1791 ret <4 x i32> %shuffle.i
1794 define <8 x i8> @test_undef_vuzp1_u8(<8 x i8> %a) {
1795 ; CHECK: test_undef_vuzp1_u8:
1796 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1798 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1799 ret <8 x i8> %shuffle.i
1802 define <16 x i8> @test_undef_vuzp1q_u8(<16 x i8> %a) {
1803 ; CHECK: test_undef_vuzp1q_u8:
1804 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1806 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1807 ret <16 x i8> %shuffle.i
1810 define <4 x i16> @test_undef_vuzp1_u16(<4 x i16> %a) {
1811 ; CHECK: test_undef_vuzp1_u16:
1812 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1814 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1815 ret <4 x i16> %shuffle.i
1818 define <8 x i16> @test_undef_vuzp1q_u16(<8 x i16> %a) {
1819 ; CHECK: test_undef_vuzp1q_u16:
1820 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1822 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1823 ret <8 x i16> %shuffle.i
1826 define <4 x i32> @test_undef_vuzp1q_u32(<4 x i32> %a) {
1827 ; CHECK: test_undef_vuzp1q_u32:
1828 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1830 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1831 ret <4 x i32> %shuffle.i
1834 define <4 x float> @test_undef_vuzp1q_f32(<4 x float> %a) {
1835 ; CHECK: test_undef_vuzp1q_f32:
1836 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1838 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1839 ret <4 x float> %shuffle.i
1842 define <8 x i8> @test_undef_vuzp1_p8(<8 x i8> %a) {
1843 ; CHECK: test_undef_vuzp1_p8:
1844 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1846 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1847 ret <8 x i8> %shuffle.i
1850 define <16 x i8> @test_undef_vuzp1q_p8(<16 x i8> %a) {
1851 ; CHECK: test_undef_vuzp1q_p8:
1852 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1854 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1855 ret <16 x i8> %shuffle.i
1858 define <4 x i16> @test_undef_vuzp1_p16(<4 x i16> %a) {
1859 ; CHECK: test_undef_vuzp1_p16:
1860 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1862 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1863 ret <4 x i16> %shuffle.i
1866 define <8 x i16> @test_undef_vuzp1q_p16(<8 x i16> %a) {
1867 ; CHECK: test_undef_vuzp1q_p16:
1868 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1870 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1871 ret <8 x i16> %shuffle.i
1874 define <8 x i8> @test_undef_vuzp2_s8(<8 x i8> %a) {
1875 ; CHECK: test_undef_vuzp2_s8:
1876 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1878 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1879 ret <8 x i8> %shuffle.i
1882 define <16 x i8> @test_undef_vuzp2q_s8(<16 x i8> %a) {
1883 ; CHECK: test_undef_vuzp2q_s8:
1884 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1886 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1887 ret <16 x i8> %shuffle.i
1890 define <4 x i16> @test_undef_vuzp2_s16(<4 x i16> %a) {
1891 ; CHECK: test_undef_vuzp2_s16:
1892 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1894 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1895 ret <4 x i16> %shuffle.i
1898 define <8 x i16> @test_undef_vuzp2q_s16(<8 x i16> %a) {
1899 ; CHECK: test_undef_vuzp2q_s16:
1900 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1902 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1903 ret <8 x i16> %shuffle.i
1906 define <4 x i32> @test_undef_vuzp2q_s32(<4 x i32> %a) {
1907 ; CHECK: test_undef_vuzp2q_s32:
1908 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1910 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1911 ret <4 x i32> %shuffle.i
1914 define <8 x i8> @test_undef_vuzp2_u8(<8 x i8> %a) {
1915 ; CHECK: test_undef_vuzp2_u8:
1916 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1918 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1919 ret <8 x i8> %shuffle.i
1922 define <16 x i8> @test_undef_vuzp2q_u8(<16 x i8> %a) {
1923 ; CHECK: test_undef_vuzp2q_u8:
1924 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1926 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1927 ret <16 x i8> %shuffle.i
1930 define <4 x i16> @test_undef_vuzp2_u16(<4 x i16> %a) {
1931 ; CHECK: test_undef_vuzp2_u16:
1932 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1934 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1935 ret <4 x i16> %shuffle.i
1938 define <8 x i16> @test_undef_vuzp2q_u16(<8 x i16> %a) {
1939 ; CHECK: test_undef_vuzp2q_u16:
1940 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1942 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1943 ret <8 x i16> %shuffle.i
1946 define <4 x i32> @test_undef_vuzp2q_u32(<4 x i32> %a) {
1947 ; CHECK: test_undef_vuzp2q_u32:
1948 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1950 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1951 ret <4 x i32> %shuffle.i
1954 define <4 x float> @test_undef_vuzp2q_f32(<4 x float> %a) {
1955 ; CHECK: test_undef_vuzp2q_f32:
1956 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1958 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1959 ret <4 x float> %shuffle.i
1962 define <8 x i8> @test_undef_vuzp2_p8(<8 x i8> %a) {
1963 ; CHECK: test_undef_vuzp2_p8:
1964 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1966 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1967 ret <8 x i8> %shuffle.i
1970 define <16 x i8> @test_undef_vuzp2q_p8(<16 x i8> %a) {
1971 ; CHECK: test_undef_vuzp2q_p8:
1972 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1974 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1975 ret <16 x i8> %shuffle.i
1978 define <4 x i16> @test_undef_vuzp2_p16(<4 x i16> %a) {
1979 ; CHECK: test_undef_vuzp2_p16:
1980 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1982 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1983 ret <4 x i16> %shuffle.i
1986 define <8 x i16> @test_undef_vuzp2q_p16(<8 x i16> %a) {
1987 ; CHECK: test_undef_vuzp2q_p16:
1988 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1990 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1991 ret <8 x i16> %shuffle.i
1994 define <8 x i8> @test_undef_vzip1_s8(<8 x i8> %a) {
1995 ; CHECK: test_undef_vzip1_s8:
1996 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1998 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1999 ret <8 x i8> %shuffle.i
2002 define <16 x i8> @test_undef_vzip1q_s8(<16 x i8> %a) {
2003 ; CHECK: test_undef_vzip1q_s8:
2004 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2006 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2007 ret <16 x i8> %shuffle.i
2010 define <4 x i16> @test_undef_vzip1_s16(<4 x i16> %a) {
2011 ; CHECK: test_undef_vzip1_s16:
2012 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2014 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2015 ret <4 x i16> %shuffle.i
2018 define <8 x i16> @test_undef_vzip1q_s16(<8 x i16> %a) {
2019 ; CHECK: test_undef_vzip1q_s16:
2020 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2022 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2023 ret <8 x i16> %shuffle.i
2026 define <4 x i32> @test_undef_vzip1q_s32(<4 x i32> %a) {
2027 ; CHECK: test_undef_vzip1q_s32:
2028 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2030 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2031 ret <4 x i32> %shuffle.i
2034 define <8 x i8> @test_undef_vzip1_u8(<8 x i8> %a) {
2035 ; CHECK: test_undef_vzip1_u8:
2036 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2038 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2039 ret <8 x i8> %shuffle.i
2042 define <16 x i8> @test_undef_vzip1q_u8(<16 x i8> %a) {
2043 ; CHECK: test_undef_vzip1q_u8:
2044 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2046 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2047 ret <16 x i8> %shuffle.i
2050 define <4 x i16> @test_undef_vzip1_u16(<4 x i16> %a) {
2051 ; CHECK: test_undef_vzip1_u16:
2052 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2054 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2055 ret <4 x i16> %shuffle.i
2058 define <8 x i16> @test_undef_vzip1q_u16(<8 x i16> %a) {
2059 ; CHECK: test_undef_vzip1q_u16:
2060 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2062 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2063 ret <8 x i16> %shuffle.i
2066 define <4 x i32> @test_undef_vzip1q_u32(<4 x i32> %a) {
2067 ; CHECK: test_undef_vzip1q_u32:
2068 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2070 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2071 ret <4 x i32> %shuffle.i
2074 define <4 x float> @test_undef_vzip1q_f32(<4 x float> %a) {
2075 ; CHECK: test_undef_vzip1q_f32:
2076 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2078 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2079 ret <4 x float> %shuffle.i
2082 define <8 x i8> @test_undef_vzip1_p8(<8 x i8> %a) {
2083 ; CHECK: test_undef_vzip1_p8:
2084 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2086 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2087 ret <8 x i8> %shuffle.i
2090 define <16 x i8> @test_undef_vzip1q_p8(<16 x i8> %a) {
2091 ; CHECK: test_undef_vzip1q_p8:
2092 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2094 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2095 ret <16 x i8> %shuffle.i
2098 define <4 x i16> @test_undef_vzip1_p16(<4 x i16> %a) {
2099 ; CHECK: test_undef_vzip1_p16:
2100 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2102 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2103 ret <4 x i16> %shuffle.i
2106 define <8 x i16> @test_undef_vzip1q_p16(<8 x i16> %a) {
2107 ; CHECK: test_undef_vzip1q_p16:
2108 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2110 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2111 ret <8 x i16> %shuffle.i
2114 define <8 x i8> @test_undef_vzip2_s8(<8 x i8> %a) {
2115 ; CHECK: test_undef_vzip2_s8:
2116 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2118 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2119 ret <8 x i8> %shuffle.i
2122 define <16 x i8> @test_undef_vzip2q_s8(<16 x i8> %a) {
2123 ; CHECK: test_undef_vzip2q_s8:
2124 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2126 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2127 ret <16 x i8> %shuffle.i
2130 define <4 x i16> @test_undef_vzip2_s16(<4 x i16> %a) {
2131 ; CHECK: test_undef_vzip2_s16:
2132 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2134 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2135 ret <4 x i16> %shuffle.i
2138 define <8 x i16> @test_undef_vzip2q_s16(<8 x i16> %a) {
2139 ; CHECK: test_undef_vzip2q_s16:
2140 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2142 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2143 ret <8 x i16> %shuffle.i
2146 define <4 x i32> @test_undef_vzip2q_s32(<4 x i32> %a) {
2147 ; CHECK: test_undef_vzip2q_s32:
2148 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2150 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2151 ret <4 x i32> %shuffle.i
2154 define <8 x i8> @test_undef_vzip2_u8(<8 x i8> %a) {
2155 ; CHECK: test_undef_vzip2_u8:
2156 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2158 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2159 ret <8 x i8> %shuffle.i
2162 define <16 x i8> @test_undef_vzip2q_u8(<16 x i8> %a) {
2163 ; CHECK: test_undef_vzip2q_u8:
2164 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2166 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2167 ret <16 x i8> %shuffle.i
2170 define <4 x i16> @test_undef_vzip2_u16(<4 x i16> %a) {
2171 ; CHECK: test_undef_vzip2_u16:
2172 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2174 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2175 ret <4 x i16> %shuffle.i
2178 define <8 x i16> @test_undef_vzip2q_u16(<8 x i16> %a) {
2179 ; CHECK: test_undef_vzip2q_u16:
2180 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2182 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2183 ret <8 x i16> %shuffle.i
2186 define <4 x i32> @test_undef_vzip2q_u32(<4 x i32> %a) {
2187 ; CHECK: test_undef_vzip2q_u32:
2188 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2190 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2191 ret <4 x i32> %shuffle.i
2194 define <4 x float> @test_undef_vzip2q_f32(<4 x float> %a) {
2195 ; CHECK: test_undef_vzip2q_f32:
2196 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2198 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2199 ret <4 x float> %shuffle.i
2202 define <8 x i8> @test_undef_vzip2_p8(<8 x i8> %a) {
2203 ; CHECK: test_undef_vzip2_p8:
2204 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2206 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2207 ret <8 x i8> %shuffle.i
2210 define <16 x i8> @test_undef_vzip2q_p8(<16 x i8> %a) {
2211 ; CHECK: test_undef_vzip2q_p8:
2212 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2214 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2215 ret <16 x i8> %shuffle.i
2218 define <4 x i16> @test_undef_vzip2_p16(<4 x i16> %a) {
2219 ; CHECK: test_undef_vzip2_p16:
2220 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2222 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2223 ret <4 x i16> %shuffle.i
2226 define <8 x i16> @test_undef_vzip2q_p16(<8 x i16> %a) {
2227 ; CHECK: test_undef_vzip2q_p16:
2228 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2230 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2231 ret <8 x i16> %shuffle.i
2234 define <8 x i8> @test_undef_vtrn1_s8(<8 x i8> %a) {
2235 ; CHECK: test_undef_vtrn1_s8:
2238 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2239 ret <8 x i8> %shuffle.i
2242 define <16 x i8> @test_undef_vtrn1q_s8(<16 x i8> %a) {
2243 ; CHECK: test_undef_vtrn1q_s8:
2246 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2247 ret <16 x i8> %shuffle.i
2250 define <4 x i16> @test_undef_vtrn1_s16(<4 x i16> %a) {
2251 ; CHECK: test_undef_vtrn1_s16:
2254 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2255 ret <4 x i16> %shuffle.i
2258 define <8 x i16> @test_undef_vtrn1q_s16(<8 x i16> %a) {
2259 ; CHECK: test_undef_vtrn1q_s16:
2262 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2263 ret <8 x i16> %shuffle.i
2266 define <4 x i32> @test_undef_vtrn1q_s32(<4 x i32> %a) {
2267 ; CHECK: test_undef_vtrn1q_s32:
2270 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2271 ret <4 x i32> %shuffle.i
2274 define <8 x i8> @test_undef_vtrn1_u8(<8 x i8> %a) {
2275 ; CHECK: test_undef_vtrn1_u8:
2278 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2279 ret <8 x i8> %shuffle.i
2282 define <16 x i8> @test_undef_vtrn1q_u8(<16 x i8> %a) {
2283 ; CHECK: test_undef_vtrn1q_u8:
2286 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2287 ret <16 x i8> %shuffle.i
2290 define <4 x i16> @test_undef_vtrn1_u16(<4 x i16> %a) {
2291 ; CHECK: test_undef_vtrn1_u16:
2294 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2295 ret <4 x i16> %shuffle.i
2298 define <8 x i16> @test_undef_vtrn1q_u16(<8 x i16> %a) {
2299 ; CHECK: test_undef_vtrn1q_u16:
2302 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2303 ret <8 x i16> %shuffle.i
2306 define <4 x i32> @test_undef_vtrn1q_u32(<4 x i32> %a) {
2307 ; CHECK: test_undef_vtrn1q_u32:
2310 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2311 ret <4 x i32> %shuffle.i
2314 define <4 x float> @test_undef_vtrn1q_f32(<4 x float> %a) {
2315 ; CHECK: test_undef_vtrn1q_f32:
2318 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2319 ret <4 x float> %shuffle.i
2322 define <8 x i8> @test_undef_vtrn1_p8(<8 x i8> %a) {
2323 ; CHECK: test_undef_vtrn1_p8:
2326 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2327 ret <8 x i8> %shuffle.i
2330 define <16 x i8> @test_undef_vtrn1q_p8(<16 x i8> %a) {
2331 ; CHECK: test_undef_vtrn1q_p8:
2334 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2335 ret <16 x i8> %shuffle.i
2338 define <4 x i16> @test_undef_vtrn1_p16(<4 x i16> %a) {
2339 ; CHECK: test_undef_vtrn1_p16:
2342 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2343 ret <4 x i16> %shuffle.i
2346 define <8 x i16> @test_undef_vtrn1q_p16(<8 x i16> %a) {
2347 ; CHECK: test_undef_vtrn1q_p16:
2350 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2351 ret <8 x i16> %shuffle.i
2354 define <8 x i8> @test_undef_vtrn2_s8(<8 x i8> %a) {
2355 ; CHECK: test_undef_vtrn2_s8:
2356 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2358 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2359 ret <8 x i8> %shuffle.i
2362 define <16 x i8> @test_undef_vtrn2q_s8(<16 x i8> %a) {
2363 ; CHECK: test_undef_vtrn2q_s8:
2364 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2366 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2367 ret <16 x i8> %shuffle.i
2370 define <4 x i16> @test_undef_vtrn2_s16(<4 x i16> %a) {
2371 ; CHECK: test_undef_vtrn2_s16:
2372 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2374 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2375 ret <4 x i16> %shuffle.i
2378 define <8 x i16> @test_undef_vtrn2q_s16(<8 x i16> %a) {
2379 ; CHECK: test_undef_vtrn2q_s16:
2380 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2382 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2383 ret <8 x i16> %shuffle.i
2386 define <4 x i32> @test_undef_vtrn2q_s32(<4 x i32> %a) {
2387 ; CHECK: test_undef_vtrn2q_s32:
2388 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2390 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2391 ret <4 x i32> %shuffle.i
2394 define <8 x i8> @test_undef_vtrn2_u8(<8 x i8> %a) {
2395 ; CHECK: test_undef_vtrn2_u8:
2396 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2398 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2399 ret <8 x i8> %shuffle.i
2402 define <16 x i8> @test_undef_vtrn2q_u8(<16 x i8> %a) {
2403 ; CHECK: test_undef_vtrn2q_u8:
2404 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2406 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2407 ret <16 x i8> %shuffle.i
2410 define <4 x i16> @test_undef_vtrn2_u16(<4 x i16> %a) {
2411 ; CHECK: test_undef_vtrn2_u16:
2412 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2414 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2415 ret <4 x i16> %shuffle.i
2418 define <8 x i16> @test_undef_vtrn2q_u16(<8 x i16> %a) {
2419 ; CHECK: test_undef_vtrn2q_u16:
2420 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2422 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2423 ret <8 x i16> %shuffle.i
2426 define <4 x i32> @test_undef_vtrn2q_u32(<4 x i32> %a) {
2427 ; CHECK: test_undef_vtrn2q_u32:
2428 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2430 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2431 ret <4 x i32> %shuffle.i
2434 define <4 x float> @test_undef_vtrn2q_f32(<4 x float> %a) {
2435 ; CHECK: test_undef_vtrn2q_f32:
2436 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2438 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2439 ret <4 x float> %shuffle.i
2442 define <8 x i8> @test_undef_vtrn2_p8(<8 x i8> %a) {
2443 ; CHECK: test_undef_vtrn2_p8:
2444 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2446 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2447 ret <8 x i8> %shuffle.i
2450 define <16 x i8> @test_undef_vtrn2q_p8(<16 x i8> %a) {
2451 ; CHECK: test_undef_vtrn2q_p8:
2452 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2454 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2455 ret <16 x i8> %shuffle.i
2458 define <4 x i16> @test_undef_vtrn2_p16(<4 x i16> %a) {
2459 ; CHECK: test_undef_vtrn2_p16:
2460 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2462 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2463 ret <4 x i16> %shuffle.i
2466 define <8 x i16> @test_undef_vtrn2q_p16(<8 x i16> %a) {
2467 ; CHECK: test_undef_vtrn2q_p16:
2468 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2470 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2471 ret <8 x i16> %shuffle.i
2474 define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) {
2475 ; CHECK: test_vuzp_s8:
2476 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2477 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2479 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2480 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2481 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2482 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
2483 ret %struct.int8x8x2_t %.fca.0.1.insert
2486 define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) {
2487 ; CHECK: test_vuzp_s16:
2488 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2489 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2491 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2492 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2493 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2494 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
2495 ret %struct.int16x4x2_t %.fca.0.1.insert
2498 define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) {
2499 ; CHECK: test_vuzp_s32:
2500 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2501 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2503 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2504 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2505 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
2506 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
2507 ret %struct.int32x2x2_t %.fca.0.1.insert
2510 define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) {
2511 ; CHECK: test_vuzp_u8:
2512 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2513 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2515 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2516 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2517 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2518 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
2519 ret %struct.uint8x8x2_t %.fca.0.1.insert
2522 define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) {
2523 ; CHECK: test_vuzp_u16:
2524 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2525 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2527 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2528 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2529 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2530 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
2531 ret %struct.uint16x4x2_t %.fca.0.1.insert
2534 define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) {
2535 ; CHECK: test_vuzp_u32:
2536 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2537 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2539 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2540 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2541 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
2542 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
2543 ret %struct.uint32x2x2_t %.fca.0.1.insert
2546 define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) {
2547 ; CHECK: test_vuzp_f32:
2548 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2549 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2551 %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
2552 %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
2553 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vuzp.i, 0, 0
2554 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vuzp1.i, 0, 1
2555 ret %struct.float32x2x2_t %.fca.0.1.insert
2558 define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) {
2559 ; CHECK: test_vuzp_p8:
2560 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2561 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2563 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2564 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2565 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2566 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
2567 ret %struct.poly8x8x2_t %.fca.0.1.insert
2570 define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) {
2571 ; CHECK: test_vuzp_p16:
2572 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2573 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2575 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2576 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2577 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2578 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
2579 ret %struct.poly16x4x2_t %.fca.0.1.insert
2582 define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) {
2583 ; CHECK: test_vuzpq_s8:
2584 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2585 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2587 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2588 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2589 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
2590 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
2591 ret %struct.int8x16x2_t %.fca.0.1.insert
2594 define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) {
2595 ; CHECK: test_vuzpq_s16:
2596 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2597 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2599 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2600 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2601 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
2602 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
2603 ret %struct.int16x8x2_t %.fca.0.1.insert
2606 define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) {
2607 ; CHECK: test_vuzpq_s32:
2608 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2609 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2611 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2612 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2613 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
2614 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
2615 ret %struct.int32x4x2_t %.fca.0.1.insert
2618 define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) {
2619 ; CHECK: test_vuzpq_u8:
2620 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2621 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2623 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2624 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2625 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
2626 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
2627 ret %struct.uint8x16x2_t %.fca.0.1.insert
2630 define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) {
2631 ; CHECK: test_vuzpq_u16:
2632 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2633 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2635 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2636 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2637 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
2638 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
2639 ret %struct.uint16x8x2_t %.fca.0.1.insert
2642 define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) {
2643 ; CHECK: test_vuzpq_u32:
2644 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2645 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2647 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2648 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2649 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
2650 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
2651 ret %struct.uint32x4x2_t %.fca.0.1.insert
2654 define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) {
2655 ; CHECK: test_vuzpq_f32:
2656 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2657 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2659 %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2660 %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2661 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vuzp.i, 0, 0
2662 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vuzp1.i, 0, 1
2663 ret %struct.float32x4x2_t %.fca.0.1.insert
2666 define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) {
2667 ; CHECK: test_vuzpq_p8:
2668 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2669 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2671 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2672 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2673 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
2674 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
2675 ret %struct.poly8x16x2_t %.fca.0.1.insert
2678 define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) {
2679 ; CHECK: test_vuzpq_p16:
2680 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2681 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2683 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2684 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2685 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
2686 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
2687 ret %struct.poly16x8x2_t %.fca.0.1.insert
2690 define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) {
2691 ; CHECK: test_vzip_s8:
2692 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2693 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2695 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2696 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2697 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
2698 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
2699 ret %struct.int8x8x2_t %.fca.0.1.insert
2702 define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) {
2703 ; CHECK: test_vzip_s16:
2704 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2705 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2707 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2708 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2709 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
2710 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
2711 ret %struct.int16x4x2_t %.fca.0.1.insert
2714 define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) {
2715 ; CHECK: test_vzip_s32:
2716 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2717 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2719 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2720 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2721 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
2722 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
2723 ret %struct.int32x2x2_t %.fca.0.1.insert
2726 define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) {
2727 ; CHECK: test_vzip_u8:
2728 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2729 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2731 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2732 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2733 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
2734 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
2735 ret %struct.uint8x8x2_t %.fca.0.1.insert
2738 define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) {
2739 ; CHECK: test_vzip_u16:
2740 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2741 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2743 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2744 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2745 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
2746 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
2747 ret %struct.uint16x4x2_t %.fca.0.1.insert
2750 define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) {
2751 ; CHECK: test_vzip_u32:
2752 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2753 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2755 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2756 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2757 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
2758 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
2759 ret %struct.uint32x2x2_t %.fca.0.1.insert
2762 define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) {
2763 ; CHECK: test_vzip_f32:
2764 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2765 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2767 %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
2768 %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
2769 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vzip.i, 0, 0
2770 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vzip1.i, 0, 1
2771 ret %struct.float32x2x2_t %.fca.0.1.insert
2774 define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) {
2775 ; CHECK: test_vzip_p8:
2776 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2777 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2779 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2780 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2781 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
2782 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
2783 ret %struct.poly8x8x2_t %.fca.0.1.insert
2786 define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) {
2787 ; CHECK: test_vzip_p16:
2788 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2789 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2791 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2792 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2793 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
2794 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
2795 ret %struct.poly16x4x2_t %.fca.0.1.insert
2798 define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) {
2799 ; CHECK: test_vzipq_s8:
2800 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2801 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2803 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2804 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2805 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
2806 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
2807 ret %struct.int8x16x2_t %.fca.0.1.insert
2810 define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) {
2811 ; CHECK: test_vzipq_s16:
2812 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2813 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2815 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2816 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2817 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
2818 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
2819 ret %struct.int16x8x2_t %.fca.0.1.insert
2822 define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) {
2823 ; CHECK: test_vzipq_s32:
2824 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2825 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2827 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2828 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2829 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
2830 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
2831 ret %struct.int32x4x2_t %.fca.0.1.insert
2834 define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) {
2835 ; CHECK: test_vzipq_u8:
2836 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2837 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2839 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2840 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2841 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
2842 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
2843 ret %struct.uint8x16x2_t %.fca.0.1.insert
2846 define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) {
2847 ; CHECK: test_vzipq_u16:
2848 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2849 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2851 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2852 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2853 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
2854 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
2855 ret %struct.uint16x8x2_t %.fca.0.1.insert
2858 define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) {
2859 ; CHECK: test_vzipq_u32:
2860 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2861 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2863 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2864 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2865 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
2866 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
2867 ret %struct.uint32x4x2_t %.fca.0.1.insert
2870 define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) {
2871 ; CHECK: test_vzipq_f32:
2872 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2873 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2875 %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2876 %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2877 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vzip.i, 0, 0
2878 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vzip1.i, 0, 1
2879 ret %struct.float32x4x2_t %.fca.0.1.insert
2882 define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) {
2883 ; CHECK: test_vzipq_p8:
2884 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2885 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2887 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2888 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2889 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
2890 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
2891 ret %struct.poly8x16x2_t %.fca.0.1.insert
2894 define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) {
2895 ; CHECK: test_vzipq_p16:
2896 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2897 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2899 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2900 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2901 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
2902 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
2903 ret %struct.poly16x8x2_t %.fca.0.1.insert
2906 define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) {
2907 ; CHECK: test_vtrn_s8:
2908 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2909 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2911 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2912 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2913 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
2914 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
2915 ret %struct.int8x8x2_t %.fca.0.1.insert
2918 define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) {
2919 ; CHECK: test_vtrn_s16:
2920 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2921 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2923 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2924 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2925 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
2926 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
2927 ret %struct.int16x4x2_t %.fca.0.1.insert
2930 define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) {
2931 ; CHECK: test_vtrn_s32:
2932 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2933 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2935 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2936 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2937 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
2938 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
2939 ret %struct.int32x2x2_t %.fca.0.1.insert
2942 define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) {
2943 ; CHECK: test_vtrn_u8:
2944 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2945 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2947 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2948 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2949 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
2950 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
2951 ret %struct.uint8x8x2_t %.fca.0.1.insert
2954 define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) {
2955 ; CHECK: test_vtrn_u16:
2956 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2957 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2959 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2960 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2961 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
2962 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
2963 ret %struct.uint16x4x2_t %.fca.0.1.insert
2966 define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) {
2967 ; CHECK: test_vtrn_u32:
2968 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2969 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2971 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2972 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2973 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
2974 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
2975 ret %struct.uint32x2x2_t %.fca.0.1.insert
2978 define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) {
2979 ; CHECK: test_vtrn_f32:
2980 ; CHECK: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2981 ; CHECK: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2983 %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
2984 %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
2985 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vtrn.i, 0, 0
2986 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vtrn1.i, 0, 1
2987 ret %struct.float32x2x2_t %.fca.0.1.insert
2990 define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) {
2991 ; CHECK: test_vtrn_p8:
2992 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2993 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2995 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2996 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2997 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
2998 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
2999 ret %struct.poly8x8x2_t %.fca.0.1.insert
3002 define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) {
3003 ; CHECK: test_vtrn_p16:
3004 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
3005 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
3007 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3008 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3009 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
3010 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
3011 ret %struct.poly16x4x2_t %.fca.0.1.insert
3014 define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) {
3015 ; CHECK: test_vtrnq_s8:
3016 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3017 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3019 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3020 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3021 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3022 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3023 ret %struct.int8x16x2_t %.fca.0.1.insert
3026 define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) {
3027 ; CHECK: test_vtrnq_s16:
3028 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3029 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3031 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3032 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3033 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3034 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3035 ret %struct.int16x8x2_t %.fca.0.1.insert
3038 define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) {
3039 ; CHECK: test_vtrnq_s32:
3040 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3041 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3043 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3044 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3045 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
3046 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
3047 ret %struct.int32x4x2_t %.fca.0.1.insert
3050 define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) {
3051 ; CHECK: test_vtrnq_u8:
3052 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3053 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3055 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3056 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3057 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3058 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3059 ret %struct.uint8x16x2_t %.fca.0.1.insert
3062 define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) {
3063 ; CHECK: test_vtrnq_u16:
3064 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3065 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3067 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3068 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3069 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3070 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3071 ret %struct.uint16x8x2_t %.fca.0.1.insert
3074 define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) {
3075 ; CHECK: test_vtrnq_u32:
3076 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3077 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3079 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3080 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3081 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
3082 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
3083 ret %struct.uint32x4x2_t %.fca.0.1.insert
3086 define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) {
3087 ; CHECK: test_vtrnq_f32:
3088 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3089 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3091 %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3092 %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3093 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vtrn.i, 0, 0
3094 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vtrn1.i, 0, 1
3095 ret %struct.float32x4x2_t %.fca.0.1.insert
3098 define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) {
3099 ; CHECK: test_vtrnq_p8:
3100 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3101 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3103 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3104 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3105 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3106 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3107 ret %struct.poly8x16x2_t %.fca.0.1.insert
3110 define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) {
3111 ; CHECK: test_vtrnq_p16:
3112 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3113 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3115 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3116 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3117 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3118 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3119 ret %struct.poly16x8x2_t %.fca.0.1.insert
3122 define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) {
3125 %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3126 %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3127 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
3128 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
3129 ret %struct.uint8x8x2_t %.fca.0.1.insert
3131 ; CHECK: dup {{d[0-9]+}}, {{v[0-9]+}}.d[1]
3132 ; CHECK-NEXT: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
3133 ; CHECK-NEXT: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b