1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
2 ; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
4 %struct.int8x8x2_t = type { [2 x <8 x i8>] }
5 %struct.int16x4x2_t = type { [2 x <4 x i16>] }
6 %struct.int32x2x2_t = type { [2 x <2 x i32>] }
7 %struct.uint8x8x2_t = type { [2 x <8 x i8>] }
8 %struct.uint16x4x2_t = type { [2 x <4 x i16>] }
9 %struct.uint32x2x2_t = type { [2 x <2 x i32>] }
10 %struct.float32x2x2_t = type { [2 x <2 x float>] }
11 %struct.poly8x8x2_t = type { [2 x <8 x i8>] }
12 %struct.poly16x4x2_t = type { [2 x <4 x i16>] }
13 %struct.int8x16x2_t = type { [2 x <16 x i8>] }
14 %struct.int16x8x2_t = type { [2 x <8 x i16>] }
15 %struct.int32x4x2_t = type { [2 x <4 x i32>] }
16 %struct.uint8x16x2_t = type { [2 x <16 x i8>] }
17 %struct.uint16x8x2_t = type { [2 x <8 x i16>] }
18 %struct.uint32x4x2_t = type { [2 x <4 x i32>] }
19 %struct.float32x4x2_t = type { [2 x <4 x float>] }
20 %struct.poly8x16x2_t = type { [2 x <16 x i8>] }
21 %struct.poly16x8x2_t = type { [2 x <8 x i16>] }
23 define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) {
24 ; CHECK-LABEL: test_vuzp1_s8:
25 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
27 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
28 ret <8 x i8> %shuffle.i
31 define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) {
32 ; CHECK-LABEL: test_vuzp1q_s8:
33 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
35 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
36 ret <16 x i8> %shuffle.i
39 define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) {
40 ; CHECK-LABEL: test_vuzp1_s16:
41 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
43 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
44 ret <4 x i16> %shuffle.i
47 define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) {
48 ; CHECK-LABEL: test_vuzp1q_s16:
49 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
51 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
52 ret <8 x i16> %shuffle.i
55 define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) {
56 ; CHECK-LABEL: test_vuzp1_s32:
57 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
58 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
60 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
61 ret <2 x i32> %shuffle.i
64 define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) {
65 ; CHECK-LABEL: test_vuzp1q_s32:
66 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
68 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
69 ret <4 x i32> %shuffle.i
72 define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) {
73 ; CHECK-LABEL: test_vuzp1q_s64:
74 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
75 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
77 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
78 ret <2 x i64> %shuffle.i
81 define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) {
82 ; CHECK-LABEL: test_vuzp1_u8:
83 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
85 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
86 ret <8 x i8> %shuffle.i
89 define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) {
90 ; CHECK-LABEL: test_vuzp1q_u8:
91 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
93 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
94 ret <16 x i8> %shuffle.i
97 define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) {
98 ; CHECK-LABEL: test_vuzp1_u16:
99 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
101 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
102 ret <4 x i16> %shuffle.i
105 define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) {
106 ; CHECK-LABEL: test_vuzp1q_u16:
107 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
109 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
110 ret <8 x i16> %shuffle.i
113 define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) {
114 ; CHECK-LABEL: test_vuzp1_u32:
115 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
116 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
118 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
119 ret <2 x i32> %shuffle.i
122 define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) {
123 ; CHECK-LABEL: test_vuzp1q_u32:
124 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
126 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
127 ret <4 x i32> %shuffle.i
130 define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) {
131 ; CHECK-LABEL: test_vuzp1q_u64:
132 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
133 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
135 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
136 ret <2 x i64> %shuffle.i
139 define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) {
140 ; CHECK-LABEL: test_vuzp1_f32:
141 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
142 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
144 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
145 ret <2 x float> %shuffle.i
148 define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) {
149 ; CHECK-LABEL: test_vuzp1q_f32:
150 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
152 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
153 ret <4 x float> %shuffle.i
156 define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) {
157 ; CHECK-LABEL: test_vuzp1q_f64:
158 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
159 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
161 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
162 ret <2 x double> %shuffle.i
165 define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) {
166 ; CHECK-LABEL: test_vuzp1_p8:
167 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
169 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
170 ret <8 x i8> %shuffle.i
173 define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) {
174 ; CHECK-LABEL: test_vuzp1q_p8:
175 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
177 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
178 ret <16 x i8> %shuffle.i
181 define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) {
182 ; CHECK-LABEL: test_vuzp1_p16:
183 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
185 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
186 ret <4 x i16> %shuffle.i
189 define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) {
190 ; CHECK-LABEL: test_vuzp1q_p16:
191 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
193 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
194 ret <8 x i16> %shuffle.i
197 define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) {
198 ; CHECK-LABEL: test_vuzp2_s8:
199 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
201 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
202 ret <8 x i8> %shuffle.i
205 define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) {
206 ; CHECK-LABEL: test_vuzp2q_s8:
207 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
209 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
210 ret <16 x i8> %shuffle.i
213 define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) {
214 ; CHECK-LABEL: test_vuzp2_s16:
215 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
217 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
218 ret <4 x i16> %shuffle.i
221 define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) {
222 ; CHECK-LABEL: test_vuzp2q_s16:
223 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
225 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
226 ret <8 x i16> %shuffle.i
229 define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) {
230 ; CHECK-LABEL: test_vuzp2_s32:
231 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
232 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
234 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
235 ret <2 x i32> %shuffle.i
238 define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) {
239 ; CHECK-LABEL: test_vuzp2q_s32:
240 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
242 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
243 ret <4 x i32> %shuffle.i
246 define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) {
247 ; CHECK-LABEL: test_vuzp2q_s64:
248 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
249 ; CHECK-AARCH64-NEXT: mov {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
250 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
252 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
253 ret <2 x i64> %shuffle.i
256 define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) {
257 ; CHECK-LABEL: test_vuzp2_u8:
258 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
260 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
261 ret <8 x i8> %shuffle.i
264 define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) {
265 ; CHECK-LABEL: test_vuzp2q_u8:
266 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
268 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
269 ret <16 x i8> %shuffle.i
272 define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) {
273 ; CHECK-LABEL: test_vuzp2_u16:
274 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
276 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
277 ret <4 x i16> %shuffle.i
280 define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) {
281 ; CHECK-LABEL: test_vuzp2q_u16:
282 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
284 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
285 ret <8 x i16> %shuffle.i
288 define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) {
289 ; CHECK-LABEL: test_vuzp2_u32:
290 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
291 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
293 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
294 ret <2 x i32> %shuffle.i
297 define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) {
298 ; CHECK-LABEL: test_vuzp2q_u32:
299 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
301 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
302 ret <4 x i32> %shuffle.i
305 define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) {
306 ; CHECK-LABEL: test_vuzp2q_u64:
307 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
308 ; CHECK-AARCH64-NEXT: mov {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
309 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
311 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
312 ret <2 x i64> %shuffle.i
315 define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) {
316 ; CHECK-LABEL: test_vuzp2_f32:
317 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
318 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
320 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
321 ret <2 x float> %shuffle.i
324 define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) {
325 ; CHECK-LABEL: test_vuzp2q_f32:
326 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
328 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
329 ret <4 x float> %shuffle.i
332 define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) {
333 ; CHECK-LABEL: test_vuzp2q_f64:
334 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
335 ; CHECK-AARCH64-NEXT: mov {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
336 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
338 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
339 ret <2 x double> %shuffle.i
342 define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) {
343 ; CHECK-LABEL: test_vuzp2_p8:
344 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
346 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
347 ret <8 x i8> %shuffle.i
350 define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) {
351 ; CHECK-LABEL: test_vuzp2q_p8:
352 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
354 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
355 ret <16 x i8> %shuffle.i
358 define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) {
359 ; CHECK-LABEL: test_vuzp2_p16:
360 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
362 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
363 ret <4 x i16> %shuffle.i
366 define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) {
367 ; CHECK-LABEL: test_vuzp2q_p16:
368 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
370 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
371 ret <8 x i16> %shuffle.i
374 define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) {
375 ; CHECK-LABEL: test_vzip1_s8:
376 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
378 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
379 ret <8 x i8> %shuffle.i
382 define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) {
383 ; CHECK-LABEL: test_vzip1q_s8:
384 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
386 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
387 ret <16 x i8> %shuffle.i
390 define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) {
391 ; CHECK-LABEL: test_vzip1_s16:
392 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
394 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
395 ret <4 x i16> %shuffle.i
398 define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) {
399 ; CHECK-LABEL: test_vzip1q_s16:
400 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
402 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
403 ret <8 x i16> %shuffle.i
406 define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) {
407 ; CHECK-LABEL: test_vzip1_s32:
408 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
409 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
411 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
412 ret <2 x i32> %shuffle.i
415 define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) {
416 ; CHECK-LABEL: test_vzip1q_s32:
417 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
419 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
420 ret <4 x i32> %shuffle.i
423 define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) {
424 ; CHECK-LABEL: test_vzip1q_s64:
425 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
426 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
428 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
429 ret <2 x i64> %shuffle.i
432 define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) {
433 ; CHECK-LABEL: test_vzip1_u8:
434 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
436 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
437 ret <8 x i8> %shuffle.i
440 define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) {
441 ; CHECK-LABEL: test_vzip1q_u8:
442 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
444 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
445 ret <16 x i8> %shuffle.i
448 define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) {
449 ; CHECK-LABEL: test_vzip1_u16:
450 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
452 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
453 ret <4 x i16> %shuffle.i
456 define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) {
457 ; CHECK-LABEL: test_vzip1q_u16:
458 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
460 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
461 ret <8 x i16> %shuffle.i
464 define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) {
465 ; CHECK-LABEL: test_vzip1_u32:
466 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
467 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
469 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
470 ret <2 x i32> %shuffle.i
473 define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) {
474 ; CHECK-LABEL: test_vzip1q_u32:
475 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
477 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
478 ret <4 x i32> %shuffle.i
481 define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) {
482 ; CHECK-LABEL: test_vzip1q_u64:
483 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
484 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
486 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
487 ret <2 x i64> %shuffle.i
490 define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) {
491 ; CHECK-LABEL: test_vzip1_f32:
492 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
493 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
495 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
496 ret <2 x float> %shuffle.i
499 define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) {
500 ; CHECK-LABEL: test_vzip1q_f32:
501 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
503 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
504 ret <4 x float> %shuffle.i
507 define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) {
508 ; CHECK-LABEL: test_vzip1q_f64:
509 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
510 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
512 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
513 ret <2 x double> %shuffle.i
516 define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) {
517 ; CHECK-LABEL: test_vzip1_p8:
518 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
520 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
521 ret <8 x i8> %shuffle.i
524 define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) {
525 ; CHECK-LABEL: test_vzip1q_p8:
526 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
528 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
529 ret <16 x i8> %shuffle.i
532 define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) {
533 ; CHECK-LABEL: test_vzip1_p16:
534 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
536 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
537 ret <4 x i16> %shuffle.i
540 define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) {
541 ; CHECK-LABEL: test_vzip1q_p16:
542 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
544 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
545 ret <8 x i16> %shuffle.i
548 define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) {
549 ; CHECK-LABEL: test_vzip2_s8:
550 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
552 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
553 ret <8 x i8> %shuffle.i
556 define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) {
557 ; CHECK-LABEL: test_vzip2q_s8:
558 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
560 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
561 ret <16 x i8> %shuffle.i
564 define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) {
565 ; CHECK-LABEL: test_vzip2_s16:
566 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
568 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
569 ret <4 x i16> %shuffle.i
572 define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) {
573 ; CHECK-LABEL: test_vzip2q_s16:
574 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
576 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
577 ret <8 x i16> %shuffle.i
580 define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) {
581 ; CHECK-LABEL: test_vzip2_s32:
582 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
583 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
585 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
586 ret <2 x i32> %shuffle.i
589 define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) {
590 ; CHECK-LABEL: test_vzip2q_s32:
591 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
593 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
594 ret <4 x i32> %shuffle.i
597 define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) {
598 ; CHECK-LABEL: test_vzip2q_s64:
599 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
600 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
602 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
603 ret <2 x i64> %shuffle.i
606 define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) {
607 ; CHECK-LABEL: test_vzip2_u8:
608 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
610 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
611 ret <8 x i8> %shuffle.i
614 define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) {
615 ; CHECK-LABEL: test_vzip2q_u8:
616 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
618 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
619 ret <16 x i8> %shuffle.i
622 define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) {
623 ; CHECK-LABEL: test_vzip2_u16:
624 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
626 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
627 ret <4 x i16> %shuffle.i
630 define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) {
631 ; CHECK-LABEL: test_vzip2q_u16:
632 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
634 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
635 ret <8 x i16> %shuffle.i
638 define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) {
639 ; CHECK-LABEL: test_vzip2_u32:
640 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
641 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
643 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
644 ret <2 x i32> %shuffle.i
647 define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) {
648 ; CHECK-LABEL: test_vzip2q_u32:
649 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
651 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
652 ret <4 x i32> %shuffle.i
655 define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) {
656 ; CHECK-LABEL: test_vzip2q_u64:
657 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
658 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
660 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
661 ret <2 x i64> %shuffle.i
664 define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) {
665 ; CHECK-LABEL: test_vzip2_f32:
666 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
667 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
669 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
670 ret <2 x float> %shuffle.i
673 define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) {
674 ; CHECK-LABEL: test_vzip2q_f32:
675 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
677 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
678 ret <4 x float> %shuffle.i
681 define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) {
682 ; CHECK-LABEL: test_vzip2q_f64:
683 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
684 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
686 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
687 ret <2 x double> %shuffle.i
690 define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) {
691 ; CHECK-LABEL: test_vzip2_p8:
692 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
694 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
695 ret <8 x i8> %shuffle.i
698 define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) {
699 ; CHECK-LABEL: test_vzip2q_p8:
700 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
702 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
703 ret <16 x i8> %shuffle.i
706 define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) {
707 ; CHECK-LABEL: test_vzip2_p16:
708 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
710 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
711 ret <4 x i16> %shuffle.i
714 define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) {
715 ; CHECK-LABEL: test_vzip2q_p16:
716 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
718 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
719 ret <8 x i16> %shuffle.i
722 define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) {
723 ; CHECK-LABEL: test_vtrn1_s8:
724 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
726 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
727 ret <8 x i8> %shuffle.i
730 define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) {
731 ; CHECK-LABEL: test_vtrn1q_s8:
732 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
734 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
735 ret <16 x i8> %shuffle.i
738 define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) {
739 ; CHECK-LABEL: test_vtrn1_s16:
740 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
742 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
743 ret <4 x i16> %shuffle.i
746 define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) {
747 ; CHECK-LABEL: test_vtrn1q_s16:
748 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
750 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
751 ret <8 x i16> %shuffle.i
754 define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) {
755 ; CHECK-LABEL: test_vtrn1_s32:
756 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
757 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
759 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
760 ret <2 x i32> %shuffle.i
763 define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) {
764 ; CHECK-LABEL: test_vtrn1q_s32:
765 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
767 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
768 ret <4 x i32> %shuffle.i
771 define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) {
772 ; CHECK-LABEL: test_vtrn1q_s64:
773 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
774 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
776 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
777 ret <2 x i64> %shuffle.i
780 define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) {
781 ; CHECK-LABEL: test_vtrn1_u8:
782 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
784 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
785 ret <8 x i8> %shuffle.i
788 define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) {
789 ; CHECK-LABEL: test_vtrn1q_u8:
790 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
792 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
793 ret <16 x i8> %shuffle.i
796 define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) {
797 ; CHECK-LABEL: test_vtrn1_u16:
798 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
800 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
801 ret <4 x i16> %shuffle.i
804 define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) {
805 ; CHECK-LABEL: test_vtrn1q_u16:
806 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
808 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
809 ret <8 x i16> %shuffle.i
812 define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) {
813 ; CHECK-LABEL: test_vtrn1_u32:
814 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
815 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
817 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
818 ret <2 x i32> %shuffle.i
821 define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) {
822 ; CHECK-LABEL: test_vtrn1q_u32:
823 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
825 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
826 ret <4 x i32> %shuffle.i
829 define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) {
830 ; CHECK-LABEL: test_vtrn1q_u64:
831 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
832 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
834 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
835 ret <2 x i64> %shuffle.i
838 define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) {
839 ; CHECK-LABEL: test_vtrn1_f32:
840 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
841 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
843 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
844 ret <2 x float> %shuffle.i
847 define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) {
848 ; CHECK-LABEL: test_vtrn1q_f32:
849 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
851 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
852 ret <4 x float> %shuffle.i
855 define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) {
856 ; CHECK-LABEL: test_vtrn1q_f64:
857 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[1], {{v[0-9]+}}.d[0]
858 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
860 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
861 ret <2 x double> %shuffle.i
864 define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) {
865 ; CHECK-LABEL: test_vtrn1_p8:
866 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
868 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
869 ret <8 x i8> %shuffle.i
872 define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) {
873 ; CHECK-LABEL: test_vtrn1q_p8:
874 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
876 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
877 ret <16 x i8> %shuffle.i
880 define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) {
881 ; CHECK-LABEL: test_vtrn1_p16:
882 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
884 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
885 ret <4 x i16> %shuffle.i
888 define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) {
889 ; CHECK-LABEL: test_vtrn1q_p16:
890 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
892 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
893 ret <8 x i16> %shuffle.i
896 define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) {
897 ; CHECK-LABEL: test_vtrn2_s8:
898 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
900 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
901 ret <8 x i8> %shuffle.i
904 define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) {
905 ; CHECK-LABEL: test_vtrn2q_s8:
906 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
908 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
909 ret <16 x i8> %shuffle.i
912 define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) {
913 ; CHECK-LABEL: test_vtrn2_s16:
914 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
916 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
917 ret <4 x i16> %shuffle.i
920 define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) {
921 ; CHECK-LABEL: test_vtrn2q_s16:
922 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
924 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
925 ret <8 x i16> %shuffle.i
928 define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) {
929 ; CHECK-LABEL: test_vtrn2_s32:
930 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
931 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
933 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
934 ret <2 x i32> %shuffle.i
937 define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) {
938 ; CHECK-LABEL: test_vtrn2q_s32:
939 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
941 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
942 ret <4 x i32> %shuffle.i
945 define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) {
946 ; CHECK-LABEL: test_vtrn2q_s64:
947 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
948 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
950 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
951 ret <2 x i64> %shuffle.i
954 define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) {
955 ; CHECK-LABEL: test_vtrn2_u8:
956 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
958 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
959 ret <8 x i8> %shuffle.i
962 define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) {
963 ; CHECK-LABEL: test_vtrn2q_u8:
964 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
966 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
967 ret <16 x i8> %shuffle.i
970 define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) {
971 ; CHECK-LABEL: test_vtrn2_u16:
972 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
974 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
975 ret <4 x i16> %shuffle.i
978 define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) {
979 ; CHECK-LABEL: test_vtrn2q_u16:
980 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
982 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
983 ret <8 x i16> %shuffle.i
986 define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) {
987 ; CHECK-LABEL: test_vtrn2_u32:
988 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
989 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
991 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
992 ret <2 x i32> %shuffle.i
995 define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) {
996 ; CHECK-LABEL: test_vtrn2q_u32:
997 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
999 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1000 ret <4 x i32> %shuffle.i
1003 define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) {
1004 ; CHECK-LABEL: test_vtrn2q_u64:
1005 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
1006 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
1008 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
1009 ret <2 x i64> %shuffle.i
1012 define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) {
1013 ; CHECK-LABEL: test_vtrn2_f32:
1014 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
1015 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1017 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
1018 ret <2 x float> %shuffle.i
1021 define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) {
1022 ; CHECK-LABEL: test_vtrn2q_f32:
1023 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1025 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1026 ret <4 x float> %shuffle.i
1029 define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) {
1030 ; CHECK-LABEL: test_vtrn2q_f64:
1031 ; CHECK-AARCH64: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
1032 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
1034 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
1035 ret <2 x double> %shuffle.i
1038 define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) {
1039 ; CHECK-LABEL: test_vtrn2_p8:
1040 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1042 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1043 ret <8 x i8> %shuffle.i
1046 define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) {
1047 ; CHECK-LABEL: test_vtrn2q_p8:
1048 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1050 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1051 ret <16 x i8> %shuffle.i
1054 define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) {
1055 ; CHECK-LABEL: test_vtrn2_p16:
1056 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1058 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1059 ret <4 x i16> %shuffle.i
1062 define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) {
1063 ; CHECK-LABEL: test_vtrn2q_p16:
1064 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1066 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1067 ret <8 x i16> %shuffle.i
1070 define <8 x i8> @test_same_vuzp1_s8(<8 x i8> %a) {
1071 ; CHECK-LABEL: test_same_vuzp1_s8:
1072 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1074 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1075 ret <8 x i8> %shuffle.i
1078 define <16 x i8> @test_same_vuzp1q_s8(<16 x i8> %a) {
1079 ; CHECK-LABEL: test_same_vuzp1q_s8:
1080 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1082 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1083 ret <16 x i8> %shuffle.i
1086 define <4 x i16> @test_same_vuzp1_s16(<4 x i16> %a) {
1087 ; CHECK-LABEL: test_same_vuzp1_s16:
1088 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1090 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1091 ret <4 x i16> %shuffle.i
1094 define <8 x i16> @test_same_vuzp1q_s16(<8 x i16> %a) {
1095 ; CHECK-LABEL: test_same_vuzp1q_s16:
1096 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1098 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1099 ret <8 x i16> %shuffle.i
1102 define <4 x i32> @test_same_vuzp1q_s32(<4 x i32> %a) {
1103 ; CHECK-LABEL: test_same_vuzp1q_s32:
1104 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1106 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1107 ret <4 x i32> %shuffle.i
1110 define <8 x i8> @test_same_vuzp1_u8(<8 x i8> %a) {
1111 ; CHECK-LABEL: test_same_vuzp1_u8:
1112 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1114 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1115 ret <8 x i8> %shuffle.i
1118 define <16 x i8> @test_same_vuzp1q_u8(<16 x i8> %a) {
1119 ; CHECK-LABEL: test_same_vuzp1q_u8:
1120 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1122 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1123 ret <16 x i8> %shuffle.i
1126 define <4 x i16> @test_same_vuzp1_u16(<4 x i16> %a) {
1127 ; CHECK-LABEL: test_same_vuzp1_u16:
1128 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1130 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1131 ret <4 x i16> %shuffle.i
1134 define <8 x i16> @test_same_vuzp1q_u16(<8 x i16> %a) {
1135 ; CHECK-LABEL: test_same_vuzp1q_u16:
1136 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1138 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1139 ret <8 x i16> %shuffle.i
1142 define <4 x i32> @test_same_vuzp1q_u32(<4 x i32> %a) {
1143 ; CHECK-LABEL: test_same_vuzp1q_u32:
1144 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1146 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1147 ret <4 x i32> %shuffle.i
1150 define <4 x float> @test_same_vuzp1q_f32(<4 x float> %a) {
1151 ; CHECK-LABEL: test_same_vuzp1q_f32:
1152 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1154 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1155 ret <4 x float> %shuffle.i
1158 define <8 x i8> @test_same_vuzp1_p8(<8 x i8> %a) {
1159 ; CHECK-LABEL: test_same_vuzp1_p8:
1160 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1162 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1163 ret <8 x i8> %shuffle.i
1166 define <16 x i8> @test_same_vuzp1q_p8(<16 x i8> %a) {
1167 ; CHECK-LABEL: test_same_vuzp1q_p8:
1168 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1170 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1171 ret <16 x i8> %shuffle.i
1174 define <4 x i16> @test_same_vuzp1_p16(<4 x i16> %a) {
1175 ; CHECK-LABEL: test_same_vuzp1_p16:
1176 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1178 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1179 ret <4 x i16> %shuffle.i
1182 define <8 x i16> @test_same_vuzp1q_p16(<8 x i16> %a) {
1183 ; CHECK-LABEL: test_same_vuzp1q_p16:
1184 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1186 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1187 ret <8 x i16> %shuffle.i
1190 define <8 x i8> @test_same_vuzp2_s8(<8 x i8> %a) {
1191 ; CHECK-LABEL: test_same_vuzp2_s8:
1192 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1194 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1195 ret <8 x i8> %shuffle.i
1198 define <16 x i8> @test_same_vuzp2q_s8(<16 x i8> %a) {
1199 ; CHECK-LABEL: test_same_vuzp2q_s8:
1200 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1202 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1203 ret <16 x i8> %shuffle.i
1206 define <4 x i16> @test_same_vuzp2_s16(<4 x i16> %a) {
1207 ; CHECK-LABEL: test_same_vuzp2_s16:
1208 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1210 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1211 ret <4 x i16> %shuffle.i
1214 define <8 x i16> @test_same_vuzp2q_s16(<8 x i16> %a) {
1215 ; CHECK-LABEL: test_same_vuzp2q_s16:
1216 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1218 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1219 ret <8 x i16> %shuffle.i
1222 define <4 x i32> @test_same_vuzp2q_s32(<4 x i32> %a) {
1223 ; CHECK-LABEL: test_same_vuzp2q_s32:
1224 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1226 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1227 ret <4 x i32> %shuffle.i
1230 define <8 x i8> @test_same_vuzp2_u8(<8 x i8> %a) {
1231 ; CHECK-LABEL: test_same_vuzp2_u8:
1232 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1234 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1235 ret <8 x i8> %shuffle.i
1238 define <16 x i8> @test_same_vuzp2q_u8(<16 x i8> %a) {
1239 ; CHECK-LABEL: test_same_vuzp2q_u8:
1240 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1242 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1243 ret <16 x i8> %shuffle.i
1246 define <4 x i16> @test_same_vuzp2_u16(<4 x i16> %a) {
1247 ; CHECK-LABEL: test_same_vuzp2_u16:
1248 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1250 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1251 ret <4 x i16> %shuffle.i
1254 define <8 x i16> @test_same_vuzp2q_u16(<8 x i16> %a) {
1255 ; CHECK-LABEL: test_same_vuzp2q_u16:
1256 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1258 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1259 ret <8 x i16> %shuffle.i
1262 define <4 x i32> @test_same_vuzp2q_u32(<4 x i32> %a) {
1263 ; CHECK-LABEL: test_same_vuzp2q_u32:
1264 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1266 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1267 ret <4 x i32> %shuffle.i
1270 define <4 x float> @test_same_vuzp2q_f32(<4 x float> %a) {
1271 ; CHECK-LABEL: test_same_vuzp2q_f32:
1272 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1274 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1275 ret <4 x float> %shuffle.i
1278 define <8 x i8> @test_same_vuzp2_p8(<8 x i8> %a) {
1279 ; CHECK-LABEL: test_same_vuzp2_p8:
1280 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1282 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1283 ret <8 x i8> %shuffle.i
1286 define <16 x i8> @test_same_vuzp2q_p8(<16 x i8> %a) {
1287 ; CHECK-LABEL: test_same_vuzp2q_p8:
1288 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1290 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1291 ret <16 x i8> %shuffle.i
1294 define <4 x i16> @test_same_vuzp2_p16(<4 x i16> %a) {
1295 ; CHECK-LABEL: test_same_vuzp2_p16:
1296 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1298 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1299 ret <4 x i16> %shuffle.i
1302 define <8 x i16> @test_same_vuzp2q_p16(<8 x i16> %a) {
1303 ; CHECK-LABEL: test_same_vuzp2q_p16:
1304 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1306 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1307 ret <8 x i16> %shuffle.i
1310 define <8 x i8> @test_same_vzip1_s8(<8 x i8> %a) {
1311 ; CHECK-LABEL: test_same_vzip1_s8:
1312 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1314 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1315 ret <8 x i8> %shuffle.i
1318 define <16 x i8> @test_same_vzip1q_s8(<16 x i8> %a) {
1319 ; CHECK-LABEL: test_same_vzip1q_s8:
1320 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1322 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1323 ret <16 x i8> %shuffle.i
1326 define <4 x i16> @test_same_vzip1_s16(<4 x i16> %a) {
1327 ; CHECK-LABEL: test_same_vzip1_s16:
1328 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1330 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1331 ret <4 x i16> %shuffle.i
1334 define <8 x i16> @test_same_vzip1q_s16(<8 x i16> %a) {
1335 ; CHECK-LABEL: test_same_vzip1q_s16:
1336 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1338 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1339 ret <8 x i16> %shuffle.i
1342 define <4 x i32> @test_same_vzip1q_s32(<4 x i32> %a) {
1343 ; CHECK-LABEL: test_same_vzip1q_s32:
1344 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1346 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1347 ret <4 x i32> %shuffle.i
1350 define <8 x i8> @test_same_vzip1_u8(<8 x i8> %a) {
1351 ; CHECK-LABEL: test_same_vzip1_u8:
1352 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1354 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1355 ret <8 x i8> %shuffle.i
1358 define <16 x i8> @test_same_vzip1q_u8(<16 x i8> %a) {
1359 ; CHECK-LABEL: test_same_vzip1q_u8:
1360 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1362 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1363 ret <16 x i8> %shuffle.i
1366 define <4 x i16> @test_same_vzip1_u16(<4 x i16> %a) {
1367 ; CHECK-LABEL: test_same_vzip1_u16:
1368 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1370 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1371 ret <4 x i16> %shuffle.i
1374 define <8 x i16> @test_same_vzip1q_u16(<8 x i16> %a) {
1375 ; CHECK-LABEL: test_same_vzip1q_u16:
1376 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1378 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1379 ret <8 x i16> %shuffle.i
1382 define <4 x i32> @test_same_vzip1q_u32(<4 x i32> %a) {
1383 ; CHECK-LABEL: test_same_vzip1q_u32:
1384 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1386 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1387 ret <4 x i32> %shuffle.i
1390 define <4 x float> @test_same_vzip1q_f32(<4 x float> %a) {
1391 ; CHECK-LABEL: test_same_vzip1q_f32:
1392 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1394 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1395 ret <4 x float> %shuffle.i
1398 define <8 x i8> @test_same_vzip1_p8(<8 x i8> %a) {
1399 ; CHECK-LABEL: test_same_vzip1_p8:
1400 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1402 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1403 ret <8 x i8> %shuffle.i
1406 define <16 x i8> @test_same_vzip1q_p8(<16 x i8> %a) {
1407 ; CHECK-LABEL: test_same_vzip1q_p8:
1408 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1410 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1411 ret <16 x i8> %shuffle.i
1414 define <4 x i16> @test_same_vzip1_p16(<4 x i16> %a) {
1415 ; CHECK-LABEL: test_same_vzip1_p16:
1416 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1418 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1419 ret <4 x i16> %shuffle.i
1422 define <8 x i16> @test_same_vzip1q_p16(<8 x i16> %a) {
1423 ; CHECK-LABEL: test_same_vzip1q_p16:
1424 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1426 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1427 ret <8 x i16> %shuffle.i
1430 define <8 x i8> @test_same_vzip2_s8(<8 x i8> %a) {
1431 ; CHECK-LABEL: test_same_vzip2_s8:
1432 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1434 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1435 ret <8 x i8> %shuffle.i
1438 define <16 x i8> @test_same_vzip2q_s8(<16 x i8> %a) {
1439 ; CHECK-LABEL: test_same_vzip2q_s8:
1440 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1442 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1443 ret <16 x i8> %shuffle.i
1446 define <4 x i16> @test_same_vzip2_s16(<4 x i16> %a) {
1447 ; CHECK-LABEL: test_same_vzip2_s16:
1448 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1450 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1451 ret <4 x i16> %shuffle.i
1454 define <8 x i16> @test_same_vzip2q_s16(<8 x i16> %a) {
1455 ; CHECK-LABEL: test_same_vzip2q_s16:
1456 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1458 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1459 ret <8 x i16> %shuffle.i
1462 define <4 x i32> @test_same_vzip2q_s32(<4 x i32> %a) {
1463 ; CHECK-LABEL: test_same_vzip2q_s32:
1464 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1466 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1467 ret <4 x i32> %shuffle.i
1470 define <8 x i8> @test_same_vzip2_u8(<8 x i8> %a) {
1471 ; CHECK-LABEL: test_same_vzip2_u8:
1472 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1474 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1475 ret <8 x i8> %shuffle.i
1478 define <16 x i8> @test_same_vzip2q_u8(<16 x i8> %a) {
1479 ; CHECK-LABEL: test_same_vzip2q_u8:
1480 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1482 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1483 ret <16 x i8> %shuffle.i
1486 define <4 x i16> @test_same_vzip2_u16(<4 x i16> %a) {
1487 ; CHECK-LABEL: test_same_vzip2_u16:
1488 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1490 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1491 ret <4 x i16> %shuffle.i
1494 define <8 x i16> @test_same_vzip2q_u16(<8 x i16> %a) {
1495 ; CHECK-LABEL: test_same_vzip2q_u16:
1496 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1498 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1499 ret <8 x i16> %shuffle.i
1502 define <4 x i32> @test_same_vzip2q_u32(<4 x i32> %a) {
1503 ; CHECK-LABEL: test_same_vzip2q_u32:
1504 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1506 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1507 ret <4 x i32> %shuffle.i
1510 define <4 x float> @test_same_vzip2q_f32(<4 x float> %a) {
1511 ; CHECK-LABEL: test_same_vzip2q_f32:
1512 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1514 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1515 ret <4 x float> %shuffle.i
1518 define <8 x i8> @test_same_vzip2_p8(<8 x i8> %a) {
1519 ; CHECK-LABEL: test_same_vzip2_p8:
1520 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1522 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1523 ret <8 x i8> %shuffle.i
1526 define <16 x i8> @test_same_vzip2q_p8(<16 x i8> %a) {
1527 ; CHECK-LABEL: test_same_vzip2q_p8:
1528 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1530 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1531 ret <16 x i8> %shuffle.i
1534 define <4 x i16> @test_same_vzip2_p16(<4 x i16> %a) {
1535 ; CHECK-LABEL: test_same_vzip2_p16:
1536 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1538 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1539 ret <4 x i16> %shuffle.i
1542 define <8 x i16> @test_same_vzip2q_p16(<8 x i16> %a) {
1543 ; CHECK-LABEL: test_same_vzip2q_p16:
1544 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1546 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1547 ret <8 x i16> %shuffle.i
1550 define <8 x i8> @test_same_vtrn1_s8(<8 x i8> %a) {
1551 ; CHECK-LABEL: test_same_vtrn1_s8:
1552 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1554 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1555 ret <8 x i8> %shuffle.i
1558 define <16 x i8> @test_same_vtrn1q_s8(<16 x i8> %a) {
1559 ; CHECK-LABEL: test_same_vtrn1q_s8:
1560 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1562 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1563 ret <16 x i8> %shuffle.i
1566 define <4 x i16> @test_same_vtrn1_s16(<4 x i16> %a) {
1567 ; CHECK-LABEL: test_same_vtrn1_s16:
1568 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1570 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1571 ret <4 x i16> %shuffle.i
1574 define <8 x i16> @test_same_vtrn1q_s16(<8 x i16> %a) {
1575 ; CHECK-LABEL: test_same_vtrn1q_s16:
1576 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1578 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1579 ret <8 x i16> %shuffle.i
1582 define <4 x i32> @test_same_vtrn1q_s32(<4 x i32> %a) {
1583 ; CHECK-LABEL: test_same_vtrn1q_s32:
1584 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1586 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1587 ret <4 x i32> %shuffle.i
1590 define <8 x i8> @test_same_vtrn1_u8(<8 x i8> %a) {
1591 ; CHECK-LABEL: test_same_vtrn1_u8:
1592 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1594 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1595 ret <8 x i8> %shuffle.i
1598 define <16 x i8> @test_same_vtrn1q_u8(<16 x i8> %a) {
1599 ; CHECK-LABEL: test_same_vtrn1q_u8:
1600 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1602 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1603 ret <16 x i8> %shuffle.i
1606 define <4 x i16> @test_same_vtrn1_u16(<4 x i16> %a) {
1607 ; CHECK-LABEL: test_same_vtrn1_u16:
1608 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1610 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1611 ret <4 x i16> %shuffle.i
1614 define <8 x i16> @test_same_vtrn1q_u16(<8 x i16> %a) {
1615 ; CHECK-LABEL: test_same_vtrn1q_u16:
1616 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1618 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1619 ret <8 x i16> %shuffle.i
1622 define <4 x i32> @test_same_vtrn1q_u32(<4 x i32> %a) {
1623 ; CHECK-LABEL: test_same_vtrn1q_u32:
1624 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1626 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1627 ret <4 x i32> %shuffle.i
1630 define <4 x float> @test_same_vtrn1q_f32(<4 x float> %a) {
1631 ; CHECK-LABEL: test_same_vtrn1q_f32:
1632 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1634 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1635 ret <4 x float> %shuffle.i
1638 define <8 x i8> @test_same_vtrn1_p8(<8 x i8> %a) {
1639 ; CHECK-LABEL: test_same_vtrn1_p8:
1640 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1642 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1643 ret <8 x i8> %shuffle.i
1646 define <16 x i8> @test_same_vtrn1q_p8(<16 x i8> %a) {
1647 ; CHECK-LABEL: test_same_vtrn1q_p8:
1648 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1650 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1651 ret <16 x i8> %shuffle.i
1654 define <4 x i16> @test_same_vtrn1_p16(<4 x i16> %a) {
1655 ; CHECK-LABEL: test_same_vtrn1_p16:
1656 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1658 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1659 ret <4 x i16> %shuffle.i
1662 define <8 x i16> @test_same_vtrn1q_p16(<8 x i16> %a) {
1663 ; CHECK-LABEL: test_same_vtrn1q_p16:
1664 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1666 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1667 ret <8 x i16> %shuffle.i
1670 define <8 x i8> @test_same_vtrn2_s8(<8 x i8> %a) {
1671 ; CHECK-LABEL: test_same_vtrn2_s8:
1672 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1674 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1675 ret <8 x i8> %shuffle.i
1678 define <16 x i8> @test_same_vtrn2q_s8(<16 x i8> %a) {
1679 ; CHECK-LABEL: test_same_vtrn2q_s8:
1680 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1682 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1683 ret <16 x i8> %shuffle.i
1686 define <4 x i16> @test_same_vtrn2_s16(<4 x i16> %a) {
1687 ; CHECK-LABEL: test_same_vtrn2_s16:
1688 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1690 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1691 ret <4 x i16> %shuffle.i
1694 define <8 x i16> @test_same_vtrn2q_s16(<8 x i16> %a) {
1695 ; CHECK-LABEL: test_same_vtrn2q_s16:
1696 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1698 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1699 ret <8 x i16> %shuffle.i
1702 define <4 x i32> @test_same_vtrn2q_s32(<4 x i32> %a) {
1703 ; CHECK-LABEL: test_same_vtrn2q_s32:
1704 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1706 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1707 ret <4 x i32> %shuffle.i
1710 define <8 x i8> @test_same_vtrn2_u8(<8 x i8> %a) {
1711 ; CHECK-LABEL: test_same_vtrn2_u8:
1712 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1714 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1715 ret <8 x i8> %shuffle.i
1718 define <16 x i8> @test_same_vtrn2q_u8(<16 x i8> %a) {
1719 ; CHECK-LABEL: test_same_vtrn2q_u8:
1720 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1722 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1723 ret <16 x i8> %shuffle.i
1726 define <4 x i16> @test_same_vtrn2_u16(<4 x i16> %a) {
1727 ; CHECK-LABEL: test_same_vtrn2_u16:
1728 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1730 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1731 ret <4 x i16> %shuffle.i
1734 define <8 x i16> @test_same_vtrn2q_u16(<8 x i16> %a) {
1735 ; CHECK-LABEL: test_same_vtrn2q_u16:
1736 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1738 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1739 ret <8 x i16> %shuffle.i
1742 define <4 x i32> @test_same_vtrn2q_u32(<4 x i32> %a) {
1743 ; CHECK-LABEL: test_same_vtrn2q_u32:
1744 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1746 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1747 ret <4 x i32> %shuffle.i
1750 define <4 x float> @test_same_vtrn2q_f32(<4 x float> %a) {
1751 ; CHECK-LABEL: test_same_vtrn2q_f32:
1752 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1754 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1755 ret <4 x float> %shuffle.i
1758 define <8 x i8> @test_same_vtrn2_p8(<8 x i8> %a) {
1759 ; CHECK-LABEL: test_same_vtrn2_p8:
1760 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1762 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1763 ret <8 x i8> %shuffle.i
1766 define <16 x i8> @test_same_vtrn2q_p8(<16 x i8> %a) {
1767 ; CHECK-LABEL: test_same_vtrn2q_p8:
1768 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1770 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1771 ret <16 x i8> %shuffle.i
1774 define <4 x i16> @test_same_vtrn2_p16(<4 x i16> %a) {
1775 ; CHECK-LABEL: test_same_vtrn2_p16:
1776 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1778 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1779 ret <4 x i16> %shuffle.i
1782 define <8 x i16> @test_same_vtrn2q_p16(<8 x i16> %a) {
1783 ; CHECK-LABEL: test_same_vtrn2q_p16:
1784 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1786 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1787 ret <8 x i16> %shuffle.i
1791 define <8 x i8> @test_undef_vuzp1_s8(<8 x i8> %a) {
1792 ; CHECK-LABEL: test_undef_vuzp1_s8:
1793 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1795 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1796 ret <8 x i8> %shuffle.i
1799 define <16 x i8> @test_undef_vuzp1q_s8(<16 x i8> %a) {
1800 ; CHECK-LABEL: test_undef_vuzp1q_s8:
1801 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1803 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1804 ret <16 x i8> %shuffle.i
1807 define <4 x i16> @test_undef_vuzp1_s16(<4 x i16> %a) {
1808 ; CHECK-LABEL: test_undef_vuzp1_s16:
1809 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1811 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1812 ret <4 x i16> %shuffle.i
1815 define <8 x i16> @test_undef_vuzp1q_s16(<8 x i16> %a) {
1816 ; CHECK-LABEL: test_undef_vuzp1q_s16:
1817 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1819 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1820 ret <8 x i16> %shuffle.i
1823 define <4 x i32> @test_undef_vuzp1q_s32(<4 x i32> %a) {
1824 ; CHECK-LABEL: test_undef_vuzp1q_s32:
1825 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1827 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1828 ret <4 x i32> %shuffle.i
1831 define <8 x i8> @test_undef_vuzp1_u8(<8 x i8> %a) {
1832 ; CHECK-LABEL: test_undef_vuzp1_u8:
1833 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1835 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1836 ret <8 x i8> %shuffle.i
1839 define <16 x i8> @test_undef_vuzp1q_u8(<16 x i8> %a) {
1840 ; CHECK-LABEL: test_undef_vuzp1q_u8:
1841 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1843 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1844 ret <16 x i8> %shuffle.i
1847 define <4 x i16> @test_undef_vuzp1_u16(<4 x i16> %a) {
1848 ; CHECK-LABEL: test_undef_vuzp1_u16:
1849 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1851 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1852 ret <4 x i16> %shuffle.i
1855 define <8 x i16> @test_undef_vuzp1q_u16(<8 x i16> %a) {
1856 ; CHECK-LABEL: test_undef_vuzp1q_u16:
1857 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1859 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1860 ret <8 x i16> %shuffle.i
1863 define <4 x i32> @test_undef_vuzp1q_u32(<4 x i32> %a) {
1864 ; CHECK-LABEL: test_undef_vuzp1q_u32:
1865 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1867 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1868 ret <4 x i32> %shuffle.i
1871 define <4 x float> @test_undef_vuzp1q_f32(<4 x float> %a) {
1872 ; CHECK-LABEL: test_undef_vuzp1q_f32:
1873 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1875 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1876 ret <4 x float> %shuffle.i
1879 define <8 x i8> @test_undef_vuzp1_p8(<8 x i8> %a) {
1880 ; CHECK-LABEL: test_undef_vuzp1_p8:
1881 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1883 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1884 ret <8 x i8> %shuffle.i
1887 define <16 x i8> @test_undef_vuzp1q_p8(<16 x i8> %a) {
1888 ; CHECK-LABEL: test_undef_vuzp1q_p8:
1889 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1891 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1892 ret <16 x i8> %shuffle.i
1895 define <4 x i16> @test_undef_vuzp1_p16(<4 x i16> %a) {
1896 ; CHECK-LABEL: test_undef_vuzp1_p16:
1897 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1899 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1900 ret <4 x i16> %shuffle.i
1903 define <8 x i16> @test_undef_vuzp1q_p16(<8 x i16> %a) {
1904 ; CHECK-LABEL: test_undef_vuzp1q_p16:
1905 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1907 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1908 ret <8 x i16> %shuffle.i
1911 define <8 x i8> @test_undef_vuzp2_s8(<8 x i8> %a) {
1912 ; CHECK-LABEL: test_undef_vuzp2_s8:
1913 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1915 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1916 ret <8 x i8> %shuffle.i
1919 define <16 x i8> @test_undef_vuzp2q_s8(<16 x i8> %a) {
1920 ; CHECK-LABEL: test_undef_vuzp2q_s8:
1921 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1923 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1924 ret <16 x i8> %shuffle.i
1927 define <4 x i16> @test_undef_vuzp2_s16(<4 x i16> %a) {
1928 ; CHECK-LABEL: test_undef_vuzp2_s16:
1929 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1931 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1932 ret <4 x i16> %shuffle.i
1935 define <8 x i16> @test_undef_vuzp2q_s16(<8 x i16> %a) {
1936 ; CHECK-LABEL: test_undef_vuzp2q_s16:
1937 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1939 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1940 ret <8 x i16> %shuffle.i
1943 define <4 x i32> @test_undef_vuzp2q_s32(<4 x i32> %a) {
1944 ; CHECK-LABEL: test_undef_vuzp2q_s32:
1945 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1947 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1948 ret <4 x i32> %shuffle.i
1951 define <8 x i8> @test_undef_vuzp2_u8(<8 x i8> %a) {
1952 ; CHECK-LABEL: test_undef_vuzp2_u8:
1953 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1955 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1956 ret <8 x i8> %shuffle.i
1959 define <16 x i8> @test_undef_vuzp2q_u8(<16 x i8> %a) {
1960 ; CHECK-LABEL: test_undef_vuzp2q_u8:
1961 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1963 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1964 ret <16 x i8> %shuffle.i
1967 define <4 x i16> @test_undef_vuzp2_u16(<4 x i16> %a) {
1968 ; CHECK-LABEL: test_undef_vuzp2_u16:
1969 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1971 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1972 ret <4 x i16> %shuffle.i
1975 define <8 x i16> @test_undef_vuzp2q_u16(<8 x i16> %a) {
1976 ; CHECK-LABEL: test_undef_vuzp2q_u16:
1977 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1979 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1980 ret <8 x i16> %shuffle.i
1983 define <4 x i32> @test_undef_vuzp2q_u32(<4 x i32> %a) {
1984 ; CHECK-LABEL: test_undef_vuzp2q_u32:
1985 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1987 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1988 ret <4 x i32> %shuffle.i
1991 define <4 x float> @test_undef_vuzp2q_f32(<4 x float> %a) {
1992 ; CHECK-LABEL: test_undef_vuzp2q_f32:
1993 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1995 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1996 ret <4 x float> %shuffle.i
1999 define <8 x i8> @test_undef_vuzp2_p8(<8 x i8> %a) {
2000 ; CHECK-LABEL: test_undef_vuzp2_p8:
2001 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2003 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2004 ret <8 x i8> %shuffle.i
2007 define <16 x i8> @test_undef_vuzp2q_p8(<16 x i8> %a) {
2008 ; CHECK-LABEL: test_undef_vuzp2q_p8:
2009 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2011 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2012 ret <16 x i8> %shuffle.i
2015 define <4 x i16> @test_undef_vuzp2_p16(<4 x i16> %a) {
2016 ; CHECK-LABEL: test_undef_vuzp2_p16:
2017 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2019 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2020 ret <4 x i16> %shuffle.i
2023 define <8 x i16> @test_undef_vuzp2q_p16(<8 x i16> %a) {
2024 ; CHECK-LABEL: test_undef_vuzp2q_p16:
2025 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2027 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2028 ret <8 x i16> %shuffle.i
2031 define <8 x i8> @test_undef_vzip1_s8(<8 x i8> %a) {
2032 ; CHECK-LABEL: test_undef_vzip1_s8:
2033 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2035 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2036 ret <8 x i8> %shuffle.i
2039 define <16 x i8> @test_undef_vzip1q_s8(<16 x i8> %a) {
2040 ; CHECK-LABEL: test_undef_vzip1q_s8:
2041 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2043 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2044 ret <16 x i8> %shuffle.i
2047 define <4 x i16> @test_undef_vzip1_s16(<4 x i16> %a) {
2048 ; CHECK-LABEL: test_undef_vzip1_s16:
2049 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2051 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2052 ret <4 x i16> %shuffle.i
2055 define <8 x i16> @test_undef_vzip1q_s16(<8 x i16> %a) {
2056 ; CHECK-LABEL: test_undef_vzip1q_s16:
2057 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2059 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2060 ret <8 x i16> %shuffle.i
2063 define <4 x i32> @test_undef_vzip1q_s32(<4 x i32> %a) {
2064 ; CHECK-LABEL: test_undef_vzip1q_s32:
2065 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2067 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2068 ret <4 x i32> %shuffle.i
2071 define <8 x i8> @test_undef_vzip1_u8(<8 x i8> %a) {
2072 ; CHECK-LABEL: test_undef_vzip1_u8:
2073 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2075 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2076 ret <8 x i8> %shuffle.i
2079 define <16 x i8> @test_undef_vzip1q_u8(<16 x i8> %a) {
2080 ; CHECK-LABEL: test_undef_vzip1q_u8:
2081 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2083 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2084 ret <16 x i8> %shuffle.i
2087 define <4 x i16> @test_undef_vzip1_u16(<4 x i16> %a) {
2088 ; CHECK-LABEL: test_undef_vzip1_u16:
2089 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2091 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2092 ret <4 x i16> %shuffle.i
2095 define <8 x i16> @test_undef_vzip1q_u16(<8 x i16> %a) {
2096 ; CHECK-LABEL: test_undef_vzip1q_u16:
2097 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2099 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2100 ret <8 x i16> %shuffle.i
2103 define <4 x i32> @test_undef_vzip1q_u32(<4 x i32> %a) {
2104 ; CHECK-LABEL: test_undef_vzip1q_u32:
2105 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2107 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2108 ret <4 x i32> %shuffle.i
2111 define <4 x float> @test_undef_vzip1q_f32(<4 x float> %a) {
2112 ; CHECK-LABEL: test_undef_vzip1q_f32:
2113 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2115 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2116 ret <4 x float> %shuffle.i
2119 define <8 x i8> @test_undef_vzip1_p8(<8 x i8> %a) {
2120 ; CHECK-LABEL: test_undef_vzip1_p8:
2121 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2123 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2124 ret <8 x i8> %shuffle.i
2127 define <16 x i8> @test_undef_vzip1q_p8(<16 x i8> %a) {
2128 ; CHECK-LABEL: test_undef_vzip1q_p8:
2129 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2131 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2132 ret <16 x i8> %shuffle.i
2135 define <4 x i16> @test_undef_vzip1_p16(<4 x i16> %a) {
2136 ; CHECK-LABEL: test_undef_vzip1_p16:
2137 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2139 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2140 ret <4 x i16> %shuffle.i
2143 define <8 x i16> @test_undef_vzip1q_p16(<8 x i16> %a) {
2144 ; CHECK-LABEL: test_undef_vzip1q_p16:
2145 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2147 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2148 ret <8 x i16> %shuffle.i
2151 define <8 x i8> @test_undef_vzip2_s8(<8 x i8> %a) {
2152 ; CHECK-LABEL: test_undef_vzip2_s8:
2153 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2155 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2156 ret <8 x i8> %shuffle.i
2159 define <16 x i8> @test_undef_vzip2q_s8(<16 x i8> %a) {
2160 ; CHECK-LABEL: test_undef_vzip2q_s8:
2161 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2163 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2164 ret <16 x i8> %shuffle.i
2167 define <4 x i16> @test_undef_vzip2_s16(<4 x i16> %a) {
2168 ; CHECK-LABEL: test_undef_vzip2_s16:
2169 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2171 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2172 ret <4 x i16> %shuffle.i
2175 define <8 x i16> @test_undef_vzip2q_s16(<8 x i16> %a) {
2176 ; CHECK-LABEL: test_undef_vzip2q_s16:
2177 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2179 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2180 ret <8 x i16> %shuffle.i
2183 define <4 x i32> @test_undef_vzip2q_s32(<4 x i32> %a) {
2184 ; CHECK-LABEL: test_undef_vzip2q_s32:
2185 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2187 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2188 ret <4 x i32> %shuffle.i
2191 define <8 x i8> @test_undef_vzip2_u8(<8 x i8> %a) {
2192 ; CHECK-LABEL: test_undef_vzip2_u8:
2193 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2195 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2196 ret <8 x i8> %shuffle.i
2199 define <16 x i8> @test_undef_vzip2q_u8(<16 x i8> %a) {
2200 ; CHECK-LABEL: test_undef_vzip2q_u8:
2201 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2203 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2204 ret <16 x i8> %shuffle.i
2207 define <4 x i16> @test_undef_vzip2_u16(<4 x i16> %a) {
2208 ; CHECK-LABEL: test_undef_vzip2_u16:
2209 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2211 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2212 ret <4 x i16> %shuffle.i
2215 define <8 x i16> @test_undef_vzip2q_u16(<8 x i16> %a) {
2216 ; CHECK-LABEL: test_undef_vzip2q_u16:
2217 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2219 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2220 ret <8 x i16> %shuffle.i
2223 define <4 x i32> @test_undef_vzip2q_u32(<4 x i32> %a) {
2224 ; CHECK-LABEL: test_undef_vzip2q_u32:
2225 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2227 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2228 ret <4 x i32> %shuffle.i
2231 define <4 x float> @test_undef_vzip2q_f32(<4 x float> %a) {
2232 ; CHECK-LABEL: test_undef_vzip2q_f32:
2233 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2235 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2236 ret <4 x float> %shuffle.i
2239 define <8 x i8> @test_undef_vzip2_p8(<8 x i8> %a) {
2240 ; CHECK-LABEL: test_undef_vzip2_p8:
2241 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2243 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2244 ret <8 x i8> %shuffle.i
2247 define <16 x i8> @test_undef_vzip2q_p8(<16 x i8> %a) {
2248 ; CHECK-LABEL: test_undef_vzip2q_p8:
2249 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2251 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2252 ret <16 x i8> %shuffle.i
2255 define <4 x i16> @test_undef_vzip2_p16(<4 x i16> %a) {
2256 ; CHECK-LABEL: test_undef_vzip2_p16:
2257 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2259 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2260 ret <4 x i16> %shuffle.i
2263 define <8 x i16> @test_undef_vzip2q_p16(<8 x i16> %a) {
2264 ; CHECK-LABEL: test_undef_vzip2q_p16:
2265 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2267 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2268 ret <8 x i16> %shuffle.i
2271 define <8 x i8> @test_undef_vtrn1_s8(<8 x i8> %a) {
2272 ; CHECK-LABEL: test_undef_vtrn1_s8:
2275 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2276 ret <8 x i8> %shuffle.i
2279 define <16 x i8> @test_undef_vtrn1q_s8(<16 x i8> %a) {
2280 ; CHECK-LABEL: test_undef_vtrn1q_s8:
2283 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2284 ret <16 x i8> %shuffle.i
2287 define <4 x i16> @test_undef_vtrn1_s16(<4 x i16> %a) {
2288 ; CHECK-LABEL: test_undef_vtrn1_s16:
2291 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2292 ret <4 x i16> %shuffle.i
2295 define <8 x i16> @test_undef_vtrn1q_s16(<8 x i16> %a) {
2296 ; CHECK-LABEL: test_undef_vtrn1q_s16:
2299 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2300 ret <8 x i16> %shuffle.i
2303 define <4 x i32> @test_undef_vtrn1q_s32(<4 x i32> %a) {
2304 ; CHECK-LABEL: test_undef_vtrn1q_s32:
2307 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2308 ret <4 x i32> %shuffle.i
2311 define <8 x i8> @test_undef_vtrn1_u8(<8 x i8> %a) {
2312 ; CHECK-LABEL: test_undef_vtrn1_u8:
2315 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2316 ret <8 x i8> %shuffle.i
2319 define <16 x i8> @test_undef_vtrn1q_u8(<16 x i8> %a) {
2320 ; CHECK-LABEL: test_undef_vtrn1q_u8:
2323 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2324 ret <16 x i8> %shuffle.i
2327 define <4 x i16> @test_undef_vtrn1_u16(<4 x i16> %a) {
2328 ; CHECK-LABEL: test_undef_vtrn1_u16:
2331 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2332 ret <4 x i16> %shuffle.i
2335 define <8 x i16> @test_undef_vtrn1q_u16(<8 x i16> %a) {
2336 ; CHECK-LABEL: test_undef_vtrn1q_u16:
2339 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2340 ret <8 x i16> %shuffle.i
2343 define <4 x i32> @test_undef_vtrn1q_u32(<4 x i32> %a) {
2344 ; CHECK-LABEL: test_undef_vtrn1q_u32:
2347 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2348 ret <4 x i32> %shuffle.i
2351 define <4 x float> @test_undef_vtrn1q_f32(<4 x float> %a) {
2352 ; CHECK-LABEL: test_undef_vtrn1q_f32:
2355 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2356 ret <4 x float> %shuffle.i
2359 define <8 x i8> @test_undef_vtrn1_p8(<8 x i8> %a) {
2360 ; CHECK-LABEL: test_undef_vtrn1_p8:
2363 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2364 ret <8 x i8> %shuffle.i
2367 define <16 x i8> @test_undef_vtrn1q_p8(<16 x i8> %a) {
2368 ; CHECK-LABEL: test_undef_vtrn1q_p8:
2371 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2372 ret <16 x i8> %shuffle.i
2375 define <4 x i16> @test_undef_vtrn1_p16(<4 x i16> %a) {
2376 ; CHECK-LABEL: test_undef_vtrn1_p16:
2379 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2380 ret <4 x i16> %shuffle.i
2383 define <8 x i16> @test_undef_vtrn1q_p16(<8 x i16> %a) {
2384 ; CHECK-LABEL: test_undef_vtrn1q_p16:
2387 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2388 ret <8 x i16> %shuffle.i
2391 define <8 x i8> @test_undef_vtrn2_s8(<8 x i8> %a) {
2392 ; CHECK-LABEL: test_undef_vtrn2_s8:
2393 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2395 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2396 ret <8 x i8> %shuffle.i
2399 define <16 x i8> @test_undef_vtrn2q_s8(<16 x i8> %a) {
2400 ; CHECK-LABEL: test_undef_vtrn2q_s8:
2401 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2403 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2404 ret <16 x i8> %shuffle.i
2407 define <4 x i16> @test_undef_vtrn2_s16(<4 x i16> %a) {
2408 ; CHECK-LABEL: test_undef_vtrn2_s16:
2409 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2411 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2412 ret <4 x i16> %shuffle.i
2415 define <8 x i16> @test_undef_vtrn2q_s16(<8 x i16> %a) {
2416 ; CHECK-LABEL: test_undef_vtrn2q_s16:
2417 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2419 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2420 ret <8 x i16> %shuffle.i
2423 define <4 x i32> @test_undef_vtrn2q_s32(<4 x i32> %a) {
2424 ; CHECK-LABEL: test_undef_vtrn2q_s32:
2425 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2427 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2428 ret <4 x i32> %shuffle.i
2431 define <8 x i8> @test_undef_vtrn2_u8(<8 x i8> %a) {
2432 ; CHECK-LABEL: test_undef_vtrn2_u8:
2433 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2435 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2436 ret <8 x i8> %shuffle.i
2439 define <16 x i8> @test_undef_vtrn2q_u8(<16 x i8> %a) {
2440 ; CHECK-LABEL: test_undef_vtrn2q_u8:
2441 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2443 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2444 ret <16 x i8> %shuffle.i
2447 define <4 x i16> @test_undef_vtrn2_u16(<4 x i16> %a) {
2448 ; CHECK-LABEL: test_undef_vtrn2_u16:
2449 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2451 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2452 ret <4 x i16> %shuffle.i
2455 define <8 x i16> @test_undef_vtrn2q_u16(<8 x i16> %a) {
2456 ; CHECK-LABEL: test_undef_vtrn2q_u16:
2457 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2459 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2460 ret <8 x i16> %shuffle.i
2463 define <4 x i32> @test_undef_vtrn2q_u32(<4 x i32> %a) {
2464 ; CHECK-LABEL: test_undef_vtrn2q_u32:
2465 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2467 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2468 ret <4 x i32> %shuffle.i
2471 define <4 x float> @test_undef_vtrn2q_f32(<4 x float> %a) {
2472 ; CHECK-LABEL: test_undef_vtrn2q_f32:
2473 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2475 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2476 ret <4 x float> %shuffle.i
2479 define <8 x i8> @test_undef_vtrn2_p8(<8 x i8> %a) {
2480 ; CHECK-LABEL: test_undef_vtrn2_p8:
2481 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2483 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2484 ret <8 x i8> %shuffle.i
2487 define <16 x i8> @test_undef_vtrn2q_p8(<16 x i8> %a) {
2488 ; CHECK-LABEL: test_undef_vtrn2q_p8:
2489 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2491 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2492 ret <16 x i8> %shuffle.i
2495 define <4 x i16> @test_undef_vtrn2_p16(<4 x i16> %a) {
2496 ; CHECK-LABEL: test_undef_vtrn2_p16:
2497 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2499 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2500 ret <4 x i16> %shuffle.i
2503 define <8 x i16> @test_undef_vtrn2q_p16(<8 x i16> %a) {
2504 ; CHECK-LABEL: test_undef_vtrn2q_p16:
2505 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2507 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2508 ret <8 x i16> %shuffle.i
2511 define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) {
2512 ; CHECK-LABEL: test_vuzp_s8:
2513 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2514 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2516 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2517 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2518 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2519 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
2520 ret %struct.int8x8x2_t %.fca.0.1.insert
2523 define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) {
2524 ; CHECK-LABEL: test_vuzp_s16:
2525 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2526 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2528 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2529 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2530 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2531 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
2532 ret %struct.int16x4x2_t %.fca.0.1.insert
2535 define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) {
2536 ; CHECK-LABEL: test_vuzp_s32:
2537 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2538 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2539 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2540 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2542 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2543 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2544 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
2545 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
2546 ret %struct.int32x2x2_t %.fca.0.1.insert
2549 define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) {
2550 ; CHECK-LABEL: test_vuzp_u8:
2551 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2552 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2554 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2555 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2556 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2557 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
2558 ret %struct.uint8x8x2_t %.fca.0.1.insert
2561 define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) {
2562 ; CHECK-LABEL: test_vuzp_u16:
2563 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2564 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2566 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2567 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2568 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2569 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
2570 ret %struct.uint16x4x2_t %.fca.0.1.insert
2573 define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) {
2574 ; CHECK-LABEL: test_vuzp_u32:
2575 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2576 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2577 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2578 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2580 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2581 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2582 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
2583 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
2584 ret %struct.uint32x2x2_t %.fca.0.1.insert
2587 define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) {
2588 ; CHECK-LABEL: test_vuzp_f32:
2589 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2590 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2591 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2592 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2594 %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
2595 %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
2596 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vuzp.i, 0, 0
2597 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vuzp1.i, 0, 1
2598 ret %struct.float32x2x2_t %.fca.0.1.insert
2601 define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) {
2602 ; CHECK-LABEL: test_vuzp_p8:
2603 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2604 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2606 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2607 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2608 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2609 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
2610 ret %struct.poly8x8x2_t %.fca.0.1.insert
2613 define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) {
2614 ; CHECK-LABEL: test_vuzp_p16:
2615 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2616 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2618 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2619 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2620 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2621 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
2622 ret %struct.poly16x4x2_t %.fca.0.1.insert
2625 define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) {
2626 ; CHECK-LABEL: test_vuzpq_s8:
2627 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2628 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2630 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2631 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2632 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
2633 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
2634 ret %struct.int8x16x2_t %.fca.0.1.insert
2637 define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) {
2638 ; CHECK-LABEL: test_vuzpq_s16:
2639 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2640 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2642 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2643 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2644 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
2645 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
2646 ret %struct.int16x8x2_t %.fca.0.1.insert
2649 define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) {
2650 ; CHECK-LABEL: test_vuzpq_s32:
2651 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2652 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2654 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2655 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2656 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
2657 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
2658 ret %struct.int32x4x2_t %.fca.0.1.insert
2661 define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) {
2662 ; CHECK-LABEL: test_vuzpq_u8:
2663 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2664 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2666 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2667 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2668 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
2669 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
2670 ret %struct.uint8x16x2_t %.fca.0.1.insert
2673 define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) {
2674 ; CHECK-LABEL: test_vuzpq_u16:
2675 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2676 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2678 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2679 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2680 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
2681 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
2682 ret %struct.uint16x8x2_t %.fca.0.1.insert
2685 define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) {
2686 ; CHECK-LABEL: test_vuzpq_u32:
2687 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2688 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2690 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2691 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2692 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
2693 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
2694 ret %struct.uint32x4x2_t %.fca.0.1.insert
2697 define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) {
2698 ; CHECK-LABEL: test_vuzpq_f32:
2699 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2700 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2702 %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2703 %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2704 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vuzp.i, 0, 0
2705 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vuzp1.i, 0, 1
2706 ret %struct.float32x4x2_t %.fca.0.1.insert
2709 define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) {
2710 ; CHECK-LABEL: test_vuzpq_p8:
2711 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2712 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2714 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2715 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2716 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
2717 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
2718 ret %struct.poly8x16x2_t %.fca.0.1.insert
2721 define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) {
2722 ; CHECK-LABEL: test_vuzpq_p16:
2723 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2724 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2726 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2727 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2728 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
2729 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
2730 ret %struct.poly16x8x2_t %.fca.0.1.insert
2733 define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) {
2734 ; CHECK-LABEL: test_vzip_s8:
2735 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2736 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2738 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2739 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2740 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
2741 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
2742 ret %struct.int8x8x2_t %.fca.0.1.insert
2745 define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) {
2746 ; CHECK-LABEL: test_vzip_s16:
2747 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2748 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2750 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2751 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2752 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
2753 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
2754 ret %struct.int16x4x2_t %.fca.0.1.insert
2757 define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) {
2758 ; CHECK-LABEL: test_vzip_s32:
2759 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2760 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2761 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2762 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2764 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2765 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2766 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
2767 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
2768 ret %struct.int32x2x2_t %.fca.0.1.insert
2771 define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) {
2772 ; CHECK-LABEL: test_vzip_u8:
2773 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2774 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2776 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2777 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2778 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
2779 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
2780 ret %struct.uint8x8x2_t %.fca.0.1.insert
2783 define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) {
2784 ; CHECK-LABEL: test_vzip_u16:
2785 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2786 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2788 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2789 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2790 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
2791 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
2792 ret %struct.uint16x4x2_t %.fca.0.1.insert
2795 define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) {
2796 ; CHECK-LABEL: test_vzip_u32:
2797 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2798 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2799 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2800 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2802 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2803 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2804 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
2805 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
2806 ret %struct.uint32x2x2_t %.fca.0.1.insert
2809 define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) {
2810 ; CHECK-LABEL: test_vzip_f32:
2811 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2812 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2813 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2814 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2816 %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
2817 %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
2818 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vzip.i, 0, 0
2819 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vzip1.i, 0, 1
2820 ret %struct.float32x2x2_t %.fca.0.1.insert
2823 define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) {
2824 ; CHECK-LABEL: test_vzip_p8:
2825 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2826 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2828 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2829 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2830 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
2831 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
2832 ret %struct.poly8x8x2_t %.fca.0.1.insert
2835 define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) {
2836 ; CHECK-LABEL: test_vzip_p16:
2837 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2838 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2840 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2841 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2842 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
2843 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
2844 ret %struct.poly16x4x2_t %.fca.0.1.insert
2847 define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) {
2848 ; CHECK-LABEL: test_vzipq_s8:
2849 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2850 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2852 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2853 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2854 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
2855 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
2856 ret %struct.int8x16x2_t %.fca.0.1.insert
2859 define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) {
2860 ; CHECK-LABEL: test_vzipq_s16:
2861 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2862 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2864 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2865 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2866 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
2867 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
2868 ret %struct.int16x8x2_t %.fca.0.1.insert
2871 define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) {
2872 ; CHECK-LABEL: test_vzipq_s32:
2873 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2874 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2876 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2877 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2878 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
2879 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
2880 ret %struct.int32x4x2_t %.fca.0.1.insert
2883 define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) {
2884 ; CHECK-LABEL: test_vzipq_u8:
2885 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2886 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2888 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2889 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2890 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
2891 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
2892 ret %struct.uint8x16x2_t %.fca.0.1.insert
2895 define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) {
2896 ; CHECK-LABEL: test_vzipq_u16:
2897 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2898 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2900 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2901 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2902 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
2903 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
2904 ret %struct.uint16x8x2_t %.fca.0.1.insert
2907 define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) {
2908 ; CHECK-LABEL: test_vzipq_u32:
2909 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2910 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2912 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2913 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2914 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
2915 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
2916 ret %struct.uint32x4x2_t %.fca.0.1.insert
2919 define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) {
2920 ; CHECK-LABEL: test_vzipq_f32:
2921 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2922 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
2924 %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2925 %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2926 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vzip.i, 0, 0
2927 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vzip1.i, 0, 1
2928 ret %struct.float32x4x2_t %.fca.0.1.insert
2931 define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) {
2932 ; CHECK-LABEL: test_vzipq_p8:
2933 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2934 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
2936 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2937 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2938 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
2939 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
2940 ret %struct.poly8x16x2_t %.fca.0.1.insert
2943 define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) {
2944 ; CHECK-LABEL: test_vzipq_p16:
2945 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2946 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
2948 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2949 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2950 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
2951 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
2952 ret %struct.poly16x8x2_t %.fca.0.1.insert
2955 define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) {
2956 ; CHECK-LABEL: test_vtrn_s8:
2957 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2958 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2960 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2961 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2962 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
2963 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
2964 ret %struct.int8x8x2_t %.fca.0.1.insert
2967 define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) {
2968 ; CHECK-LABEL: test_vtrn_s16:
2969 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2970 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
2972 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2973 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2974 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
2975 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
2976 ret %struct.int16x4x2_t %.fca.0.1.insert
2979 define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) {
2980 ; CHECK-LABEL: test_vtrn_s32:
2981 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
2982 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
2983 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2984 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
2986 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
2987 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
2988 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
2989 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
2990 ret %struct.int32x2x2_t %.fca.0.1.insert
2993 define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) {
2994 ; CHECK-LABEL: test_vtrn_u8:
2995 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2996 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
2998 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2999 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3000 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
3001 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
3002 ret %struct.uint8x8x2_t %.fca.0.1.insert
3005 define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) {
3006 ; CHECK-LABEL: test_vtrn_u16:
3007 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
3008 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
3010 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3011 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3012 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
3013 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
3014 ret %struct.uint16x4x2_t %.fca.0.1.insert
3017 define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) {
3018 ; CHECK-LABEL: test_vtrn_u32:
3019 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
3020 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
3021 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
3022 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
3024 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
3025 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
3026 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
3027 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
3028 ret %struct.uint32x2x2_t %.fca.0.1.insert
3031 define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) {
3032 ; CHECK-LABEL: test_vtrn_f32:
3033 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[1], {{v[0-9]+}}.s[0]
3034 ; CHECK-AARCH64: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
3035 ; CHECK-ARM64: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
3036 ; CHECK-ARM64: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
3038 %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
3039 %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
3040 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vtrn.i, 0, 0
3041 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vtrn1.i, 0, 1
3042 ret %struct.float32x2x2_t %.fca.0.1.insert
3045 define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) {
3046 ; CHECK-LABEL: test_vtrn_p8:
3047 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
3048 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
3050 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3051 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3052 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
3053 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
3054 ret %struct.poly8x8x2_t %.fca.0.1.insert
3057 define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) {
3058 ; CHECK-LABEL: test_vtrn_p16:
3059 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
3060 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
3062 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3063 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3064 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
3065 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
3066 ret %struct.poly16x4x2_t %.fca.0.1.insert
3069 define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) {
3070 ; CHECK-LABEL: test_vtrnq_s8:
3071 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3072 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3074 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3075 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3076 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3077 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3078 ret %struct.int8x16x2_t %.fca.0.1.insert
3081 define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) {
3082 ; CHECK-LABEL: test_vtrnq_s16:
3083 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3084 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3086 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3087 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3088 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3089 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3090 ret %struct.int16x8x2_t %.fca.0.1.insert
3093 define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) {
3094 ; CHECK-LABEL: test_vtrnq_s32:
3095 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3096 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3098 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3099 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3100 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
3101 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
3102 ret %struct.int32x4x2_t %.fca.0.1.insert
3105 define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) {
3106 ; CHECK-LABEL: test_vtrnq_u8:
3107 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3108 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3110 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3111 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3112 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3113 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3114 ret %struct.uint8x16x2_t %.fca.0.1.insert
3117 define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) {
3118 ; CHECK-LABEL: test_vtrnq_u16:
3119 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3120 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3122 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3123 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3124 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3125 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3126 ret %struct.uint16x8x2_t %.fca.0.1.insert
3129 define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) {
3130 ; CHECK-LABEL: test_vtrnq_u32:
3131 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3132 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3134 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3135 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3136 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
3137 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
3138 ret %struct.uint32x4x2_t %.fca.0.1.insert
3141 define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) {
3142 ; CHECK-LABEL: test_vtrnq_f32:
3143 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3144 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
3146 %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3147 %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3148 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vtrn.i, 0, 0
3149 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vtrn1.i, 0, 1
3150 ret %struct.float32x4x2_t %.fca.0.1.insert
3153 define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) {
3154 ; CHECK-LABEL: test_vtrnq_p8:
3155 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3156 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
3158 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3159 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3160 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3161 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3162 ret %struct.poly8x16x2_t %.fca.0.1.insert
3165 define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) {
3166 ; CHECK-LABEL: test_vtrnq_p16:
3167 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3168 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
3170 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3171 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3172 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3173 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3174 ret %struct.poly16x8x2_t %.fca.0.1.insert
3177 define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) {
3178 ; CHECK-LABEL: test_uzp:
3180 %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3181 %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3182 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
3183 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
3184 ret %struct.uint8x8x2_t %.fca.0.1.insert
3186 ; CHECK-AARCH64: dup {{d[0-9]+}}, {{v[0-9]+}}.d[1]
3187 ; CHECK-AARCH64-NEXT: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
3188 ; CHECK-AARCH64-NEXT: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b