1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s
3 define <8x i8> @test_select_cc_v8i8_i8(i8 %a, i8 %b, <8x i8> %c, <8x i8> %d ) {
4 ; CHECK-LABEL: test_select_cc_v8i8_i8:
5 ; CHECK: and w0, w0, #0xff
6 ; CHECK-NEXT: cmp w0, w1, uxtb
7 ; CHECK-NEXT: csinv w0, wzr, wzr, ne
8 ; CHECK-NEXT: dup v{{[0-9]+}}.8b, w0
9 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v0.8b, v1.8b
10 %cmp31 = icmp eq i8 %a, %b
11 %e = select i1 %cmp31, <8x i8> %c, <8x i8> %d
15 define <8x i8> @test_select_cc_v8i8_f32(float %a, float %b, <8x i8> %c, <8x i8> %d ) {
16 ; CHECK-LABEL: test_select_cc_v8i8_f32:
17 ; CHECK: fcmeq v{{[0-9]+}}.4s, v0.4s, v1.4s
18 ; CHECK-NEXT: dup v{{[0-9]+}}.2s, v{{[0-9]+}}.s[0]
19 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v2.8b, v3.8b
20 %cmp31 = fcmp oeq float %a, %b
21 %e = select i1 %cmp31, <8x i8> %c, <8x i8> %d
25 define <8x i8> @test_select_cc_v8i8_f64(double %a, double %b, <8x i8> %c, <8x i8> %d ) {
26 ; CHECK-LABEL: test_select_cc_v8i8_f64:
27 ; CHECK: fcmeq v{{[0-9]+}}.2d, v0.2d, v1.2d
28 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v2.8b, v3.8b
29 %cmp31 = fcmp oeq double %a, %b
30 %e = select i1 %cmp31, <8x i8> %c, <8x i8> %d
34 define <16x i8> @test_select_cc_v16i8_i8(i8 %a, i8 %b, <16x i8> %c, <16x i8> %d ) {
35 ; CHECK-LABEL: test_select_cc_v16i8_i8:
36 ; CHECK: and w0, w0, #0xff
37 ; CHECK-NEXT: cmp w0, w1, uxtb
38 ; CHECK-NEXT: csinv w0, wzr, wzr, ne
39 ; CHECK-NEXT: dup v{{[0-9]+}}.16b, w0
40 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v0.16b, v1.16b
41 %cmp31 = icmp eq i8 %a, %b
42 %e = select i1 %cmp31, <16x i8> %c, <16x i8> %d
46 define <16x i8> @test_select_cc_v16i8_f32(float %a, float %b, <16x i8> %c, <16x i8> %d ) {
47 ; CHECK-LABEL: test_select_cc_v16i8_f32:
48 ; CHECK: fcmeq v{{[0-9]+}}.4s, v0.4s, v1.4s
49 ; CHECK-NEXT: dup v{{[0-9]+}}.4s, v{{[0-9]+}}.s[0]
50 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v2.16b, v3.16b
51 %cmp31 = fcmp oeq float %a, %b
52 %e = select i1 %cmp31, <16x i8> %c, <16x i8> %d
56 define <16x i8> @test_select_cc_v16i8_f64(double %a, double %b, <16x i8> %c, <16x i8> %d ) {
57 ; CHECK-LABEL: test_select_cc_v16i8_f64:
58 ; CHECK: fcmeq v{{[0-9]+}}.2d, v0.2d, v1.2d
59 ; CHECK-NEXT: dup v{{[0-9]+}}.2d, v{{[0-9]+}}.d[0]
60 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v2.16b, v3.16b
61 %cmp31 = fcmp oeq double %a, %b
62 %e = select i1 %cmp31, <16x i8> %c, <16x i8> %d
66 define <4x i16> @test_select_cc_v4i16(i16 %a, i16 %b, <4x i16> %c, <4x i16> %d ) {
67 ; CHECK-LABEL: test_select_cc_v4i16:
68 ; CHECK: and w0, w0, #0xffff
69 ; CHECK-NEXT: cmp w0, w1, uxth
70 ; CHECK-NEXT: csinv w0, wzr, wzr, ne
71 ; CHECK-NEXT: dup v{{[0-9]+}}.4h, w0
72 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v0.8b, v1.8b
73 %cmp31 = icmp eq i16 %a, %b
74 %e = select i1 %cmp31, <4x i16> %c, <4x i16> %d
78 define <8x i16> @test_select_cc_v8i16(i16 %a, i16 %b, <8x i16> %c, <8x i16> %d ) {
79 ; CHECK-LABEL: test_select_cc_v8i16:
80 ; CHECK: and w0, w0, #0xffff
81 ; CHECK-NEXT: cmp w0, w1, uxth
82 ; CHECK-NEXT: csinv w0, wzr, wzr, ne
83 ; CHECK-NEXT: dup v{{[0-9]+}}.8h, w0
84 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v0.16b, v1.16b
85 %cmp31 = icmp eq i16 %a, %b
86 %e = select i1 %cmp31, <8x i16> %c, <8x i16> %d
90 define <2x i32> @test_select_cc_v2i32(i32 %a, i32 %b, <2x i32> %c, <2x i32> %d ) {
91 ; CHECK-LABEL: test_select_cc_v2i32:
92 ; CHECK: cmp w0, w1, uxtw
93 ; CHECK-NEXT: csinv w0, wzr, wzr, ne
94 ; CHECK-NEXT: dup v{{[0-9]+}}.2s, w0
95 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v0.8b, v1.8b
96 %cmp31 = icmp eq i32 %a, %b
97 %e = select i1 %cmp31, <2x i32> %c, <2x i32> %d
101 define <4x i32> @test_select_cc_v4i32(i32 %a, i32 %b, <4x i32> %c, <4x i32> %d ) {
102 ; CHECK-LABEL: test_select_cc_v4i32:
103 ; CHECK: cmp w0, w1, uxtw
104 ; CHECK-NEXT: csinv w0, wzr, wzr, ne
105 ; CHECK-NEXT: dup v{{[0-9]+}}.4s, w0
106 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v0.16b, v1.16b
107 %cmp31 = icmp eq i32 %a, %b
108 %e = select i1 %cmp31, <4x i32> %c, <4x i32> %d
112 define <1x i64> @test_select_cc_v1i64(i64 %a, i64 %b, <1x i64> %c, <1x i64> %d ) {
113 ; CHECK-LABEL: test_select_cc_v1i64:
115 ; CHECK-NEXT: csinv x0, xzr, xzr, ne
116 ; CHECK-NEXT: fmov d{{[0-9]+}}, x0
117 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v0.8b, v1.8b
118 %cmp31 = icmp eq i64 %a, %b
119 %e = select i1 %cmp31, <1x i64> %c, <1x i64> %d
123 define <2x i64> @test_select_cc_v2i64(i64 %a, i64 %b, <2x i64> %c, <2x i64> %d ) {
124 ; CHECK-LABEL: test_select_cc_v2i64:
126 ; CHECK-NEXT: csinv x0, xzr, xzr, ne
127 ; CHECK-NEXT: dup v{{[0-9]+}}.2d, x0
128 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v0.16b, v1.16b
129 %cmp31 = icmp eq i64 %a, %b
130 %e = select i1 %cmp31, <2x i64> %c, <2x i64> %d
134 define <1 x float> @test_select_cc_v1f32(float %a, float %b, <1 x float> %c, <1 x float> %d ) {
135 ; CHECK-LABEL: test_select_cc_v1f32:
137 ; CHECK-NEXT: fcsel s0, s2, s3, eq
138 %cmp31 = fcmp oeq float %a, %b
139 %e = select i1 %cmp31, <1 x float> %c, <1 x float> %d
143 define <2 x float> @test_select_cc_v2f32(float %a, float %b, <2 x float> %c, <2 x float> %d ) {
144 ; CHECK-LABEL: test_select_cc_v2f32:
145 ; CHECK: fcmeq v{{[0-9]+}}.4s, v0.4s, v1.4s
146 ; CHECK-NEXT: dup v{{[0-9]+}}.2s, v{{[0-9]+}}.s[0]
147 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v2.8b, v3.8b
148 %cmp31 = fcmp oeq float %a, %b
149 %e = select i1 %cmp31, <2 x float> %c, <2 x float> %d
153 define <4x float> @test_select_cc_v4f32(float %a, float %b, <4x float> %c, <4x float> %d ) {
154 ; CHECK-LABEL: test_select_cc_v4f32:
155 ; CHECK: fcmeq v{{[0-9]+}}.4s, v0.4s, v1.4s
156 ; CHECK-NEXT: dup v{{[0-9]+}}.4s, v{{[0-9]+}}.s[0]
157 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v2.16b, v3.16b
158 %cmp31 = fcmp oeq float %a, %b
159 %e = select i1 %cmp31, <4x float> %c, <4x float> %d
163 define <1 x double> @test_select_cc_v1f64(double %a, double %b, <1 x double> %c, <1 x double> %d ) {
164 ; CHECK-LABEL: test_select_cc_v1f64:
165 ; CHECK: fcmeq v{{[0-9]+}}.2d, v0.2d, v1.2d
166 ; CHECK-NEXT: bsl v{{[0-9]+}}.8b, v2.8b, v3.8b
167 %cmp31 = fcmp oeq double %a, %b
168 %e = select i1 %cmp31, <1 x double> %c, <1 x double> %d
172 define <2 x double> @test_select_cc_v2f64(double %a, double %b, <2 x double> %c, <2 x double> %d ) {
173 ; CHECK-LABEL: test_select_cc_v2f64:
174 ; CHECK: fcmeq v{{[0-9]+}}.2d, v0.2d, v1.2d
175 ; CHECK-NEXT: dup v{{[0-9]+}}.2d, v{{[0-9]+}}.d[0]
176 ; CHECK-NEXT: bsl v{{[0-9]+}}.16b, v2.16b, v3.16b
177 %cmp31 = fcmp oeq double %a, %b
178 %e = select i1 %cmp31, <2 x double> %c, <2 x double> %d