1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
2 ; arm64 has all tests not involving v1iN.
4 define <8 x i8> @shl.v8i8(<8 x i8> %a, <8 x i8> %b) {
5 ; CHECK-LABEL: shl.v8i8:
6 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
7 %c = shl <8 x i8> %a, %b
11 define <4 x i16> @shl.v4i16(<4 x i16> %a, <4 x i16> %b) {
12 ; CHECK-LABEL: shl.v4i16:
13 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
14 %c = shl <4 x i16> %a, %b
18 define <2 x i32> @shl.v2i32(<2 x i32> %a, <2 x i32> %b) {
19 ; CHECK-LABEL: shl.v2i32:
20 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
21 %c = shl <2 x i32> %a, %b
25 define <1 x i64> @shl.v1i64(<1 x i64> %a, <1 x i64> %b) {
26 ; CHECK-LABEL: shl.v1i64:
27 ; CHECK: ushl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
28 %c = shl <1 x i64> %a, %b
32 define <16 x i8> @shl.v16i8(<16 x i8> %a, <16 x i8> %b) {
33 ; CHECK-LABEL: shl.v16i8:
34 ; CHECK: ushl v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
35 %c = shl <16 x i8> %a, %b
39 define <8 x i16> @shl.v8i16(<8 x i16> %a, <8 x i16> %b) {
40 ; CHECK-LABEL: shl.v8i16:
41 ; CHECK: ushl v{{[0-9]+}}.8h, v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
42 %c = shl <8 x i16> %a, %b
46 define <4 x i32> @shl.v4i32(<4 x i32> %a, <4 x i32> %b) {
47 ; CHECK-LABEL: shl.v4i32:
48 ; CHECK: ushl v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
49 %c = shl <4 x i32> %a, %b
53 define <2 x i64> @shl.v2i64(<2 x i64> %a, <2 x i64> %b) {
54 ; CHECK-LABEL: shl.v2i64:
55 ; CHECK: ushl v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
56 %c = shl <2 x i64> %a, %b
60 define <8 x i8> @lshr.v8i8(<8 x i8> %a, <8 x i8> %b) {
61 ; CHECK-LABEL: lshr.v8i8:
62 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
63 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
64 %c = lshr <8 x i8> %a, %b
68 define <4 x i16> @lshr.v4i16(<4 x i16> %a, <4 x i16> %b) {
69 ; CHECK-LABEL: lshr.v4i16:
70 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
71 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
72 %c = lshr <4 x i16> %a, %b
76 define <2 x i32> @lshr.v2i32(<2 x i32> %a, <2 x i32> %b) {
77 ; CHECK-LABEL: lshr.v2i32:
78 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
79 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
80 %c = lshr <2 x i32> %a, %b
84 define <1 x i64> @lshr.v1i64(<1 x i64> %a, <1 x i64> %b) {
85 ; CHECK-LABEL: lshr.v1i64:
86 ; CHECK: neg d{{[0-9]+}}, d{{[0-9]+}}
87 ; CHECK: ushl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
88 %c = lshr <1 x i64> %a, %b
92 define <16 x i8> @lshr.v16i8(<16 x i8> %a, <16 x i8> %b) {
93 ; CHECK-LABEL: lshr.v16i8:
94 ; CHECK: neg v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
95 ; CHECK: ushl v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
96 %c = lshr <16 x i8> %a, %b
100 define <8 x i16> @lshr.v8i16(<8 x i16> %a, <8 x i16> %b) {
101 ; CHECK-LABEL: lshr.v8i16:
102 ; CHECK: neg v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
103 ; CHECK: ushl v{{[0-9]+}}.8h, v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
104 %c = lshr <8 x i16> %a, %b
108 define <4 x i32> @lshr.v4i32(<4 x i32> %a, <4 x i32> %b) {
109 ; CHECK-LABEL: lshr.v4i32:
110 ; CHECK: neg v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
111 ; CHECK: ushl v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
112 %c = lshr <4 x i32> %a, %b
116 define <2 x i64> @lshr.v2i64(<2 x i64> %a, <2 x i64> %b) {
117 ; CHECK-LABEL: lshr.v2i64:
118 ; CHECK: neg v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
119 ; CHECK: ushl v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
120 %c = lshr <2 x i64> %a, %b
124 define <8 x i8> @ashr.v8i8(<8 x i8> %a, <8 x i8> %b) {
125 ; CHECK-LABEL: ashr.v8i8:
126 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
127 ; CHECK: sshl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
128 %c = ashr <8 x i8> %a, %b
132 define <4 x i16> @ashr.v4i16(<4 x i16> %a, <4 x i16> %b) {
133 ; CHECK-LABEL: ashr.v4i16:
134 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
135 ; CHECK: sshl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
136 %c = ashr <4 x i16> %a, %b
140 define <2 x i32> @ashr.v2i32(<2 x i32> %a, <2 x i32> %b) {
141 ; CHECK-LABEL: ashr.v2i32:
142 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
143 ; CHECK: sshl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
144 %c = ashr <2 x i32> %a, %b
148 define <1 x i64> @ashr.v1i64(<1 x i64> %a, <1 x i64> %b) {
149 ; CHECK-LABEL: ashr.v1i64:
150 ; CHECK: neg d{{[0-9]+}}, d{{[0-9]+}}
151 ; CHECK: sshl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
152 %c = ashr <1 x i64> %a, %b
156 define <16 x i8> @ashr.v16i8(<16 x i8> %a, <16 x i8> %b) {
157 ; CHECK-LABEL: ashr.v16i8:
158 ; CHECK: neg v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
159 ; CHECK: sshl v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
160 %c = ashr <16 x i8> %a, %b
164 define <8 x i16> @ashr.v8i16(<8 x i16> %a, <8 x i16> %b) {
165 ; CHECK-LABEL: ashr.v8i16:
166 ; CHECK: neg v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
167 ; CHECK: sshl v{{[0-9]+}}.8h, v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
168 %c = ashr <8 x i16> %a, %b
172 define <4 x i32> @ashr.v4i32(<4 x i32> %a, <4 x i32> %b) {
173 ; CHECK-LABEL: ashr.v4i32:
174 ; CHECK: neg v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
175 ; CHECK: sshl v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
176 %c = ashr <4 x i32> %a, %b
180 define <2 x i64> @ashr.v2i64(<2 x i64> %a, <2 x i64> %b) {
181 ; CHECK-LABEL: ashr.v2i64:
182 ; CHECK: neg v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
183 ; CHECK: sshl v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
184 %c = ashr <2 x i64> %a, %b
188 define <1 x i64> @shl.v1i64.0(<1 x i64> %a) {
189 ; CHECK-LABEL: shl.v1i64.0:
190 ; CHECK-NOT: shl d{{[0-9]+}}, d{{[0-9]+}}, #0
191 %c = shl <1 x i64> %a, zeroinitializer
195 define <2 x i32> @shl.v2i32.0(<2 x i32> %a) {
196 ; CHECK-LABEL: shl.v2i32.0:
197 ; CHECK-NOT: shl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #0
198 %c = shl <2 x i32> %a, zeroinitializer
202 ; The following test cases test shl/ashr/lshr with v1i8/v1i16/v1i32 types
204 define <1 x i8> @shl.v1i8(<1 x i8> %a, <1 x i8> %b) {
205 ; CHECK-LABEL: shl.v1i8:
206 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
207 %c = shl <1 x i8> %a, %b
211 define <1 x i16> @shl.v1i16(<1 x i16> %a, <1 x i16> %b) {
212 ; CHECK-LABEL: shl.v1i16:
213 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
214 %c = shl <1 x i16> %a, %b
218 define <1 x i32> @shl.v1i32(<1 x i32> %a, <1 x i32> %b) {
219 ; CHECK-LABEL: shl.v1i32:
220 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
221 %c = shl <1 x i32> %a, %b
225 define <1 x i8> @ashr.v1i8(<1 x i8> %a, <1 x i8> %b) {
226 ; CHECK-LABEL: ashr.v1i8:
227 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
228 ; CHECK: sshl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
229 %c = ashr <1 x i8> %a, %b
233 define <1 x i16> @ashr.v1i16(<1 x i16> %a, <1 x i16> %b) {
234 ; CHECK-LABEL: ashr.v1i16:
235 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
236 ; CHECK: sshl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
237 %c = ashr <1 x i16> %a, %b
241 define <1 x i32> @ashr.v1i32(<1 x i32> %a, <1 x i32> %b) {
242 ; CHECK-LABEL: ashr.v1i32:
243 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
244 ; CHECK: sshl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
245 %c = ashr <1 x i32> %a, %b
249 define <1 x i8> @lshr.v1i8(<1 x i8> %a, <1 x i8> %b) {
250 ; CHECK-LABEL: lshr.v1i8:
251 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
252 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
253 %c = lshr <1 x i8> %a, %b
257 define <1 x i16> @lshr.v1i16(<1 x i16> %a, <1 x i16> %b) {
258 ; CHECK-LABEL: lshr.v1i16:
259 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
260 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
261 %c = lshr <1 x i16> %a, %b
265 define <1 x i32> @lshr.v1i32(<1 x i32> %a, <1 x i32> %b) {
266 ; CHECK-LABEL: lshr.v1i32:
267 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
268 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
269 %c = lshr <1 x i32> %a, %b
273 define <1 x i8> @shl.v1i8.imm(<1 x i8> %a) {
274 ; CHECK-LABEL: shl.v1i8.imm:
275 ; CHECK: shl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, #3
276 %c = shl <1 x i8> %a, <i8 3>
280 define <1 x i16> @shl.v1i16.imm(<1 x i16> %a) {
281 ; CHECK-LABEL: shl.v1i16.imm:
282 ; CHECK: shl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, #5
283 %c = shl <1 x i16> %a, <i16 5>
287 define <1 x i32> @shl.v1i32.imm(<1 x i32> %a) {
288 ; CHECK-LABEL: shl.v1i32.imm:
289 ; CHECK-NOT: shl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #0
290 %c = shl <1 x i32> %a, zeroinitializer
294 define <1 x i8> @ashr.v1i8.imm(<1 x i8> %a) {
295 ; CHECK-LABEL: ashr.v1i8.imm:
296 ; CHECK: sshr v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, #3
297 %c = ashr <1 x i8> %a, <i8 3>
301 define <1 x i16> @ashr.v1i16.imm(<1 x i16> %a) {
302 ; CHECK-LABEL: ashr.v1i16.imm:
303 ; CHECK: sshr v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, #10
304 %c = ashr <1 x i16> %a, <i16 10>
308 define <1 x i32> @ashr.v1i32.imm(<1 x i32> %a) {
309 ; CHECK-LABEL: ashr.v1i32.imm:
310 ; CHECK: sshr v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #31
311 %c = ashr <1 x i32> %a, <i32 31>
315 define <1 x i8> @lshr.v1i8.imm(<1 x i8> %a) {
316 ; CHECK-LABEL: lshr.v1i8.imm:
317 ; CHECK: ushr v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, #3
318 %c = lshr <1 x i8> %a, <i8 3>
322 define <1 x i16> @lshr.v1i16.imm(<1 x i16> %a) {
323 ; CHECK-LABEL: lshr.v1i16.imm:
324 ; CHECK: ushr v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, #10
325 %c = lshr <1 x i16> %a, <i16 10>
329 define <1 x i32> @lshr.v1i32.imm(<1 x i32> %a) {
330 ; CHECK-LABEL: lshr.v1i32.imm:
331 ; CHECK: ushr v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #31
332 %c = lshr <1 x i32> %a, <i32 31>