1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
3 define <8 x i8> @shl.v8i8(<8 x i8> %a, <8 x i8> %b) {
4 ; CHECK-LABEL: shl.v8i8:
5 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
6 %c = shl <8 x i8> %a, %b
10 define <4 x i16> @shl.v4i16(<4 x i16> %a, <4 x i16> %b) {
11 ; CHECK-LABEL: shl.v4i16:
12 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
13 %c = shl <4 x i16> %a, %b
17 define <2 x i32> @shl.v2i32(<2 x i32> %a, <2 x i32> %b) {
18 ; CHECK-LABEL: shl.v2i32:
19 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
20 %c = shl <2 x i32> %a, %b
24 define <1 x i64> @shl.v1i64(<1 x i64> %a, <1 x i64> %b) {
25 ; CHECK-LABEL: shl.v1i64:
26 ; CHECK: ushl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
27 %c = shl <1 x i64> %a, %b
31 define <16 x i8> @shl.v16i8(<16 x i8> %a, <16 x i8> %b) {
32 ; CHECK-LABEL: shl.v16i8:
33 ; CHECK: ushl v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
34 %c = shl <16 x i8> %a, %b
38 define <8 x i16> @shl.v8i16(<8 x i16> %a, <8 x i16> %b) {
39 ; CHECK-LABEL: shl.v8i16:
40 ; CHECK: ushl v{{[0-9]+}}.8h, v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
41 %c = shl <8 x i16> %a, %b
45 define <4 x i32> @shl.v4i32(<4 x i32> %a, <4 x i32> %b) {
46 ; CHECK-LABEL: shl.v4i32:
47 ; CHECK: ushl v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
48 %c = shl <4 x i32> %a, %b
52 define <2 x i64> @shl.v2i64(<2 x i64> %a, <2 x i64> %b) {
53 ; CHECK-LABEL: shl.v2i64:
54 ; CHECK: ushl v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
55 %c = shl <2 x i64> %a, %b
59 define <8 x i8> @lshr.v8i8(<8 x i8> %a, <8 x i8> %b) {
60 ; CHECK-LABEL: lshr.v8i8:
61 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
62 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
63 %c = lshr <8 x i8> %a, %b
67 define <4 x i16> @lshr.v4i16(<4 x i16> %a, <4 x i16> %b) {
68 ; CHECK-LABEL: lshr.v4i16:
69 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
70 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
71 %c = lshr <4 x i16> %a, %b
75 define <2 x i32> @lshr.v2i32(<2 x i32> %a, <2 x i32> %b) {
76 ; CHECK-LABEL: lshr.v2i32:
77 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
78 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
79 %c = lshr <2 x i32> %a, %b
83 define <1 x i64> @lshr.v1i64(<1 x i64> %a, <1 x i64> %b) {
84 ; CHECK-LABEL: lshr.v1i64:
85 ; CHECK: neg d{{[0-9]+}}, d{{[0-9]+}}
86 ; CHECK: ushl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
87 %c = lshr <1 x i64> %a, %b
91 define <16 x i8> @lshr.v16i8(<16 x i8> %a, <16 x i8> %b) {
92 ; CHECK-LABEL: lshr.v16i8:
93 ; CHECK: neg v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
94 ; CHECK: ushl v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
95 %c = lshr <16 x i8> %a, %b
99 define <8 x i16> @lshr.v8i16(<8 x i16> %a, <8 x i16> %b) {
100 ; CHECK-LABEL: lshr.v8i16:
101 ; CHECK: neg v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
102 ; CHECK: ushl v{{[0-9]+}}.8h, v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
103 %c = lshr <8 x i16> %a, %b
107 define <4 x i32> @lshr.v4i32(<4 x i32> %a, <4 x i32> %b) {
108 ; CHECK-LABEL: lshr.v4i32:
109 ; CHECK: neg v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
110 ; CHECK: ushl v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
111 %c = lshr <4 x i32> %a, %b
115 define <2 x i64> @lshr.v2i64(<2 x i64> %a, <2 x i64> %b) {
116 ; CHECK-LABEL: lshr.v2i64:
117 ; CHECK: neg v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
118 ; CHECK: ushl v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
119 %c = lshr <2 x i64> %a, %b
123 define <8 x i8> @ashr.v8i8(<8 x i8> %a, <8 x i8> %b) {
124 ; CHECK-LABEL: ashr.v8i8:
125 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
126 ; CHECK: sshl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
127 %c = ashr <8 x i8> %a, %b
131 define <4 x i16> @ashr.v4i16(<4 x i16> %a, <4 x i16> %b) {
132 ; CHECK-LABEL: ashr.v4i16:
133 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
134 ; CHECK: sshl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
135 %c = ashr <4 x i16> %a, %b
139 define <2 x i32> @ashr.v2i32(<2 x i32> %a, <2 x i32> %b) {
140 ; CHECK-LABEL: ashr.v2i32:
141 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
142 ; CHECK: sshl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
143 %c = ashr <2 x i32> %a, %b
147 define <1 x i64> @ashr.v1i64(<1 x i64> %a, <1 x i64> %b) {
148 ; CHECK-LABEL: ashr.v1i64:
149 ; CHECK: neg d{{[0-9]+}}, d{{[0-9]+}}
150 ; CHECK: sshl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
151 %c = ashr <1 x i64> %a, %b
155 define <16 x i8> @ashr.v16i8(<16 x i8> %a, <16 x i8> %b) {
156 ; CHECK-LABEL: ashr.v16i8:
157 ; CHECK: neg v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
158 ; CHECK: sshl v{{[0-9]+}}.16b, v{{[0-9]+}}.16b, v{{[0-9]+}}.16b
159 %c = ashr <16 x i8> %a, %b
163 define <8 x i16> @ashr.v8i16(<8 x i16> %a, <8 x i16> %b) {
164 ; CHECK-LABEL: ashr.v8i16:
165 ; CHECK: neg v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
166 ; CHECK: sshl v{{[0-9]+}}.8h, v{{[0-9]+}}.8h, v{{[0-9]+}}.8h
167 %c = ashr <8 x i16> %a, %b
171 define <4 x i32> @ashr.v4i32(<4 x i32> %a, <4 x i32> %b) {
172 ; CHECK-LABEL: ashr.v4i32:
173 ; CHECK: neg v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
174 ; CHECK: sshl v{{[0-9]+}}.4s, v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
175 %c = ashr <4 x i32> %a, %b
179 define <2 x i64> @ashr.v2i64(<2 x i64> %a, <2 x i64> %b) {
180 ; CHECK-LABEL: ashr.v2i64:
181 ; CHECK: neg v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
182 ; CHECK: sshl v{{[0-9]+}}.2d, v{{[0-9]+}}.2d, v{{[0-9]+}}.2d
183 %c = ashr <2 x i64> %a, %b
187 define <1 x i64> @shl.v1i64.0(<1 x i64> %a) {
188 ; CHECK-LABEL: shl.v1i64.0:
189 ; CHECK-NOT: shl d{{[0-9]+}}, d{{[0-9]+}}, #0
190 %c = shl <1 x i64> %a, zeroinitializer
194 define <2 x i32> @shl.v2i32.0(<2 x i32> %a) {
195 ; CHECK-LABEL: shl.v2i32.0:
196 ; CHECK-NOT: shl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #0
197 %c = shl <2 x i32> %a, zeroinitializer
201 ; The following test cases test shl/ashr/lshr with v1i8/v1i16/v1i32 types
203 define <1 x i8> @shl.v1i8(<1 x i8> %a, <1 x i8> %b) {
204 ; CHECK-LABEL: shl.v1i8:
205 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
206 %c = shl <1 x i8> %a, %b
210 define <1 x i16> @shl.v1i16(<1 x i16> %a, <1 x i16> %b) {
211 ; CHECK-LABEL: shl.v1i16:
212 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
213 %c = shl <1 x i16> %a, %b
217 define <1 x i32> @shl.v1i32(<1 x i32> %a, <1 x i32> %b) {
218 ; CHECK-LABEL: shl.v1i32:
219 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
220 %c = shl <1 x i32> %a, %b
224 define <1 x i8> @ashr.v1i8(<1 x i8> %a, <1 x i8> %b) {
225 ; CHECK-LABEL: ashr.v1i8:
226 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
227 ; CHECK: sshl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
228 %c = ashr <1 x i8> %a, %b
232 define <1 x i16> @ashr.v1i16(<1 x i16> %a, <1 x i16> %b) {
233 ; CHECK-LABEL: ashr.v1i16:
234 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
235 ; CHECK: sshl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
236 %c = ashr <1 x i16> %a, %b
240 define <1 x i32> @ashr.v1i32(<1 x i32> %a, <1 x i32> %b) {
241 ; CHECK-LABEL: ashr.v1i32:
242 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
243 ; CHECK: sshl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
244 %c = ashr <1 x i32> %a, %b
248 define <1 x i8> @lshr.v1i8(<1 x i8> %a, <1 x i8> %b) {
249 ; CHECK-LABEL: lshr.v1i8:
250 ; CHECK: neg v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
251 ; CHECK: ushl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
252 %c = lshr <1 x i8> %a, %b
256 define <1 x i16> @lshr.v1i16(<1 x i16> %a, <1 x i16> %b) {
257 ; CHECK-LABEL: lshr.v1i16:
258 ; CHECK: neg v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
259 ; CHECK: ushl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, v{{[0-9]+}}.4h
260 %c = lshr <1 x i16> %a, %b
264 define <1 x i32> @lshr.v1i32(<1 x i32> %a, <1 x i32> %b) {
265 ; CHECK-LABEL: lshr.v1i32:
266 ; CHECK: neg v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
267 ; CHECK: ushl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
268 %c = lshr <1 x i32> %a, %b
272 define <1 x i8> @shl.v1i8.imm(<1 x i8> %a) {
273 ; CHECK-LABEL: shl.v1i8.imm:
274 ; CHECK: shl v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, #3
275 %c = shl <1 x i8> %a, <i8 3>
279 define <1 x i16> @shl.v1i16.imm(<1 x i16> %a) {
280 ; CHECK-LABEL: shl.v1i16.imm:
281 ; CHECK: shl v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, #5
282 %c = shl <1 x i16> %a, <i16 5>
286 define <1 x i32> @shl.v1i32.imm(<1 x i32> %a) {
287 ; CHECK-LABEL: shl.v1i32.imm:
288 ; CHECK-NOT: shl v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #0
289 %c = shl <1 x i32> %a, zeroinitializer
293 define <1 x i8> @ashr.v1i8.imm(<1 x i8> %a) {
294 ; CHECK-LABEL: ashr.v1i8.imm:
295 ; CHECK: sshr v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, #3
296 %c = ashr <1 x i8> %a, <i8 3>
300 define <1 x i16> @ashr.v1i16.imm(<1 x i16> %a) {
301 ; CHECK-LABEL: ashr.v1i16.imm:
302 ; CHECK: sshr v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, #10
303 %c = ashr <1 x i16> %a, <i16 10>
307 define <1 x i32> @ashr.v1i32.imm(<1 x i32> %a) {
308 ; CHECK-LABEL: ashr.v1i32.imm:
309 ; CHECK: sshr v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #31
310 %c = ashr <1 x i32> %a, <i32 31>
314 define <1 x i8> @lshr.v1i8.imm(<1 x i8> %a) {
315 ; CHECK-LABEL: lshr.v1i8.imm:
316 ; CHECK: ushr v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, #3
317 %c = lshr <1 x i8> %a, <i8 3>
321 define <1 x i16> @lshr.v1i16.imm(<1 x i16> %a) {
322 ; CHECK-LABEL: lshr.v1i16.imm:
323 ; CHECK: ushr v{{[0-9]+}}.4h, v{{[0-9]+}}.4h, #10
324 %c = lshr <1 x i16> %a, <i16 10>
328 define <1 x i32> @lshr.v1i32.imm(<1 x i32> %a) {
329 ; CHECK-LABEL: lshr.v1i32.imm:
330 ; CHECK: ushr v{{[0-9]+}}.2s, v{{[0-9]+}}.2s, #31
331 %c = lshr <1 x i32> %a, <i32 31>