1 ; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s --check-prefix CHECK-AARCH64
2 ; RUN: llc -verify-machineinstrs -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix CHECK-ARM64
4 ; When generating DAG selection tables, TableGen used to only flag an
5 ; instruction as needing a chain on its own account if it had a built-in pattern
6 ; which used the chain. This meant that the AArch64 load/stores weren't
7 ; recognised and so both loads from %locvar below were coalesced into a single
8 ; LS8_LDR instruction (same operands other than the non-existent chain) and the
9 ; increment was lost at return.
11 ; This was obviously a Bad Thing.
13 declare void @bar(i8*)
15 define i64 @test_chains() {
16 ; CHECK-AARCH64-LABEL: test_chains:
17 ; CHECK-ARM64-LABEL: test_chains:
21 call void @bar(i8* %locvar)
24 %inc.1 = load i8* %locvar
25 %inc.2 = zext i8 %inc.1 to i64
26 %inc.3 = add i64 %inc.2, 1
27 %inc.4 = trunc i64 %inc.3 to i8
28 store i8 %inc.4, i8* %locvar
29 ; CHECK-AARCH64: ldrb {{w[0-9]+}}, [sp, [[LOCADDR:#[0-9]+]]]
30 ; CHECK-AARCH64: add {{w[0-9]+}}, {{w[0-9]+}}, #1
31 ; CHECK-AARCH64: strb {{w[0-9]+}}, [sp, [[LOCADDR]]]
32 ; CHECK-AARCH64: ldrb {{w[0-9]+}}, [sp, [[LOCADDR]]]
34 ; CHECK-ARM64: ldurb {{w[0-9]+}}, [x29, [[LOCADDR:#-?[0-9]+]]]
35 ; CHECK-ARM64: add {{w[0-9]+}}, {{w[0-9]+}}, #1
36 ; CHECK-ARM64: sturb {{w[0-9]+}}, [x29, [[LOCADDR]]]
37 ; CHECK-ARM64: ldurb {{w[0-9]+}}, [x29, [[LOCADDR]]]
39 %ret.1 = load i8* %locvar
40 %ret.2 = zext i8 %ret.1 to i64