1 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
2 ; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
4 ; We've got the usual issues with LLVM reordering blocks here. The
5 ; tests are correct for the current order, but who knows when that
10 define i32 @test_tbz() {
11 ; CHECK-LABEL: test_tbz:
13 %val = load i32* @var32
14 %val64 = load i64* @var64
16 %tbit0 = and i32 %val, 32768
17 %tst0 = icmp ne i32 %tbit0, 0
18 br i1 %tst0, label %test1, label %end1
19 ; CHECK: tbz {{w[0-9]+}}, #15, [[LBL_end1:.?LBB0_[0-9]+]]
22 %tbit1 = and i32 %val, 4096
23 %tst1 = icmp ne i32 %tbit1, 0
24 br i1 %tst1, label %test2, label %end1
25 ; CHECK: tbz {{w[0-9]+}}, #12, [[LBL_end1]]
28 %tbit2 = and i64 %val64, 32768
29 %tst2 = icmp ne i64 %tbit2, 0
30 br i1 %tst2, label %test3, label %end1
31 ; CHECK: tbz {{[wx][0-9]+}}, #15, [[LBL_end1]]
34 %tbit3 = and i64 %val64, 4096
35 %tst3 = icmp ne i64 %tbit3, 0
36 br i1 %tst3, label %end2, label %end1
37 ; CHECK: tbz {{[wx][0-9]+}}, #12, [[LBL_end1]]
40 ; CHECK: {{movz x0, #1|orr w0, wzr, #0x1}}
45 ; CHECK: [[LBL_end1]]:
46 ; CHECK-NEXT: {{mov x0, xzr|mov w0, wzr}}