1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
5 ; FUNC-LABEL: {{^}}test2:
6 ; EG: AND_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
7 ; EG: AND_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
9 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
10 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
12 define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
13 %b_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
14 %a = load <2 x i32>, <2 x i32> addrspace(1) * %in
15 %b = load <2 x i32>, <2 x i32> addrspace(1) * %b_ptr
16 %result = and <2 x i32> %a, %b
17 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
21 ; FUNC-LABEL: {{^}}test4:
22 ; EG: AND_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23 ; EG: AND_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 ; EG: AND_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25 ; EG: AND_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
27 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
28 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
29 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
30 ; SI: v_and_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
32 define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
33 %b_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
34 %a = load <4 x i32>, <4 x i32> addrspace(1) * %in
35 %b = load <4 x i32>, <4 x i32> addrspace(1) * %b_ptr
36 %result = and <4 x i32> %a, %b
37 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
41 ; FUNC-LABEL: {{^}}s_and_i32:
43 define void @s_and_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
45 store i32 %and, i32 addrspace(1)* %out, align 4
49 ; FUNC-LABEL: {{^}}s_and_constant_i32:
50 ; SI: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x12d687
51 define void @s_and_constant_i32(i32 addrspace(1)* %out, i32 %a) {
52 %and = and i32 %a, 1234567
53 store i32 %and, i32 addrspace(1)* %out, align 4
57 ; FUNC-LABEL: {{^}}v_and_i32:
59 define void @v_and_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr, i32 addrspace(1)* %bptr) {
60 %a = load i32, i32 addrspace(1)* %aptr, align 4
61 %b = load i32, i32 addrspace(1)* %bptr, align 4
63 store i32 %and, i32 addrspace(1)* %out, align 4
67 ; FUNC-LABEL: {{^}}v_and_constant_i32
68 ; SI: v_and_b32_e32 v{{[0-9]+}}, 0x12d687, v{{[0-9]+}}
69 define void @v_and_constant_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr) {
70 %a = load i32, i32 addrspace(1)* %aptr, align 4
71 %and = and i32 %a, 1234567
72 store i32 %and, i32 addrspace(1)* %out, align 4
76 ; FUNC-LABEL: {{^}}v_and_inline_imm_64_i32
77 ; SI: v_and_b32_e32 v{{[0-9]+}}, 64, v{{[0-9]+}}
78 define void @v_and_inline_imm_64_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr) {
79 %a = load i32, i32 addrspace(1)* %aptr, align 4
81 store i32 %and, i32 addrspace(1)* %out, align 4
85 ; FUNC-LABEL: {{^}}v_and_inline_imm_neg_16_i32
86 ; SI: v_and_b32_e32 v{{[0-9]+}}, -16, v{{[0-9]+}}
87 define void @v_and_inline_imm_neg_16_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %aptr) {
88 %a = load i32, i32 addrspace(1)* %aptr, align 4
89 %and = and i32 %a, -16
90 store i32 %and, i32 addrspace(1)* %out, align 4
94 ; FUNC-LABEL: {{^}}s_and_i64
96 define void @s_and_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
98 store i64 %and, i64 addrspace(1)* %out, align 8
102 ; FIXME: Should use SGPRs
103 ; FUNC-LABEL: {{^}}s_and_i1:
105 define void @s_and_i1(i1 addrspace(1)* %out, i1 %a, i1 %b) {
107 store i1 %and, i1 addrspace(1)* %out
111 ; FUNC-LABEL: {{^}}s_and_constant_i64
112 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}
113 define void @s_and_constant_i64(i64 addrspace(1)* %out, i64 %a) {
114 %and = and i64 %a, 281474976710655
115 store i64 %and, i64 addrspace(1)* %out, align 8
119 ; FUNC-LABEL: {{^}}v_and_i64:
122 define void @v_and_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr) {
123 %a = load i64, i64 addrspace(1)* %aptr, align 8
124 %b = load i64, i64 addrspace(1)* %bptr, align 8
125 %and = and i64 %a, %b
126 store i64 %and, i64 addrspace(1)* %out, align 8
130 ; FUNC-LABEL: {{^}}v_and_i64_br:
133 define void @v_and_i64_br(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr, i32 %cond) {
135 %tmp0 = icmp eq i32 %cond, 0
136 br i1 %tmp0, label %if, label %endif
139 %a = load i64, i64 addrspace(1)* %aptr, align 8
140 %b = load i64, i64 addrspace(1)* %bptr, align 8
141 %and = and i64 %a, %b
145 %tmp1 = phi i64 [%and, %if], [0, %entry]
146 store i64 %tmp1, i64 addrspace(1)* %out, align 8
150 ; FUNC-LABEL: {{^}}v_and_constant_i64:
151 ; SI-DAG: s_mov_b32 [[KLO:s[0-9]+]], 0xab19b207
152 ; SI-DAG: s_movk_i32 [[KHI:s[0-9]+]], 0x11e{{$}}
153 ; SI-DAG: v_and_b32_e32 {{v[0-9]+}}, [[KLO]], {{v[0-9]+}}
154 ; SI-DAG: v_and_b32_e32 {{v[0-9]+}}, [[KHI]], {{v[0-9]+}}
155 ; SI: buffer_store_dwordx2
156 define void @v_and_constant_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr) {
157 %a = load i64, i64 addrspace(1)* %aptr, align 8
158 %and = and i64 %a, 1231231234567
159 store i64 %and, i64 addrspace(1)* %out, align 8
163 ; FIXME: Should replace and 0
164 ; FUNC-LABEL: {{^}}v_and_i64_32_bit_constant:
165 ; SI: v_and_b32_e32 {{v[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}
166 ; SI: v_and_b32_e32 {{v[0-9]+}}, 0, {{v[0-9]+}}
167 define void @v_and_i64_32_bit_constant(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr) {
168 %a = load i64, i64 addrspace(1)* %aptr, align 8
169 %and = and i64 %a, 1234567
170 store i64 %and, i64 addrspace(1)* %out, align 8
174 ; FIXME: Replace and 0 with mov 0
175 ; FUNC-LABEL: {{^}}v_and_inline_imm_i64:
176 ; SI: v_and_b32_e32 {{v[0-9]+}}, 64, {{v[0-9]+}}
177 ; SI: v_and_b32_e32 {{v[0-9]+}}, 0, {{v[0-9]+}}
178 define void @v_and_inline_imm_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr) {
179 %a = load i64, i64 addrspace(1)* %aptr, align 8
180 %and = and i64 %a, 64
181 store i64 %and, i64 addrspace(1)* %out, align 8
185 ; FUNC-LABEL: {{^}}s_and_inline_imm_64_i64
186 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 64
187 define void @s_and_inline_imm_64_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
188 %and = and i64 %a, 64
189 store i64 %and, i64 addrspace(1)* %out, align 8
193 ; FUNC-LABEL: {{^}}s_and_inline_imm_1_i64
194 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 1
195 define void @s_and_inline_imm_1_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
197 store i64 %and, i64 addrspace(1)* %out, align 8
201 ; FUNC-LABEL: {{^}}s_and_inline_imm_1.0_i64
202 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 1.0
203 define void @s_and_inline_imm_1.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
204 %and = and i64 %a, 4607182418800017408
205 store i64 %and, i64 addrspace(1)* %out, align 8
209 ; FUNC-LABEL: {{^}}s_and_inline_imm_neg_1.0_i64
210 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, -1.0
211 define void @s_and_inline_imm_neg_1.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
212 %and = and i64 %a, 13830554455654793216
213 store i64 %and, i64 addrspace(1)* %out, align 8
217 ; FUNC-LABEL: {{^}}s_and_inline_imm_0.5_i64
218 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0.5
219 define void @s_and_inline_imm_0.5_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
220 %and = and i64 %a, 4602678819172646912
221 store i64 %and, i64 addrspace(1)* %out, align 8
225 ; FUNC-LABEL: {{^}}s_and_inline_imm_neg_0.5_i64
226 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, -0.5
227 define void @s_and_inline_imm_neg_0.5_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
228 %and = and i64 %a, 13826050856027422720
229 store i64 %and, i64 addrspace(1)* %out, align 8
233 ; FUNC-LABEL: {{^}}s_and_inline_imm_2.0_i64
234 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 2.0
235 define void @s_and_inline_imm_2.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
236 %and = and i64 %a, 4611686018427387904
237 store i64 %and, i64 addrspace(1)* %out, align 8
241 ; FUNC-LABEL: {{^}}s_and_inline_imm_neg_2.0_i64
242 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, -2.0
243 define void @s_and_inline_imm_neg_2.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
244 %and = and i64 %a, 13835058055282163712
245 store i64 %and, i64 addrspace(1)* %out, align 8
249 ; FUNC-LABEL: {{^}}s_and_inline_imm_4.0_i64
250 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 4.0
251 define void @s_and_inline_imm_4.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
252 %and = and i64 %a, 4616189618054758400
253 store i64 %and, i64 addrspace(1)* %out, align 8
257 ; FUNC-LABEL: {{^}}s_and_inline_imm_neg_4.0_i64
258 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, -4.0
259 define void @s_and_inline_imm_neg_4.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
260 %and = and i64 %a, 13839561654909534208
261 store i64 %and, i64 addrspace(1)* %out, align 8
266 ; Test with the 64-bit integer bitpattern for a 32-bit float in the
267 ; low 32-bits, which is not a valid 64-bit inline immmediate.
269 ; FUNC-LABEL: {{^}}s_and_inline_imm_f32_4.0_i64
270 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 4.0
271 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0{{$}}
272 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}}
273 define void @s_and_inline_imm_f32_4.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
274 %and = and i64 %a, 1082130432
275 store i64 %and, i64 addrspace(1)* %out, align 8
279 ; FIXME: Copy of -1 register
280 ; FUNC-LABEL: {{^}}s_and_inline_imm_f32_neg_4.0_i64
281 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], -4.0
282 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], -1{{$}}
283 ; SI-DAG: s_mov_b32 s[[K_HI_COPY:[0-9]+]], s[[K_HI]]
284 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI_COPY]]{{\]}}
285 define void @s_and_inline_imm_f32_neg_4.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
286 %and = and i64 %a, -1065353216
287 store i64 %and, i64 addrspace(1)* %out, align 8
291 ; Shift into upper 32-bits
292 ; FUNC-LABEL: {{^}}s_and_inline_high_imm_f32_4.0_i64
293 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 4.0
294 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0{{$}}
295 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}}
296 define void @s_and_inline_high_imm_f32_4.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
297 %and = and i64 %a, 4647714815446351872
298 store i64 %and, i64 addrspace(1)* %out, align 8
302 ; FUNC-LABEL: {{^}}s_and_inline_high_imm_f32_neg_4.0_i64
303 ; SI-DAG: s_mov_b32 s[[K_HI:[0-9]+]], -4.0
304 ; SI-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0{{$}}
305 ; SI: s_and_b64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}}
306 define void @s_and_inline_high_imm_f32_neg_4.0_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 %a) {
307 %and = and i64 %a, 13871086852301127680
308 store i64 %and, i64 addrspace(1)* %out, align 8