1 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
4 ; FUNC-LABEL: {{^}}s_abs_i32:
7 define void @s_abs_i32(i32 addrspace(1)* %out, i32 %val) nounwind {
9 %cond = icmp sgt i32 %val, %neg
10 %res = select i1 %cond, i32 %val, i32 %neg
11 %res2 = add i32 %res, 2
12 store i32 %res2, i32 addrspace(1)* %out, align 4
16 ; FUNC-LABEL: {{^}}v_abs_i32:
17 ; GCN: v_sub_i32_e32 [[NEG:v[0-9]+]], vcc, 0, [[SRC:v[0-9]+]]
18 ; GCN: v_max_i32_e32 {{v[0-9]+}}, [[NEG]], [[SRC]]
20 define void @v_abs_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %src) nounwind {
21 %val = load i32, i32 addrspace(1)* %src, align 4
22 %neg = sub i32 0, %val
23 %cond = icmp sgt i32 %val, %neg
24 %res = select i1 %cond, i32 %val, i32 %neg
25 %res2 = add i32 %res, 2
26 store i32 %res2, i32 addrspace(1)* %out, align 4
30 ; FUNC-LABEL: {{^}}s_abs_v2i32:
31 ; TODO: this should use s_abs_i32
38 ; GCN-DAG: v_cndmask_b32
39 ; GCN-DAG: v_cndmask_b32
42 define void @s_abs_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %val) nounwind {
43 %z0 = insertelement <2 x i32> undef, i32 0, i32 0
44 %z1 = insertelement <2 x i32> %z0, i32 0, i32 1
45 %t0 = insertelement <2 x i32> undef, i32 2, i32 0
46 %t1 = insertelement <2 x i32> %t0, i32 2, i32 1
47 %neg = sub <2 x i32> %z1, %val
48 %cond = icmp sgt <2 x i32> %val, %neg
49 %res = select <2 x i1> %cond, <2 x i32> %val, <2 x i32> %neg
50 %res2 = add <2 x i32> %res, %t1
51 store <2 x i32> %res2, <2 x i32> addrspace(1)* %out, align 4
55 ; FUNC-LABEL: {{^}}v_abs_v2i32:
56 ; GCN: v_sub_i32_e32 [[NEG0:v[0-9]+]], vcc, 0, [[SRC0:v[0-9]+]]
57 ; GCN: v_sub_i32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
58 ; TODO: this should use v_max_i32
59 ; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG0]], [[SRC0]]
60 ; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG1]], [[SRC1]]
63 ; GCN-DAG: v_cndmask_b32
64 ; GCN-DAG: v_cndmask_b32
67 define void @v_abs_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %src) nounwind {
68 %z0 = insertelement <2 x i32> undef, i32 0, i32 0
69 %z1 = insertelement <2 x i32> %z0, i32 0, i32 1
70 %t0 = insertelement <2 x i32> undef, i32 2, i32 0
71 %t1 = insertelement <2 x i32> %t0, i32 2, i32 1
72 %val = load <2 x i32>, <2 x i32> addrspace(1)* %src, align 4
73 %neg = sub <2 x i32> %z1, %val
74 %cond = icmp sgt <2 x i32> %val, %neg
75 %res = select <2 x i1> %cond, <2 x i32> %val, <2 x i32> %neg
76 %res2 = add <2 x i32> %res, %t1
77 store <2 x i32> %res2, <2 x i32> addrspace(1)* %out, align 4
81 ; FUNC-LABEL: {{^}}s_abs_v4i32:
82 ; TODO: this should use s_abs_i32
95 ; GCN-DAG: v_cndmask_b32
96 ; GCN-DAG: v_cndmask_b32
97 ; GCN-DAG: v_cndmask_b32
98 ; GCN-DAG: v_cndmask_b32
101 define void @s_abs_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %val) nounwind {
102 %z0 = insertelement <4 x i32> undef, i32 0, i32 0
103 %z1 = insertelement <4 x i32> %z0, i32 0, i32 1
104 %z2 = insertelement <4 x i32> %z1, i32 0, i32 2
105 %z3 = insertelement <4 x i32> %z2, i32 0, i32 3
106 %t0 = insertelement <4 x i32> undef, i32 2, i32 0
107 %t1 = insertelement <4 x i32> %t0, i32 2, i32 1
108 %t2 = insertelement <4 x i32> %t1, i32 2, i32 2
109 %t3 = insertelement <4 x i32> %t2, i32 2, i32 3
110 %neg = sub <4 x i32> %z3, %val
111 %cond = icmp sgt <4 x i32> %val, %neg
112 %res = select <4 x i1> %cond, <4 x i32> %val, <4 x i32> %neg
113 %res2 = add <4 x i32> %res, %t3
114 store <4 x i32> %res2, <4 x i32> addrspace(1)* %out, align 4
118 ; FUNC-LABEL: {{^}}v_abs_v4i32:
119 ; GCN: v_sub_i32_e32 [[NEG0:v[0-9]+]], vcc, 0, [[SRC0:v[0-9]+]]
120 ; GCN: v_sub_i32_e32 [[NEG1:v[0-9]+]], vcc, 0, [[SRC1:v[0-9]+]]
121 ; GCN: v_sub_i32_e32 [[NEG2:v[0-9]+]], vcc, 0, [[SRC2:v[0-9]+]]
122 ; GCN: v_sub_i32_e32 [[NEG3:v[0-9]+]], vcc, 0, [[SRC3:v[0-9]+]]
123 ; TODO: this should use v_max_i32
124 ; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG0]], [[SRC0]]
125 ; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG1]], [[SRC1]]
126 ; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG2]], [[SRC2]]
127 ; GCNX: v_max_i32_e32 {{v[0-9]+}}, [[NEG3]], [[SRC3]]
132 ; GCN-DAG: v_cndmask_b32
133 ; GCN-DAG: v_cndmask_b32
134 ; GCN-DAG: v_cndmask_b32
135 ; GCN-DAG: v_cndmask_b32
140 define void @v_abs_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %src) nounwind {
141 %z0 = insertelement <4 x i32> undef, i32 0, i32 0
142 %z1 = insertelement <4 x i32> %z0, i32 0, i32 1
143 %z2 = insertelement <4 x i32> %z1, i32 0, i32 2
144 %z3 = insertelement <4 x i32> %z2, i32 0, i32 3
145 %t0 = insertelement <4 x i32> undef, i32 2, i32 0
146 %t1 = insertelement <4 x i32> %t0, i32 2, i32 1
147 %t2 = insertelement <4 x i32> %t1, i32 2, i32 2
148 %t3 = insertelement <4 x i32> %t2, i32 2, i32 3
149 %val = load <4 x i32>, <4 x i32> addrspace(1)* %src, align 4
150 %neg = sub <4 x i32> %z3, %val
151 %cond = icmp sgt <4 x i32> %val, %neg
152 %res = select <4 x i1> %cond, <4 x i32> %val, <4 x i32> %neg
153 %res2 = add <4 x i32> %res, %t3
154 store <4 x i32> %res2, <4 x i32> addrspace(1)* %out, align 4