1 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s
3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
5 ; FUNC-LABEL: {{^}}lshr_i32:
6 ; SI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
7 ; VI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
8 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
9 define void @lshr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
10 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
11 %a = load i32, i32 addrspace(1)* %in
12 %b = load i32, i32 addrspace(1)* %b_ptr
13 %result = lshr i32 %a, %b
14 store i32 %result, i32 addrspace(1)* %out
18 ; FUNC-LABEL: {{^}}lshr_v2i32:
19 ; SI: v_lshr_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
20 ; SI: v_lshr_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
22 ; VI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
23 ; VI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
25 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
26 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
27 define void @lshr_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
28 %b_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
29 %a = load <2 x i32>, <2 x i32> addrspace(1)* %in
30 %b = load <2 x i32>, <2 x i32> addrspace(1)* %b_ptr
31 %result = lshr <2 x i32> %a, %b
32 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
36 ; FUNC-LABEL: {{^}}lshr_v4i32:
37 ; SI: v_lshr_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
38 ; SI: v_lshr_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
39 ; SI: v_lshr_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
40 ; SI: v_lshr_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
42 ; VI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
43 ; VI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
44 ; VI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
45 ; VI: v_lshrrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
47 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
48 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
49 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
50 ; EG: LSHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
51 define void @lshr_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
52 %b_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
53 %a = load <4 x i32>, <4 x i32> addrspace(1)* %in
54 %b = load <4 x i32>, <4 x i32> addrspace(1)* %b_ptr
55 %result = lshr <4 x i32> %a, %b
56 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
60 ; FUNC-LABEL: {{^}}lshr_i64:
61 ; SI: v_lshr_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
62 ; VI: v_lshrrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
64 ; EG: SUB_INT {{\*? *}}[[COMPSH:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHIFT:T[0-9]+\.[XYZW]]]
65 ; EG: LSHL {{\* *}}[[TEMP:T[0-9]+\.[XYZW]]], [[OPHI:T[0-9]+\.[XYZW]]], {{[[COMPSH]]|PV.[XYZW]}}
66 ; EG: LSHL {{\*? *}}[[OVERF:T[0-9]+\.[XYZW]]], {{[[TEMP]]|PV.[XYZW]}}, 1
67 ; EG-DAG: ADD_INT {{\*? *}}[[BIGSH:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
68 ; EG-DAG: LSHR {{\*? *}}[[LOSMTMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], [[SHIFT]]
69 ; EG-DAG: OR_INT {{\*? *}}[[LOSM:T[0-9]+\.[XYZW]]], {{[[LOSMTMP]]|PV.[XYZW]}}, {{[[OVERF]]|PV.[XYZW]}}
70 ; EG-DAG: LSHR {{\*? *}}[[HISM:T[0-9]+\.[XYZW]]], [[OPHI]], {{PS|[[SHIFT]]}}
71 ; EG-DAG: LSHR {{\*? *}}[[LOBIG:T[0-9]+\.[XYZW]]], [[OPHI]], {{PS|[[SHIFT]]}}
72 ; EG-DAG: SETGT_UINT {{\*? *}}[[RESC:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
73 ; EG-DAG: CNDE_INT {{\*? *}}[[RESLO:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
74 ; EG-DAG: CNDE_INT {{\*? *}}[[RESHI:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW], .*}}, 0.0
75 define void @lshr_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
76 %b_ptr = getelementptr i64, i64 addrspace(1)* %in, i64 1
77 %a = load i64, i64 addrspace(1)* %in
78 %b = load i64, i64 addrspace(1)* %b_ptr
79 %result = lshr i64 %a, %b
80 store i64 %result, i64 addrspace(1)* %out
84 ; FUNC-LABEL: {{^}}lshr_v2i64:
85 ; SI: v_lshr_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
86 ; SI: v_lshr_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
88 ; VI: v_lshrrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
89 ; VI: v_lshrrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
91 ; EG-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
92 ; EG-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
93 ; EG-DAG: LSHL {{\*? *}}[[COMPSHA]]
94 ; EG-DAG: LSHL {{\*? *}}[[COMPSHB]]
95 ; EG-DAG: LSHL {{.*}}, 1
96 ; EG-DAG: LSHL {{.*}}, 1
97 ; EG-DAG: LSHR {{.*}}, [[SHA]]
98 ; EG-DAG: LSHR {{.*}}, [[SHB]]
99 ; EG-DAG: LSHR {{.*}}, [[SHA]]
100 ; EG-DAG: LSHR {{.*}}, [[SHB]]
103 ; EG-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
104 ; EG-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
107 ; EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
108 ; EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
109 ; EG-DAG: CNDE_INT {{.*}}, 0.0
110 ; EG-DAG: CNDE_INT {{.*}}, 0.0
113 define void @lshr_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) {
114 %b_ptr = getelementptr <2 x i64>, <2 x i64> addrspace(1)* %in, i64 1
115 %a = load <2 x i64>, <2 x i64> addrspace(1)* %in
116 %b = load <2 x i64>, <2 x i64> addrspace(1)* %b_ptr
117 %result = lshr <2 x i64> %a, %b
118 store <2 x i64> %result, <2 x i64> addrspace(1)* %out
122 ; FUNC-LABEL: {{^}}lshr_v4i64:
123 ; SI: v_lshr_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
124 ; SI: v_lshr_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
125 ; SI: v_lshr_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
126 ; SI: v_lshr_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
128 ; VI: v_lshrrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
129 ; VI: v_lshrrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
130 ; VI: v_lshrrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
131 ; VI: v_lshrrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
133 ; EG-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
134 ; EG-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
135 ; EG-DAG: SUB_INT {{\*? *}}[[COMPSHC:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHC:T[0-9]+\.[XYZW]]]
136 ; EG-DAG: SUB_INT {{\*? *}}[[COMPSHD:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHD:T[0-9]+\.[XYZW]]]
137 ; EG-DAG: LSHL {{\*? *}}[[COMPSHA]]
138 ; EG-DAG: LSHL {{\*? *}}[[COMPSHB]]
139 ; EG-DAG: LSHL {{\*? *}}[[COMPSHC]]
140 ; EG-DAG: LSHL {{\*? *}}[[COMPSHD]]
141 ; EG-DAG: LSHL {{.*}}, 1
142 ; EG-DAG: LSHL {{.*}}, 1
143 ; EG-DAG: LSHL {{.*}}, 1
144 ; EG-DAG: LSHL {{.*}}, 1
145 ; EG-DAG: LSHR {{.*}}, [[SHA]]
146 ; EG-DAG: LSHR {{.*}}, [[SHB]]
147 ; EG-DAG: LSHR {{.*}}, [[SHC]]
148 ; EG-DAG: LSHR {{.*}}, [[SHD]]
149 ; EG-DAG: LSHR {{.*}}, [[SHA]]
150 ; EG-DAG: LSHR {{.*}}, [[SHB]]
151 ; EG-DAG: LSHR {{.*}}, [[SHC]]
152 ; EG-DAG: LSHR {{.*}}, [[SHD]]
157 ; EG-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
158 ; EG-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
159 ; EG-DAG: ADD_INT {{\*? *}}[[BIGSHC:T[0-9]+\.[XYZW]]]{{.*}}, literal
160 ; EG-DAG: ADD_INT {{\*? *}}[[BIGSHD:T[0-9]+\.[XYZW]]]{{.*}}, literal
167 ; EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
168 ; EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
169 ; EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHC]], literal
170 ; EG-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHD]], literal
171 ; EG-DAG: CNDE_INT {{.*}}, 0.0
172 ; EG-DAG: CNDE_INT {{.*}}, 0.0
173 ; EG-DAG: CNDE_INT {{.*}}, 0.0
174 ; EG-DAG: CNDE_INT {{.*}}, 0.0
179 define void @lshr_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
180 %b_ptr = getelementptr <4 x i64>, <4 x i64> addrspace(1)* %in, i64 1
181 %a = load <4 x i64>, <4 x i64> addrspace(1)* %in
182 %b = load <4 x i64>, <4 x i64> addrspace(1)* %b_ptr
183 %result = lshr <4 x i64> %a, %b
184 store <4 x i64> %result, <4 x i64> addrspace(1)* %out