1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600
2 ; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI
3 ; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI
6 ; R600: MEM_RAT_CACHELESS STORE_RAW
7 ; R600: MEM_RAT_CACHELESS STORE_RAW
10 ; SI: s_mov_b32 [[ZERO:s[0-9]]], 0{{$}}
11 ; SI: v_mov_b32_e32 v[[V_ZERO:[0-9]]], [[ZERO]]
12 ; SI: buffer_store_dwordx2 v[0:[[V_ZERO]]{{\]}}
13 define void @test(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) {
17 %2 = zext i32 %1 to i64
18 store i64 %2, i64 addrspace(1)* %out
22 ; SI-LABEL: {{^}}testi1toi32:
24 define void @testi1toi32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
26 %0 = icmp eq i32 %a, %b
27 %1 = zext i1 %0 to i32
28 store i32 %1, i32 addrspace(1)* %out
32 ; SI-LABEL: {{^}}zext_i1_to_i64:
33 ; SI: s_mov_b32 s{{[0-9]+}}, 0
36 define void @zext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
37 %cmp = icmp eq i32 %a, %b
38 %ext = zext i1 %cmp to i64
39 store i64 %ext, i64 addrspace(1)* %out, align 8