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HEAD
ARM pop of a single register encodes as post-indexed LDR.
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
2010-04-13-v2f64SplitArg.ll
1
; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8
2
; Radar 7855014
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4
define void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
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entry:
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unreachable
7
}