1 ; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8
4 define arm_aapcs_vfpcc i32 @main() nounwind {
5 bb.nph55.bb.nph55.split_crit_edge:
8 bb3: ; preds = %bb3, %bb.nph55.bb.nph55.split_crit_edge
9 br i1 undef, label %bb.i19, label %bb3
11 bb.i19: ; preds = %bb.i19, %bb3
12 %0 = insertelement <4 x float> undef, float undef, i32 3 ; <<4 x float>> [#uses=3]
13 %1 = fmul <4 x float> %0, %0 ; <<4 x float>> [#uses=1]
14 %2 = bitcast <4 x float> %1 to <2 x double> ; <<2 x double>> [#uses=0]
15 %3 = fmul <4 x float> %0, undef ; <<4 x float>> [#uses=0]