MI-Sched: handle latency of in-order operations with the new machine model.
[oota-llvm.git] / test / CodeGen / ARM / DbgValueOtherTargets.test
1 RUN: llc -O0 -march=arm -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll