1 ; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
2 ; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
3 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=THUMBTWO
4 ; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
5 ; RUN llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
7 define void @test1(i32* %ptr, i32 %val1) {
11 ; ARM-NEXT: dmb {{ish$}}
13 ; THUMBONE: __sync_lock_test_and_set_4
15 ; THUMBTWO: dmb {{ish$}}
17 ; THUMBTWO-NEXT: dmb {{ish$}}
18 store atomic i32 %val1, i32* %ptr seq_cst, align 4
22 define i32 @test2(i32* %ptr) {
25 ; ARM-NEXT: dmb {{ish$}}
27 ; THUMBONE: __sync_val_compare_and_swap_4
30 ; THUMBTWO-NEXT: dmb {{ish$}}
31 %val = load atomic i32* %ptr seq_cst, align 4
35 define void @test3(i8* %ptr1, i8* %ptr2) {
45 %val = load atomic i8* %ptr1 unordered, align 1
46 store atomic i8 %val, i8* %ptr2 unordered, align 1
50 define void @test4(i8* %ptr1, i8* %ptr2) {
52 ; THUMBONE: ___sync_val_compare_and_swap_1
53 ; THUMBONE: ___sync_lock_test_and_set_1
54 %val = load atomic i8* %ptr1 seq_cst, align 1
55 store atomic i8 %val, i8* %ptr2 seq_cst, align 1
59 define i64 @test_old_load_64bit(i64* %p) {
60 ; ARMV4: test_old_load_64bit
61 ; ARMV4: ___sync_val_compare_and_swap_8
62 %1 = load atomic i64* %p seq_cst, align 8
66 define void @test_old_store_64bit(i64* %p, i64 %v) {
67 ; ARMV4: test_old_store_64bit
68 ; ARMV4: ___sync_lock_test_and_set_8
69 store atomic i64 %v, i64* %p seq_cst, align 8