1 ; RUN: llvm-as < %s | llc -march=arm &&
2 ; RUN: llvm-as < %s | llc -march=arm | grep and | wc -l | grep 1 &&
3 ; RUN: llvm-as < %s | llc -march=arm | grep orr | wc -l | grep 1 &&
4 ; RUN: llvm-as < %s | llc -march=arm | grep eor | wc -l | grep 1 &&
5 ; RUN: llvm-as < %s | llc -march=arm | grep mov.*lsl | wc -l | grep 1 &&
6 ; RUN: llvm-as < %s | llc -march=arm | grep mov.*asr | wc -l | grep 1
8 define i32 @f1(i32 %a, i32 %b) {
10 %tmp2 = and i32 %b, %a ; <i32> [#uses=1]
14 define i32 @f2(i32 %a, i32 %b) {
16 %tmp2 = or i32 %b, %a ; <i32> [#uses=1]
20 define i32 @f3(i32 %a, i32 %b) {
22 %tmp2 = xor i32 %b, %a ; <i32> [#uses=1]
26 define i32 @f4(i32 %a, i32 %b) {
28 %tmp3 = shl i32 %a, %b ; <i32> [#uses=1]
32 define i32 @f5(i32 %a, i32 %b) {
34 %tmp3 = ashr i32 %a, %b ; <i32> [#uses=1]