1 ; This tests that MC/asm header conversion is smooth and that the
2 ; build attributes are correct
4 ; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
31 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
32 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
33 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
34 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
35 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
36 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
37 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
38 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
39 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
40 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
41 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
42 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
43 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
44 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
45 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
46 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
47 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
48 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
49 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
51 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
52 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
53 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
55 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
56 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
57 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
58 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
59 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
61 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
62 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
63 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
64 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
65 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
66 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
67 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
68 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
69 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
70 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
72 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
73 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
75 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
76 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
78 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
79 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
81 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
82 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
83 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
84 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
85 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
86 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
87 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
88 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
89 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
90 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
91 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
92 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
93 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
94 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
95 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
96 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
97 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
98 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
99 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
100 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
101 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
102 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
103 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
104 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
106 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
107 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
109 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
110 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK
112 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST
113 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
114 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
115 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
116 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
118 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
119 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
120 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
121 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
122 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
123 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
124 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
125 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
128 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
129 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
130 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
132 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
133 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
134 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
135 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
137 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
138 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
140 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
141 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
143 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
144 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
146 ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
147 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
148 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
150 ; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
151 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
152 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
154 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
155 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
156 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
157 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
159 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
160 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
162 ; XSCALE: .eabi_attribute 6, 5
163 ; XSCALE: .eabi_attribute 8, 1
164 ; XSCALE: .eabi_attribute 9, 1
166 ; DYN-ROUNDING: .eabi_attribute 19, 1
168 ; V6: .eabi_attribute 6, 6
169 ; V6: .eabi_attribute 8, 1
170 ;; We assume round-to-nearest by default (matches GCC)
171 ; V6-NOT: .eabi_attribute 19
172 ;; The default choice made by llc is for a V6 CPU without an FPU.
173 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
174 ;; software floating-point support. The choice is not important for targets without
176 ; V6: .eabi_attribute 20, 1
177 ; V6: .eabi_attribute 21, 1
178 ; V6-NOT: .eabi_attribute 22
179 ; V6: .eabi_attribute 23, 3
180 ; V6: .eabi_attribute 24, 1
181 ; V6: .eabi_attribute 25, 1
182 ; V6-NOT: .eabi_attribute 27
183 ; V6-NOT: .eabi_attribute 28
184 ; V6-NOT: .eabi_attribute 36
185 ; V6: .eabi_attribute 38, 1
186 ; V6-NOT: .eabi_attribute 42
187 ; V6-NOT: .eabi_attribute 44
188 ; V6-NOT: .eabi_attribute 68
190 ; V6-FAST-NOT: .eabi_attribute 19
191 ;; Despite the V6 CPU having no FPU by default, we chose to flush to
192 ;; positive zero here. There's no hardware support doing this, but the
193 ;; fast maths software library might.
194 ; V6-FAST-NOT: .eabi_attribute 20
195 ; V6-FAST-NOT: .eabi_attribute 21
196 ; V6-FAST-NOT: .eabi_attribute 22
197 ; V6-FAST: .eabi_attribute 23, 1
199 ;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
200 ;; V6-M, however we don't model the OS extension so this is fine.
201 ; V6M: .eabi_attribute 6, 12
202 ; V6M-NOT: .eabi_attribute 7
203 ; V6M: .eabi_attribute 8, 0
204 ; V6M: .eabi_attribute 9, 1
205 ; V6M-NOT: .eabi_attribute 19
206 ;; The default choice made by llc is for a V6M CPU without an FPU.
207 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
208 ;; software floating-point support. The choice is not important for targets without
210 ; V6M: .eabi_attribute 20, 1
211 ; V6M: .eabi_attribute 21, 1
212 ; V6M-NOT: .eabi_attribute 22
213 ; V6M: .eabi_attribute 23, 3
214 ; V6M: .eabi_attribute 24, 1
215 ; V6M: .eabi_attribute 25, 1
216 ; V6M-NOT: .eabi_attribute 27
217 ; V6M-NOT: .eabi_attribute 28
218 ; V6M-NOT: .eabi_attribute 36
219 ; V6M: .eabi_attribute 38, 1
220 ; V6M-NOT: .eabi_attribute 42
221 ; V6M-NOT: .eabi_attribute 44
222 ; V6M-NOT: .eabi_attribute 68
224 ; V6M-FAST-NOT: .eabi_attribute 19
225 ;; Despite the V6M CPU having no FPU by default, we chose to flush to
226 ;; positive zero here. There's no hardware support doing this, but the
227 ;; fast maths software library might.
228 ; V6M-FAST-NOT: .eabi_attribute 20
229 ; V6M-FAST-NOT: .eabi_attribute 21
230 ; V6M-FAST-NOT: .eabi_attribute 22
231 ; V6M-FAST: .eabi_attribute 23, 1
233 ; ARM1156T2F-S: .cpu arm1156t2f-s
234 ; ARM1156T2F-S: .eabi_attribute 6, 8
235 ; ARM1156T2F-S: .eabi_attribute 8, 1
236 ; ARM1156T2F-S: .eabi_attribute 9, 2
237 ; ARM1156T2F-S: .fpu vfpv2
238 ; ARM1156T2F-S-NOT: .eabi_attribute 19
239 ;; We default to IEEE 754 compliance
240 ; ARM1156T2F-S: .eabi_attribute 20, 1
241 ; ARM1156T2F-S: .eabi_attribute 21, 1
242 ; ARM1156T2F-S-NOT: .eabi_attribute 22
243 ; ARM1156T2F-S: .eabi_attribute 23, 3
244 ; ARM1156T2F-S: .eabi_attribute 24, 1
245 ; ARM1156T2F-S: .eabi_attribute 25, 1
246 ; ARM1156T2F-S-NOT: .eabi_attribute 27
247 ; ARM1156T2F-S-NOT: .eabi_attribute 28
248 ; ARM1156T2F-S-NOT: .eabi_attribute 36
249 ; ARM1156T2F-S: .eabi_attribute 38, 1
250 ; ARM1156T2F-S-NOT: .eabi_attribute 42
251 ; ARM1156T2F-S-NOT: .eabi_attribute 44
252 ; ARM1156T2F-S-NOT: .eabi_attribute 68
254 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19
255 ;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
256 ;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
257 ;; select. LLVM historically picks 0.
258 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
259 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21
260 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22
261 ; ARM1156T2F-S-FAST: .eabi_attribute 23, 1
263 ; V7M: .eabi_attribute 6, 10
264 ; V7M: .eabi_attribute 7, 77
265 ; V7M: .eabi_attribute 8, 0
266 ; V7M: .eabi_attribute 9, 2
267 ; V7M-NOT: .eabi_attribute 19
268 ;; The default choice made by llc is for a V7M CPU without an FPU.
269 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
270 ;; software floating-point support. The choice is not important for targets without
272 ; V7M: .eabi_attribute 20, 1
273 ; V7M: .eabi_attribute 21, 1
274 ; V7M-NOT: .eabi_attribute 22
275 ; V7M: .eabi_attribute 23, 3
276 ; V7M: .eabi_attribute 24, 1
277 ; V7M: .eabi_attribute 25, 1
278 ; V7M-NOT: .eabi_attribute 27
279 ; V7M-NOT: .eabi_attribute 28
280 ; V7M-NOT: .eabi_attribute 36
281 ; V7M: .eabi_attribute 38, 1
282 ; V7M-NOT: .eabi_attribute 42
283 ; V7M-NOT: .eabi_attribute 44
284 ; V7M-NOT: .eabi_attribute 68
286 ; V7M-FAST-NOT: .eabi_attribute 19
287 ;; Despite the V7M CPU having no FPU by default, we chose to flush
288 ;; preserving sign. This matches what the hardware would do in the
289 ;; architecture revision were to exist on the current target.
290 ; V7M-FAST: .eabi_attribute 20, 2
291 ; V7M-FAST-NOT: .eabi_attribute 21
292 ; V7M-FAST-NOT: .eabi_attribute 22
293 ; V7M-FAST: .eabi_attribute 23, 1
295 ; V7: .syntax unified
296 ; V7: .eabi_attribute 6, 10
297 ; V7-NOT: .eabi_attribute 19
298 ;; In safe-maths mode we default to an IEEE 754 compliant choice.
299 ; V7: .eabi_attribute 20, 1
300 ; V7: .eabi_attribute 21, 1
301 ; V7-NOT: .eabi_attribute 22
302 ; V7: .eabi_attribute 23, 3
303 ; V7: .eabi_attribute 24, 1
304 ; V7: .eabi_attribute 25, 1
305 ; V7-NOT: .eabi_attribute 27
306 ; V7-NOT: .eabi_attribute 28
307 ; V7-NOT: .eabi_attribute 36
308 ; V7: .eabi_attribute 38, 1
309 ; V7-NOT: .eabi_attribute 42
310 ; V7-NOT: .eabi_attribute 44
311 ; V7-NOT: .eabi_attribute 68
313 ; V7-FAST-NOT: .eabi_attribute 19
314 ;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
315 ;; denormals to zero preserving the sign.
316 ; V7-FAST: .eabi_attribute 20, 2
317 ; V7-FAST-NOT: .eabi_attribute 21
318 ; V7-FAST-NOT: .eabi_attribute 22
319 ; V7-FAST: .eabi_attribute 23, 1
321 ; V8: .syntax unified
322 ; V8: .eabi_attribute 67, "2.09"
323 ; V8: .eabi_attribute 6, 14
324 ; V8-NOT: .eabi_attribute 19
325 ; V8: .eabi_attribute 20, 1
326 ; V8: .eabi_attribute 21, 1
327 ; V8-NOT: .eabi_attribute 22
328 ; V8: .eabi_attribute 23, 3
329 ; V8-NOT: .eabi_attribute 44
331 ; V8-FAST-NOT: .eabi_attribute 19
332 ;; The default does have an FPU, and for V8-A, it flushes preserving sign.
333 ; V8-FAST: .eabi_attribute 20, 2
334 ; V8-FAST-NOT: .eabi_attribute 21
335 ; V8-FAST-NOT: .eabi_attribute 22
336 ; V8-FAST: .eabi_attribute 23, 1
338 ; Vt8: .syntax unified
339 ; Vt8: .eabi_attribute 6, 14
340 ; Vt8-NOT: .eabi_attribute 19
341 ; Vt8: .eabi_attribute 20, 1
342 ; Vt8: .eabi_attribute 21, 1
343 ; Vt8-NOT: .eabi_attribute 22
344 ; Vt8: .eabi_attribute 23, 3
346 ; V8-FPARMv8: .syntax unified
347 ; V8-FPARMv8: .eabi_attribute 6, 14
348 ; V8-FPARMv8: .fpu fp-armv8
350 ; V8-NEON: .syntax unified
351 ; V8-NEON: .eabi_attribute 6, 14
353 ; V8-NEON: .eabi_attribute 12, 3
355 ; V8-FPARMv8-NEON: .syntax unified
356 ; V8-FPARMv8-NEON: .eabi_attribute 6, 14
357 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8
358 ; V8-FPARMv8-NEON: .eabi_attribute 12, 3
360 ; V8-FPARMv8-NEON-CRYPTO: .syntax unified
361 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
362 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
363 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
365 ; Tag_CPU_unaligned_access
366 ; NO-STRICT-ALIGN: .eabi_attribute 34, 1
367 ; STRICT-ALIGN: .eabi_attribute 34, 0
369 ; Tag_CPU_arch 'ARMv7'
370 ; CORTEX-A7-CHECK: .eabi_attribute 6, 10
371 ; CORTEX-A7-NOFPU: .eabi_attribute 6, 10
373 ; CORTEX-A7-FPUV4: .eabi_attribute 6, 10
375 ; Tag_CPU_arch_profile 'A'
376 ; CORTEX-A7-CHECK: .eabi_attribute 7, 65
377 ; CORTEX-A7-NOFPU: .eabi_attribute 7, 65
378 ; CORTEX-A7-FPUV4: .eabi_attribute 7, 65
381 ; CORTEX-A7-CHECK: .eabi_attribute 8, 1
382 ; CORTEX-A7-NOFPU: .eabi_attribute 8, 1
383 ; CORTEX-A7-FPUV4: .eabi_attribute 8, 1
386 ; CORTEX-A7-CHECK: .eabi_attribute 9, 2
387 ; CORTEX-A7-NOFPU: .eabi_attribute 9, 2
388 ; CORTEX-A7-FPUV4: .eabi_attribute 9, 2
390 ; CORTEX-A7-CHECK: .fpu neon-vfpv4
391 ; CORTEX-A7-NOFPU-NOT: .fpu
392 ; CORTEX-A7-FPUV4: .fpu vfpv4
394 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 19
395 ; Tag_ABI_FP_denormal
396 ;; We default to IEEE 754 compliance
397 ; CORTEX-A7-CHECK: .eabi_attribute 20, 1
398 ;; The A7 has VFPv3 support by default, so flush preserving sign.
399 ; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
400 ; CORTEX-A7-NOFPU: .eabi_attribute 20, 1
401 ;; Despite there being no FPU, we chose to flush to zero preserving
402 ;; sign. This matches what the hardware would do for this architecture
404 ; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
405 ; CORTEX-A7-FPUV4: .eabi_attribute 20, 1
406 ;; The VFPv4 FPU flushes preserving sign.
407 ; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
409 ; Tag_ABI_FP_exceptions
410 ; CORTEX-A7-CHECK: .eabi_attribute 21, 1
411 ; CORTEX-A7-NOFPU: .eabi_attribute 21, 1
412 ; CORTEX-A7-FPUV4: .eabi_attribute 21, 1
414 ; Tag_ABI_FP_user_exceptions
415 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 22
416 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22
417 ; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22
419 ; Tag_ABI_FP_number_model
420 ; CORTEX-A7-CHECK: .eabi_attribute 23, 3
421 ; CORTEX-A7-NOFPU: .eabi_attribute 23, 3
422 ; CORTEX-A7-FPUV4: .eabi_attribute 23, 3
424 ; Tag_ABI_align_needed
425 ; CORTEX-A7-CHECK: .eabi_attribute 24, 1
426 ; CORTEX-A7-NOFPU: .eabi_attribute 24, 1
427 ; CORTEX-A7-FPUV4: .eabi_attribute 24, 1
429 ; Tag_ABI_align_preserved
430 ; CORTEX-A7-CHECK: .eabi_attribute 25, 1
431 ; CORTEX-A7-NOFPU: .eabi_attribute 25, 1
432 ; CORTEX-A7-FPUV4: .eabi_attribute 25, 1
434 ; Tag_FP_HP_extension
435 ; CORTEX-A7-CHECK: .eabi_attribute 36, 1
436 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 36
437 ; CORTEX-A7-FPUV4: .eabi_attribute 36, 1
439 ; Tag_FP_16bit_format
440 ; CORTEX-A7-CHECK: .eabi_attribute 38, 1
441 ; CORTEX-A7-NOFPU: .eabi_attribute 38, 1
442 ; CORTEX-A7-FPUV4: .eabi_attribute 38, 1
444 ; Tag_MPextension_use
445 ; CORTEX-A7-CHECK: .eabi_attribute 42, 1
446 ; CORTEX-A7-NOFPU: .eabi_attribute 42, 1
447 ; CORTEX-A7-FPUV4: .eabi_attribute 42, 1
450 ; CORTEX-A7-CHECK: .eabi_attribute 44, 2
451 ; CORTEX-A7-NOFPU: .eabi_attribute 44, 2
452 ; CORTEX-A7-FPUV4: .eabi_attribute 44, 2
454 ; Tag_Virtualization_use
455 ; CORTEX-A7-CHECK: .eabi_attribute 68, 3
456 ; CORTEX-A7-NOFPU: .eabi_attribute 68, 3
457 ; CORTEX-A7-FPUV4: .eabi_attribute 68, 3
459 ; CORTEX-A5-DEFAULT: .cpu cortex-a5
460 ; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10
461 ; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65
462 ; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1
463 ; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2
464 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4
465 ; CORTEX-A5-NOT: .eabi_attribute 19
466 ;; We default to IEEE 754 compliance
467 ; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1
468 ; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1
469 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22
470 ; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3
471 ; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1
472 ; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1
473 ; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1
474 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44
475 ; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1
477 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19
478 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
480 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2
481 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
482 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
483 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
485 ; CORTEX-A5-NONEON: .cpu cortex-a5
486 ; CORTEX-A5-NONEON: .eabi_attribute 6, 10
487 ; CORTEX-A5-NONEON: .eabi_attribute 7, 65
488 ; CORTEX-A5-NONEON: .eabi_attribute 8, 1
489 ; CORTEX-A5-NONEON: .eabi_attribute 9, 2
490 ; CORTEX-A5-NONEON: .fpu vfpv4-d16
491 ;; We default to IEEE 754 compliance
492 ; CORTEX-A5-NONEON: .eabi_attribute 20, 1
493 ; CORTEX-A5-NONEON: .eabi_attribute 21, 1
494 ; CORTEX-A5-NONEON-NOT: .eabi_attribute 22
495 ; CORTEX-A5-NONEON: .eabi_attribute 23, 3
496 ; CORTEX-A5-NONEON: .eabi_attribute 24, 1
497 ; CORTEX-A5-NONEON: .eabi_attribute 25, 1
498 ; CORTEX-A5-NONEON: .eabi_attribute 42, 1
499 ; CORTEX-A5-NONEON: .eabi_attribute 68, 1
501 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19
502 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
504 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2
505 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
506 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
507 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
509 ; CORTEX-A5-NOFPU: .cpu cortex-a5
510 ; CORTEX-A5-NOFPU: .eabi_attribute 6, 10
511 ; CORTEX-A5-NOFPU: .eabi_attribute 7, 65
512 ; CORTEX-A5-NOFPU: .eabi_attribute 8, 1
513 ; CORTEX-A5-NOFPU: .eabi_attribute 9, 2
514 ; CORTEX-A5-NOFPU-NOT: .fpu
515 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19
516 ;; We default to IEEE 754 compliance
517 ; CORTEX-A5-NOFPU: .eabi_attribute 20, 1
518 ; CORTEX-A5-NOFPU: .eabi_attribute 21, 1
519 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22
520 ; CORTEX-A5-NOFPU: .eabi_attribute 23, 3
521 ; CORTEX-A5-NOFPU: .eabi_attribute 24, 1
522 ; CORTEX-A5-NOFPU: .eabi_attribute 25, 1
523 ; CORTEX-A5-NOFPU: .eabi_attribute 42, 1
524 ; CORTEX-A5-NOFPU: .eabi_attribute 68, 1
526 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19
527 ;; Despite there being no FPU, we chose to flush to zero preserving
528 ;; sign. This matches what the hardware would do for this architecture
530 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
531 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
532 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
533 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
535 ; CORTEX-A9-SOFT: .cpu cortex-a9
536 ; CORTEX-A9-SOFT: .eabi_attribute 6, 10
537 ; CORTEX-A9-SOFT: .eabi_attribute 7, 65
538 ; CORTEX-A9-SOFT: .eabi_attribute 8, 1
539 ; CORTEX-A9-SOFT: .eabi_attribute 9, 2
540 ; CORTEX-A9-SOFT: .fpu neon
541 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 19
542 ;; We default to IEEE 754 compliance
543 ; CORTEX-A9-SOFT: .eabi_attribute 20, 1
544 ; CORTEX-A9-SOFT: .eabi_attribute 21, 1
545 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 22
546 ; CORTEX-A9-SOFT: .eabi_attribute 23, 3
547 ; CORTEX-A9-SOFT: .eabi_attribute 24, 1
548 ; CORTEX-A9-SOFT: .eabi_attribute 25, 1
549 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 27
550 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 28
551 ; CORTEX-A9-SOFT: .eabi_attribute 36, 1
552 ; CORTEX-A9-SOFT: .eabi_attribute 38, 1
553 ; CORTEX-A9-SOFT: .eabi_attribute 42, 1
554 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 44
555 ; CORTEX-A9-SOFT: .eabi_attribute 68, 1
557 ; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19
558 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
559 ;; -ffast-math is specified.
560 ; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2
561 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
562 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
563 ; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
565 ; CORTEX-A9-HARD: .cpu cortex-a9
566 ; CORTEX-A9-HARD: .eabi_attribute 6, 10
567 ; CORTEX-A9-HARD: .eabi_attribute 7, 65
568 ; CORTEX-A9-HARD: .eabi_attribute 8, 1
569 ; CORTEX-A9-HARD: .eabi_attribute 9, 2
570 ; CORTEX-A9-HARD: .fpu neon
571 ; CORTEX-A9-HARD-NOT: .eabi_attribute 19
572 ;; We default to IEEE 754 compliance
573 ; CORTEX-A9-HARD: .eabi_attribute 20, 1
574 ; CORTEX-A9-HARD: .eabi_attribute 21, 1
575 ; CORTEX-A9-HARD-NOT: .eabi_attribute 22
576 ; CORTEX-A9-HARD: .eabi_attribute 23, 3
577 ; CORTEX-A9-HARD: .eabi_attribute 24, 1
578 ; CORTEX-A9-HARD: .eabi_attribute 25, 1
579 ; CORTEX-A9-HARD-NOT: .eabi_attribute 27
580 ; CORTEX-A9-HARD: .eabi_attribute 28, 1
581 ; CORTEX-A9-HARD: .eabi_attribute 36, 1
582 ; CORTEX-A9-HARD: .eabi_attribute 38, 1
583 ; CORTEX-A9-HARD: .eabi_attribute 42, 1
584 ; CORTEX-A9-HARD: .eabi_attribute 68, 1
586 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19
587 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
588 ;; -ffast-math is specified.
589 ; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2
590 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21
591 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22
592 ; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1
594 ; CORTEX-A12-DEFAULT: .cpu cortex-a12
595 ; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10
596 ; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65
597 ; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1
598 ; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2
599 ; CORTEX-A12-DEFAULT: .fpu neon-vfpv4
600 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19
601 ;; We default to IEEE 754 compliance
602 ; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1
603 ; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1
604 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22
605 ; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3
606 ; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1
607 ; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1
608 ; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1
609 ; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2
610 ; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3
612 ; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19
613 ;; The A12 defaults to a VFPv3 FPU, so it flushes preseving sign when
614 ;; -ffast-math is specified.
615 ; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2
616 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21
617 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22
618 ; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1
620 ; CORTEX-A12-NOFPU: .cpu cortex-a12
621 ; CORTEX-A12-NOFPU: .eabi_attribute 6, 10
622 ; CORTEX-A12-NOFPU: .eabi_attribute 7, 65
623 ; CORTEX-A12-NOFPU: .eabi_attribute 8, 1
624 ; CORTEX-A12-NOFPU: .eabi_attribute 9, 2
625 ; CORTEX-A12-NOFPU-NOT: .fpu
626 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19
627 ;; We default to IEEE 754 compliance
628 ; CORTEX-A12-NOFPU: .eabi_attribute 20, 1
629 ; CORTEX-A12-NOFPU: .eabi_attribute 21, 1
630 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22
631 ; CORTEX-A12-NOFPU: .eabi_attribute 23, 3
632 ; CORTEX-A12-NOFPU: .eabi_attribute 24, 1
633 ; CORTEX-A12-NOFPU: .eabi_attribute 25, 1
634 ; CORTEX-A12-NOFPU: .eabi_attribute 42, 1
635 ; CORTEX-A12-NOFPU: .eabi_attribute 44, 2
636 ; CORTEX-A12-NOFPU: .eabi_attribute 68, 3
638 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19
639 ;; Despite there being no FPU, we chose to flush to zero preserving
640 ;; sign. This matches what the hardware would do for this architecture
642 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2
643 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21
644 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22
645 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1
647 ; CORTEX-A15: .cpu cortex-a15
648 ; CORTEX-A15: .eabi_attribute 6, 10
649 ; CORTEX-A15: .eabi_attribute 7, 65
650 ; CORTEX-A15: .eabi_attribute 8, 1
651 ; CORTEX-A15: .eabi_attribute 9, 2
652 ; CORTEX-A15: .fpu neon-vfpv4
653 ; CORTEX-A15-NOT: .eabi_attribute 19
654 ;; We default to IEEE 754 compliance
655 ; CORTEX-A15: .eabi_attribute 20, 1
656 ; CORTEX-A15: .eabi_attribute 21, 1
657 ; CORTEX-A15-NOT: .eabi_attribute 22
658 ; CORTEX-A15: .eabi_attribute 23, 3
659 ; CORTEX-A15: .eabi_attribute 24, 1
660 ; CORTEX-A15: .eabi_attribute 25, 1
661 ; CORTEX-A15-NOT: .eabi_attribute 27
662 ; CORTEX-A15-NOT: .eabi_attribute 28
663 ; CORTEX-A15: .eabi_attribute 36, 1
664 ; CORTEX-A15: .eabi_attribute 38, 1
665 ; CORTEX-A15: .eabi_attribute 42, 1
666 ; CORTEX-A15: .eabi_attribute 44, 2
667 ; CORTEX-A15: .eabi_attribute 68, 3
669 ; CORTEX-A15-FAST-NOT: .eabi_attribute 19
670 ;; The A15 defaults to a VFPv3 FPU, so it flushes preseving sign when
671 ;; -ffast-math is specified.
672 ; CORTEX-A15-FAST: .eabi_attribute 20, 2
673 ; CORTEX-A15-FAST-NOT: .eabi_attribute 21
674 ; CORTEX-A15-FAST-NOT: .eabi_attribute 22
675 ; CORTEX-A15-FAST: .eabi_attribute 23, 1
677 ; CORTEX-A17-DEFAULT: .cpu cortex-a17
678 ; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10
679 ; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65
680 ; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1
681 ; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2
682 ; CORTEX-A17-DEFAULT: .fpu neon-vfpv4
683 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19
684 ;; We default to IEEE 754 compliance
685 ; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1
686 ; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1
687 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22
688 ; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3
689 ; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1
690 ; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1
691 ; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1
692 ; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2
693 ; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3
695 ; CORTEX-A17-FAST-NOT: .eabi_attribute 19
696 ;; The A17 defaults to a VFPv3 FPU, so it flushes preseving sign when
697 ;; -ffast-math is specified.
698 ; CORTEX-A17-FAST: .eabi_attribute 20, 2
699 ; CORTEX-A17-FAST-NOT: .eabi_attribute 21
700 ; CORTEX-A17-FAST-NOT: .eabi_attribute 22
701 ; CORTEX-A17-FAST: .eabi_attribute 23, 1
703 ; CORTEX-A17-NOFPU: .cpu cortex-a17
704 ; CORTEX-A17-NOFPU: .eabi_attribute 6, 10
705 ; CORTEX-A17-NOFPU: .eabi_attribute 7, 65
706 ; CORTEX-A17-NOFPU: .eabi_attribute 8, 1
707 ; CORTEX-A17-NOFPU: .eabi_attribute 9, 2
708 ; CORTEX-A17-NOFPU-NOT: .fpu
709 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19
710 ;; We default to IEEE 754 compliance
711 ; CORTEX-A17-NOFPU: .eabi_attribute 20, 1
712 ; CORTEX-A17-NOFPU: .eabi_attribute 21, 1
713 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22
714 ; CORTEX-A17-NOFPU: .eabi_attribute 23, 3
715 ; CORTEX-A17-NOFPU: .eabi_attribute 24, 1
716 ; CORTEX-A17-NOFPU: .eabi_attribute 25, 1
717 ; CORTEX-A17-NOFPU: .eabi_attribute 42, 1
718 ; CORTEX-A17-NOFPU: .eabi_attribute 44, 2
719 ; CORTEX-A17-NOFPU: .eabi_attribute 68, 3
721 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19
722 ;; Despite there being no FPU, we chose to flush to zero preserving
723 ;; sign. This matches what the hardware would do for this architecture
725 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2
726 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21
727 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22
728 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1
730 ; CORTEX-M0: .cpu cortex-m0
731 ; CORTEX-M0: .eabi_attribute 6, 12
732 ; CORTEX-M0-NOT: .eabi_attribute 7
733 ; CORTEX-M0: .eabi_attribute 8, 0
734 ; CORTEX-M0: .eabi_attribute 9, 1
735 ; CORTEX-M0-NOT: .eabi_attribute 19
736 ;; We default to IEEE 754 compliance
737 ; CORTEX-M0: .eabi_attribute 20, 1
738 ; CORTEX-M0: .eabi_attribute 21, 1
739 ; CORTEX-M0-NOT: .eabi_attribute 22
740 ; CORTEX-M0: .eabi_attribute 23, 3
741 ; CORTEX-M0: .eabi_attribute 34, 0
742 ; CORTEX-M0: .eabi_attribute 24, 1
743 ; CORTEX-M0: .eabi_attribute 25, 1
744 ; CORTEX-M0-NOT: .eabi_attribute 27
745 ; CORTEX-M0-NOT: .eabi_attribute 28
746 ; CORTEX-M0-NOT: .eabi_attribute 36
747 ; CORTEX-M0: .eabi_attribute 38, 1
748 ; CORTEX-M0-NOT: .eabi_attribute 42
749 ; CORTEX-M0-NOT: .eabi_attribute 44
750 ; CORTEX-M0-NOT: .eabi_attribute 68
752 ; CORTEX-M0-FAST-NOT: .eabi_attribute 19
753 ;; Despite the M0 CPU having no FPU in this scenario, we chose to
754 ;; flush to positive zero here. There's no hardware support doing
755 ;; this, but the fast maths software library might and such behaviour
756 ;; would match hardware support on this architecture revision if it
758 ; CORTEX-M0-FAST-NOT: .eabi_attribute 20
759 ; CORTEX-M0-FAST-NOT: .eabi_attribute 21
760 ; CORTEX-M0-FAST-NOT: .eabi_attribute 22
761 ; CORTEX-M0-FAST: .eabi_attribute 23, 1
763 ; CORTEX-M0PLUS: .cpu cortex-m0plus
764 ; CORTEX-M0PLUS: .eabi_attribute 6, 12
765 ; CORTEX-M0PLUS-NOT: .eabi_attribute 7
766 ; CORTEX-M0PLUS: .eabi_attribute 8, 0
767 ; CORTEX-M0PLUS: .eabi_attribute 9, 1
768 ; CORTEX-M0PLUS-NOT: .eabi_attribute 19
769 ;; We default to IEEE 754 compliance
770 ; CORTEX-M0PLUS: .eabi_attribute 20, 1
771 ; CORTEX-M0PLUS: .eabi_attribute 21, 1
772 ; CORTEX-M0PLUS-NOT: .eabi_attribute 22
773 ; CORTEX-M0PLUS: .eabi_attribute 23, 3
774 ; CORTEX-M0PLUS: .eabi_attribute 24, 1
775 ; CORTEX-M0PLUS: .eabi_attribute 25, 1
776 ; CORTEX-M0PLUS-NOT: .eabi_attribute 27
777 ; CORTEX-M0PLUS-NOT: .eabi_attribute 28
778 ; CORTEX-M0PLUS-NOT: .eabi_attribute 36
779 ; CORTEX-M0PLUS: .eabi_attribute 38, 1
780 ; CORTEX-M0PLUS-NOT: .eabi_attribute 42
781 ; CORTEX-M0PLUS-NOT: .eabi_attribute 44
782 ; CORTEX-M0PLUS-NOT: .eabi_attribute 68
784 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19
785 ;; Despite the M0+ CPU having no FPU in this scenario, we chose to
786 ;; flush to positive zero here. There's no hardware support doing
787 ;; this, but the fast maths software library might and such behaviour
788 ;; would match hardware support on this architecture revision if it
790 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20
791 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21
792 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22
793 ; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1
795 ; CORTEX-M1: .cpu cortex-m1
796 ; CORTEX-M1: .eabi_attribute 6, 12
797 ; CORTEX-M1-NOT: .eabi_attribute 7
798 ; CORTEX-M1: .eabi_attribute 8, 0
799 ; CORTEX-M1: .eabi_attribute 9, 1
800 ; CORTEX-M1-NOT: .eabi_attribute 19
801 ;; We default to IEEE 754 compliance
802 ; CORTEX-M1: .eabi_attribute 20, 1
803 ; CORTEX-M1: .eabi_attribute 21, 1
804 ; CORTEX-M1-NOT: .eabi_attribute 22
805 ; CORTEX-M1: .eabi_attribute 23, 3
806 ; CORTEX-M1: .eabi_attribute 24, 1
807 ; CORTEX-M1: .eabi_attribute 25, 1
808 ; CORTEX-M1-NOT: .eabi_attribute 27
809 ; CORTEX-M1-NOT: .eabi_attribute 28
810 ; CORTEX-M1-NOT: .eabi_attribute 36
811 ; CORTEX-M1: .eabi_attribute 38, 1
812 ; CORTEX-M1-NOT: .eabi_attribute 42
813 ; CORTEX-M1-NOT: .eabi_attribute 44
814 ; CORTEX-M1-NOT: .eabi_attribute 68
816 ; CORTEX-M1-FAST-NOT: .eabi_attribute 19
817 ;; Despite the M1 CPU having no FPU in this scenario, we chose to
818 ;; flush to positive zero here. There's no hardware support doing
819 ;; this, but the fast maths software library might and such behaviour
820 ;; would match hardware support on this architecture revision if it
822 ; CORTEX-M1-FAST-NOT: .eabi_attribute 20
823 ; CORTEX-M1-FAST-NOT: .eabi_attribute 21
824 ; CORTEX-M1-FAST-NOT: .eabi_attribute 22
825 ; CORTEX-M1-FAST: .eabi_attribute 23, 1
828 ; SC000: .eabi_attribute 6, 12
829 ; SC000-NOT: .eabi_attribute 7
830 ; SC000: .eabi_attribute 8, 0
831 ; SC000: .eabi_attribute 9, 1
832 ; SC000-NOT: .eabi_attribute 19
833 ;; We default to IEEE 754 compliance
834 ; SC000: .eabi_attribute 20, 1
835 ; SC000: .eabi_attribute 21, 1
836 ; SC000-NOT: .eabi_attribute 22
837 ; SC000: .eabi_attribute 23, 3
838 ; SC000: .eabi_attribute 24, 1
839 ; SC000: .eabi_attribute 25, 1
840 ; SC000-NOT: .eabi_attribute 27
841 ; SC000-NOT: .eabi_attribute 28
842 ; SC000-NOT: .eabi_attribute 36
843 ; SC000: .eabi_attribute 38, 1
844 ; SC000-NOT: .eabi_attribute 42
845 ; SC000-NOT: .eabi_attribute 44
846 ; SC000-NOT: .eabi_attribute 68
848 ; SC000-FAST-NOT: .eabi_attribute 19
849 ;; Despite the SC000 CPU having no FPU in this scenario, we chose to
850 ;; flush to positive zero here. There's no hardware support doing
851 ;; this, but the fast maths software library might and such behaviour
852 ;; would match hardware support on this architecture revision if it
854 ; SC000-FAST-NOT: .eabi_attribute 20
855 ; SC000-FAST-NOT: .eabi_attribute 21
856 ; SC000-FAST-NOT: .eabi_attribute 22
857 ; SC000-FAST: .eabi_attribute 23, 1
859 ; CORTEX-M3: .cpu cortex-m3
860 ; CORTEX-M3: .eabi_attribute 6, 10
861 ; CORTEX-M3: .eabi_attribute 7, 77
862 ; CORTEX-M3: .eabi_attribute 8, 0
863 ; CORTEX-M3: .eabi_attribute 9, 2
864 ; CORTEX-M3-NOT: .eabi_attribute 19
865 ;; We default to IEEE 754 compliance
866 ; CORTEX-M3: .eabi_attribute 20, 1
867 ; CORTEX-M3: .eabi_attribute 21, 1
868 ; CORTEX-M3-NOT: .eabi_attribute 22
869 ; CORTEX-M3: .eabi_attribute 23, 3
870 ; CORTEX-M3: .eabi_attribute 24, 1
871 ; CORTEX-M3: .eabi_attribute 25, 1
872 ; CORTEX-M3-NOT: .eabi_attribute 27
873 ; CORTEX-M3-NOT: .eabi_attribute 28
874 ; CORTEX-M3-NOT: .eabi_attribute 36
875 ; CORTEX-M3: .eabi_attribute 38, 1
876 ; CORTEX-M3-NOT: .eabi_attribute 42
877 ; CORTEX-M3-NOT: .eabi_attribute 44
878 ; CORTEX-M3-NOT: .eabi_attribute 68
880 ; CORTEX-M3-FAST-NOT: .eabi_attribute 19
881 ;; Despite there being no FPU, we chose to flush to zero preserving
882 ;; sign. This matches what the hardware would do for this architecture
884 ; CORTEX-M3-FAST: .eabi_attribute 20, 2
885 ; CORTEX-M3-FAST-NOT: .eabi_attribute 21
886 ; CORTEX-M3-FAST-NOT: .eabi_attribute 22
887 ; CORTEX-M3-FAST: .eabi_attribute 23, 1
890 ; SC300: .eabi_attribute 6, 10
891 ; SC300: .eabi_attribute 7, 77
892 ; SC300: .eabi_attribute 8, 0
893 ; SC300: .eabi_attribute 9, 2
894 ; SC300-NOT: .eabi_attribute 19
895 ;; We default to IEEE 754 compliance
896 ; SC300: .eabi_attribute 20, 1
897 ; SC300: .eabi_attribute 21, 1
898 ; SC300-NOT: .eabi_attribute 22
899 ; SC300: .eabi_attribute 23, 3
900 ; SC300: .eabi_attribute 24, 1
901 ; SC300: .eabi_attribute 25, 1
902 ; SC300-NOT: .eabi_attribute 27
903 ; SC300-NOT: .eabi_attribute 28
904 ; SC300-NOT: .eabi_attribute 36
905 ; SC300: .eabi_attribute 38, 1
906 ; SC300-NOT: .eabi_attribute 42
907 ; SC300-NOT: .eabi_attribute 44
908 ; SC300-NOT: .eabi_attribute 68
910 ; SC300-FAST-NOT: .eabi_attribute 19
911 ;; Despite there being no FPU, we chose to flush to zero preserving
912 ;; sign. This matches what the hardware would do for this architecture
914 ; SC300-FAST: .eabi_attribute 20, 2
915 ; SC300-FAST-NOT: .eabi_attribute 21
916 ; SC300-FAST-NOT: .eabi_attribute 22
917 ; SC300-FAST: .eabi_attribute 23, 1
919 ; CORTEX-M4-SOFT: .cpu cortex-m4
920 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13
921 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77
922 ; CORTEX-M4-SOFT: .eabi_attribute 8, 0
923 ; CORTEX-M4-SOFT: .eabi_attribute 9, 2
924 ; CORTEX-M4-SOFT: .fpu fpv4-sp-d16
925 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 19
926 ;; We default to IEEE 754 compliance
927 ; CORTEX-M4-SOFT: .eabi_attribute 20, 1
928 ; CORTEX-M4-SOFT: .eabi_attribute 21, 1
929 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 22
930 ; CORTEX-M4-SOFT: .eabi_attribute 23, 3
931 ; CORTEX-M4-SOFT: .eabi_attribute 24, 1
932 ; CORTEX-M4-SOFT: .eabi_attribute 25, 1
933 ; CORTEX-M4-SOFT: .eabi_attribute 27, 1
934 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 28
935 ; CORTEX-M4-SOFT: .eabi_attribute 36, 1
936 ; CORTEX-M4-SOFT: .eabi_attribute 38, 1
937 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 42
938 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 44
939 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 68
941 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19
942 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
943 ;; -ffast-math is specified.
944 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2
945 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21
946 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22
947 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1
949 ; CORTEX-M4-HARD: .cpu cortex-m4
950 ; CORTEX-M4-HARD: .eabi_attribute 6, 13
951 ; CORTEX-M4-HARD: .eabi_attribute 7, 77
952 ; CORTEX-M4-HARD: .eabi_attribute 8, 0
953 ; CORTEX-M4-HARD: .eabi_attribute 9, 2
954 ; CORTEX-M4-HARD: .fpu fpv4-sp-d16
955 ; CORTEX-M4-HARD-NOT: .eabi_attribute 19
956 ;; We default to IEEE 754 compliance
957 ; CORTEX-M4-HARD: .eabi_attribute 20, 1
958 ; CORTEX-M4-HARD: .eabi_attribute 21, 1
959 ; CORTEX-M4-HARD-NOT: .eabi_attribute 22
960 ; CORTEX-M4-HARD: .eabi_attribute 23, 3
961 ; CORTEX-M4-HARD: .eabi_attribute 24, 1
962 ; CORTEX-M4-HARD: .eabi_attribute 25, 1
963 ; CORTEX-M4-HARD: .eabi_attribute 27, 1
964 ; CORTEX-M4-HARD: .eabi_attribute 28, 1
965 ; CORTEX-M4-HARD: .eabi_attribute 36, 1
966 ; CORTEX-M4-HARD: .eabi_attribute 38, 1
967 ; CORTEX-M4-HARD-NOT: .eabi_attribute 42
968 ; CORTEX-M4-HARD-NOT: .eabi_attribute 44
969 ; CORTEX-M4-HARD-NOT: .eabi_attribute 68
971 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19
972 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
973 ;; -ffast-math is specified.
974 ; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2
975 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21
976 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22
977 ; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1
979 ; CORTEX-M7: .cpu cortex-m7
980 ; CORTEX-M7: .eabi_attribute 6, 13
981 ; CORTEX-M7: .eabi_attribute 7, 77
982 ; CORTEX-M7: .eabi_attribute 8, 0
983 ; CORTEX-M7: .eabi_attribute 9, 2
984 ; CORTEX-M7-SOFT-NOT: .fpu
985 ; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16
986 ; CORTEX-M7-DOUBLE: .fpu fpv5-d16
987 ; CORTEX-M7: .eabi_attribute 17, 1
988 ; CORTEX-M7-NOT: .eabi_attribute 19
989 ;; We default to IEEE 754 compliance
990 ; CORTEX-M7: .eabi_attribute 20, 1
991 ; CORTEX-M7: .eabi_attribute 21, 1
992 ; CORTEX-M7-NOT: .eabi_attribute 22
993 ; CORTEX-M7: .eabi_attribute 23, 3
994 ; CORTEX-M7: .eabi_attribute 24, 1
995 ; CORTEX-M7: .eabi_attribute 25, 1
996 ; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
997 ; CORTEX-M7-SINGLE: .eabi_attribute 27, 1
998 ; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
999 ; CORTEX-M7: .eabi_attribute 36, 1
1000 ; CORTEX-M7: .eabi_attribute 38, 1
1001 ; CORTEX-M7-NOT: .eabi_attribute 44
1002 ; CORTEX-M7: .eabi_attribute 14, 0
1004 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19
1005 ;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1006 ; CORTEX-M7-FAST: .eabi_attribute 20, 2
1007 ;; Despite there being no FPU, we chose to flush to zero preserving
1008 ;; sign. This matches what the hardware would do for this architecture
1010 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1011 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21
1012 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22
1013 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1
1015 ; CORTEX-R4: .cpu cortex-r4
1016 ; CORTEX-R4: .eabi_attribute 6, 10
1017 ; CORTEX-R4: .eabi_attribute 7, 82
1018 ; CORTEX-R4: .eabi_attribute 8, 1
1019 ; CORTEX-R4: .eabi_attribute 9, 2
1020 ; CORTEX-R4-NOT: .fpu vfpv3-d16
1021 ; CORTEX-R4-NOT: .eabi_attribute 19
1022 ;; We default to IEEE 754 compliance
1023 ; CORTEX-R4: .eabi_attribute 20, 1
1024 ; CORTEX-R4: .eabi_attribute 21, 1
1025 ; CORTEX-R4-NOT: .eabi_attribute 22
1026 ; CORTEX-R4: .eabi_attribute 23, 3
1027 ; CORTEX-R4: .eabi_attribute 24, 1
1028 ; CORTEX-R4: .eabi_attribute 25, 1
1029 ; CORTEX-R4-NOT: .eabi_attribute 28
1030 ; CORTEX-R4-NOT: .eabi_attribute 36
1031 ; CORTEX-R4: .eabi_attribute 38, 1
1032 ; CORTEX-R4-NOT: .eabi_attribute 42
1033 ; CORTEX-R4-NOT: .eabi_attribute 44
1034 ; CORTEX-R4-NOT: .eabi_attribute 68
1036 ; CORTEX-R4F: .cpu cortex-r4f
1037 ; CORTEX-R4F: .eabi_attribute 6, 10
1038 ; CORTEX-R4F: .eabi_attribute 7, 82
1039 ; CORTEX-R4F: .eabi_attribute 8, 1
1040 ; CORTEX-R4F: .eabi_attribute 9, 2
1041 ; CORTEX-R4F: .fpu vfpv3-d16
1042 ; CORTEX-R4F-NOT: .eabi_attribute 19
1043 ;; We default to IEEE 754 compliance
1044 ; CORTEX-R4F: .eabi_attribute 20, 1
1045 ; CORTEX-R4F: .eabi_attribute 21, 1
1046 ; CORTEX-R4F-NOT: .eabi_attribute 22
1047 ; CORTEX-R4F: .eabi_attribute 23, 3
1048 ; CORTEX-R4F: .eabi_attribute 24, 1
1049 ; CORTEX-R4F: .eabi_attribute 25, 1
1050 ; CORTEX-R4F-NOT: .eabi_attribute 27, 1
1051 ; CORTEX-R4F-NOT: .eabi_attribute 28
1052 ; CORTEX-R4F-NOT: .eabi_attribute 36
1053 ; CORTEX-R4F: .eabi_attribute 38, 1
1054 ; CORTEX-R4F-NOT: .eabi_attribute 42
1055 ; CORTEX-R4F-NOT: .eabi_attribute 44
1056 ; CORTEX-R4F-NOT: .eabi_attribute 68
1058 ; CORTEX-R5: .cpu cortex-r5
1059 ; CORTEX-R5: .eabi_attribute 6, 10
1060 ; CORTEX-R5: .eabi_attribute 7, 82
1061 ; CORTEX-R5: .eabi_attribute 8, 1
1062 ; CORTEX-R5: .eabi_attribute 9, 2
1063 ; CORTEX-R5: .fpu vfpv3-d16
1064 ; CORTEX-R5-NOT: .eabi_attribute 19
1065 ;; We default to IEEE 754 compliance
1066 ; CORTEX-R5: .eabi_attribute 20, 1
1067 ; CORTEX-R5: .eabi_attribute 21, 1
1068 ; CORTEX-R5-NOT: .eabi_attribute 22
1069 ; CORTEX-R5: .eabi_attribute 23, 3
1070 ; CORTEX-R5: .eabi_attribute 24, 1
1071 ; CORTEX-R5: .eabi_attribute 25, 1
1072 ; CORTEX-R5-NOT: .eabi_attribute 27, 1
1073 ; CORTEX-R5-NOT: .eabi_attribute 28
1074 ; CORTEX-R5-NOT: .eabi_attribute 36
1075 ; CORTEX-R5: .eabi_attribute 38, 1
1076 ; CORTEX-R5-NOT: .eabi_attribute 42
1077 ; CORTEX-R5: .eabi_attribute 44, 2
1078 ; CORTEX-R5-NOT: .eabi_attribute 68
1080 ; CORTEX-R5-FAST-NOT: .eabi_attribute 19
1081 ;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1082 ; CORTEX-R5-FAST: .eabi_attribute 20, 2
1083 ; CORTEX-R5-FAST-NOT: .eabi_attribute 21
1084 ; CORTEX-R5-FAST-NOT: .eabi_attribute 22
1085 ; CORTEX-R5-FAST: .eabi_attribute 23, 1
1087 ; CORTEX-R7: .cpu cortex-r7
1088 ; CORTEX-R7: .eabi_attribute 6, 10
1089 ; CORTEX-R7: .eabi_attribute 7, 82
1090 ; CORTEX-R7: .eabi_attribute 8, 1
1091 ; CORTEX-R7: .eabi_attribute 9, 2
1092 ; CORTEX-R7: .fpu vfpv3xd
1093 ; CORTEX-R7-NOT: .eabi_attribute 19
1094 ;; We default to IEEE 754 compliance
1095 ; CORTEX-R7: .eabi_attribute 20, 1
1096 ; CORTEX-R7: .eabi_attribute 21, 1
1097 ; CORTEX-R7-NOT: .eabi_attribute 22
1098 ; CORTEX-R7: .eabi_attribute 23, 3
1099 ; CORTEX-R7: .eabi_attribute 24, 1
1100 ; CORTEX-R7: .eabi_attribute 25, 1
1101 ; CORTEX-R7: .eabi_attribute 27, 1
1102 ; CORTEX-R7-NOT: .eabi_attribute 28
1103 ; CORTEX-R7-NOT: .eabi_attribute 36
1104 ; CORTEX-R7: .eabi_attribute 38, 1
1105 ; CORTEX-R7: .eabi_attribute 42, 1
1106 ; CORTEX-R7: .eabi_attribute 44, 2
1107 ; CORTEX-R7-NOT: .eabi_attribute 68
1109 ; CORTEX-R7-FAST-NOT: .eabi_attribute 19
1110 ;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1111 ; CORTEX-R7-FAST: .eabi_attribute 20, 2
1112 ; CORTEX-R7-FAST-NOT: .eabi_attribute 21
1113 ; CORTEX-R7-FAST-NOT: .eabi_attribute 22
1114 ; CORTEX-R7-FAST: .eabi_attribute 23, 1
1116 ; CORTEX-A53: .cpu cortex-a53
1117 ; CORTEX-A53: .eabi_attribute 6, 14
1118 ; CORTEX-A53: .eabi_attribute 7, 65
1119 ; CORTEX-A53: .eabi_attribute 8, 1
1120 ; CORTEX-A53: .eabi_attribute 9, 2
1121 ; CORTEX-A53: .fpu crypto-neon-fp-armv8
1122 ; CORTEX-A53: .eabi_attribute 12, 3
1123 ; CORTEX-A53-NOT: .eabi_attribute 19
1124 ;; We default to IEEE 754 compliance
1125 ; CORTEX-A53: .eabi_attribute 20, 1
1126 ; CORTEX-A53: .eabi_attribute 21, 1
1127 ; CORTEX-A53-NOT: .eabi_attribute 22
1128 ; CORTEX-A53: .eabi_attribute 23, 3
1129 ; CORTEX-A53: .eabi_attribute 24, 1
1130 ; CORTEX-A53: .eabi_attribute 25, 1
1131 ; CORTEX-A53-NOT: .eabi_attribute 27
1132 ; CORTEX-A53-NOT: .eabi_attribute 28
1133 ; CORTEX-A53: .eabi_attribute 36, 1
1134 ; CORTEX-A53: .eabi_attribute 38, 1
1135 ; CORTEX-A53: .eabi_attribute 42, 1
1136 ; CORTEX-A53-NOT: .eabi_attribute 44
1137 ; CORTEX-A53: .eabi_attribute 68, 3
1139 ; CORTEX-A53-FAST-NOT: .eabi_attribute 19
1140 ;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1141 ; CORTEX-A53-FAST: .eabi_attribute 20, 2
1142 ; CORTEX-A53-FAST-NOT: .eabi_attribute 21
1143 ; CORTEX-A53-FAST-NOT: .eabi_attribute 22
1144 ; CORTEX-A53-FAST: .eabi_attribute 23, 1
1146 ; CORTEX-A57: .cpu cortex-a57
1147 ; CORTEX-A57: .eabi_attribute 6, 14
1148 ; CORTEX-A57: .eabi_attribute 7, 65
1149 ; CORTEX-A57: .eabi_attribute 8, 1
1150 ; CORTEX-A57: .eabi_attribute 9, 2
1151 ; CORTEX-A57: .fpu crypto-neon-fp-armv8
1152 ; CORTEX-A57: .eabi_attribute 12, 3
1153 ; CORTEX-A57-NOT: .eabi_attribute 19
1154 ;; We default to IEEE 754 compliance
1155 ; CORTEX-A57: .eabi_attribute 20, 1
1156 ; CORTEX-A57: .eabi_attribute 21, 1
1157 ; CORTEX-A57-NOT: .eabi_attribute 22
1158 ; CORTEX-A57: .eabi_attribute 23, 3
1159 ; CORTEX-A57: .eabi_attribute 24, 1
1160 ; CORTEX-A57: .eabi_attribute 25, 1
1161 ; CORTEX-A57-NOT: .eabi_attribute 27
1162 ; CORTEX-A57-NOT: .eabi_attribute 28
1163 ; CORTEX-A57: .eabi_attribute 36, 1
1164 ; CORTEX-A57: .eabi_attribute 38, 1
1165 ; CORTEX-A57: .eabi_attribute 42, 1
1166 ; CORTEX-A57-NOT: .eabi_attribute 44
1167 ; CORTEX-A57: .eabi_attribute 68, 3
1169 ; CORTEX-A57-FAST-NOT: .eabi_attribute 19
1170 ;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1171 ; CORTEX-A57-FAST: .eabi_attribute 20, 2
1172 ; CORTEX-A57-FAST-NOT: .eabi_attribute 21
1173 ; CORTEX-A57-FAST-NOT: .eabi_attribute 22
1174 ; CORTEX-A57-FAST: .eabi_attribute 23, 1
1176 ; CORTEX-A72: .cpu cortex-a72
1177 ; CORTEX-A72: .eabi_attribute 6, 14
1178 ; CORTEX-A72: .eabi_attribute 7, 65
1179 ; CORTEX-A72: .eabi_attribute 8, 1
1180 ; CORTEX-A72: .eabi_attribute 9, 2
1181 ; CORTEX-A72: .fpu crypto-neon-fp-armv8
1182 ; CORTEX-A72: .eabi_attribute 12, 3
1183 ; CORTEX-A72-NOT: .eabi_attribute 19
1184 ;; We default to IEEE 754 compliance
1185 ; CORTEX-A72: .eabi_attribute 20, 1
1186 ; CORTEX-A72: .eabi_attribute 21, 1
1187 ; CORTEX-A72-NOT: .eabi_attribute 22
1188 ; CORTEX-A72: .eabi_attribute 23, 3
1189 ; CORTEX-A72: .eabi_attribute 24, 1
1190 ; CORTEX-A72: .eabi_attribute 25, 1
1191 ; CORTEX-A72-NOT: .eabi_attribute 27
1192 ; CORTEX-A72-NOT: .eabi_attribute 28
1193 ; CORTEX-A72: .eabi_attribute 36, 1
1194 ; CORTEX-A72: .eabi_attribute 38, 1
1195 ; CORTEX-A72: .eabi_attribute 42, 1
1196 ; CORTEX-A72-NOT: .eabi_attribute 44
1197 ; CORTEX-A72: .eabi_attribute 68, 3
1199 ; CORTEX-A72-FAST-NOT: .eabi_attribute 19
1200 ;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1201 ; CORTEX-A72-FAST: .eabi_attribute 20, 2
1202 ; CORTEX-A72-FAST-NOT: .eabi_attribute 21
1203 ; CORTEX-A72-FAST-NOT: .eabi_attribute 22
1204 ; CORTEX-A72-FAST: .eabi_attribute 23, 1
1206 ; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1207 ; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1208 ; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1209 ; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1210 ; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1212 ; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14
1213 ; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65
1214 ; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1
1215 ; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2
1216 ; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8
1217 ; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4
1218 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19
1219 ;; We default to IEEE 754 compliance
1220 ; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1
1221 ; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1
1222 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22
1223 ; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3
1224 ; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1
1225 ; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1
1226 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27
1227 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28
1228 ; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1
1229 ; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1
1230 ; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1
1231 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44
1232 ; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3
1234 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19
1235 ;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1236 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2
1237 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21
1238 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22
1239 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1
1241 ; RELOC-PIC: .eabi_attribute 15, 1
1242 ; RELOC-PIC: .eabi_attribute 16, 1
1243 ; RELOC-PIC: .eabi_attribute 17, 2
1244 ; RELOC-OTHER: .eabi_attribute 17, 1
1246 ; PCS-R9-USE: .eabi_attribute 14, 0
1247 ; PCS-R9-RESERVE: .eabi_attribute 14, 3
1249 define i32 @f(i64 %z) {