1 ; This tests that MC/asm header conversion is smooth and that the
2 ; build attributes are correct
4 ; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale | FileCheck %s --check-prefix=XSCALE
5 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s --check-prefix=V6
6 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi | FileCheck %s --check-prefix=V6M
9 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi | FileCheck %s --check-prefix=V6M
11 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s | FileCheck %s --check-prefix=ARM1156T2F-S
13 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
31 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
32 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
33 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
34 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
35 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
36 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
37 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
38 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
39 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
40 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
41 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
42 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
43 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
44 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
45 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
46 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
47 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
48 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
49 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
51 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
52 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
53 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
54 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
55 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
56 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
57 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
58 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS
59 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
60 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
61 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1
62 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
63 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
64 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 | FileCheck %s --check-prefix=SC000
65 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
66 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
67 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
68 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
69 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
70 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
71 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
72 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
73 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
74 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
75 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
76 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
77 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
78 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
79 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
80 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
81 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
82 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
83 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
84 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
85 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
86 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
87 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
88 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
89 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
90 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
91 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
92 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
93 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
94 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
95 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
96 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
97 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
98 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
99 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
100 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
101 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
102 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
103 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
104 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK
105 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST
106 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
107 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
108 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
109 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
110 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
111 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
112 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
113 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
114 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
115 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
116 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=RELOC-OTHER
117 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=PCS-R9-USE
118 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -arm-reserve-r9 | FileCheck %s --check-prefix=PCS-R9-RESERVE
121 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
122 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
123 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
125 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
126 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
127 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
128 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
129 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
130 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
132 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
133 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
134 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
136 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
137 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
138 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
140 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
141 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
142 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
144 ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
145 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=STRICT-ALIGN
146 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
147 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
149 ; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
150 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=STRICT-ALIGN
151 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
152 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
154 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-no-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
155 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
156 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -arm-no-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
157 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
158 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
159 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
161 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
162 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
163 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=STRICT-ALIGN
165 ; XSCALE: .eabi_attribute 6, 5
166 ; XSCALE: .eabi_attribute 8, 1
167 ; XSCALE: .eabi_attribute 9, 1
169 ; DYN-ROUNDING: .eabi_attribute 19, 1
171 ; V6: .eabi_attribute 6, 6
172 ; V6: .eabi_attribute 8, 1
173 ;; We assume round-to-nearest by default (matches GCC)
174 ; V6-NOT: .eabi_attribute 19
175 ;; The default choice made by llc is for a V6 CPU without an FPU.
176 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
177 ;; software floating-point support. The choice is not important for targets without
179 ; V6: .eabi_attribute 20, 1
180 ; V6: .eabi_attribute 21, 1
181 ; V6-NOT: .eabi_attribute 22
182 ; V6: .eabi_attribute 23, 3
183 ; V6: .eabi_attribute 24, 1
184 ; V6: .eabi_attribute 25, 1
185 ; V6-NOT: .eabi_attribute 27
186 ; V6-NOT: .eabi_attribute 28
187 ; V6-NOT: .eabi_attribute 36
188 ; V6: .eabi_attribute 38, 1
189 ; V6-NOT: .eabi_attribute 42
190 ; V6-NOT: .eabi_attribute 44
191 ; V6-NOT: .eabi_attribute 68
193 ; V6-FAST-NOT: .eabi_attribute 19
194 ;; Despite the V6 CPU having no FPU by default, we chose to flush to
195 ;; positive zero here. There's no hardware support doing this, but the
196 ;; fast maths software library might.
197 ; V6-FAST-NOT: .eabi_attribute 20
198 ; V6-FAST-NOT: .eabi_attribute 21
199 ; V6-FAST-NOT: .eabi_attribute 22
200 ; V6-FAST: .eabi_attribute 23, 1
202 ;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
203 ;; V6-M, however we don't model the OS extension so this is fine.
204 ; V6M: .eabi_attribute 6, 12
205 ; V6M-NOT: .eabi_attribute 7
206 ; V6M: .eabi_attribute 8, 0
207 ; V6M: .eabi_attribute 9, 1
208 ; V6M-NOT: .eabi_attribute 19
209 ;; The default choice made by llc is for a V6M CPU without an FPU.
210 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
211 ;; software floating-point support. The choice is not important for targets without
213 ; V6M: .eabi_attribute 20, 1
214 ; V6M: .eabi_attribute 21, 1
215 ; V6M-NOT: .eabi_attribute 22
216 ; V6M: .eabi_attribute 23, 3
217 ; V6M: .eabi_attribute 24, 1
218 ; V6M: .eabi_attribute 25, 1
219 ; V6M-NOT: .eabi_attribute 27
220 ; V6M-NOT: .eabi_attribute 28
221 ; V6M-NOT: .eabi_attribute 36
222 ; V6M: .eabi_attribute 38, 1
223 ; V6M-NOT: .eabi_attribute 42
224 ; V6M-NOT: .eabi_attribute 44
225 ; V6M-NOT: .eabi_attribute 68
227 ; V6M-FAST-NOT: .eabi_attribute 19
228 ;; Despite the V6M CPU having no FPU by default, we chose to flush to
229 ;; positive zero here. There's no hardware support doing this, but the
230 ;; fast maths software library might.
231 ; V6M-FAST-NOT: .eabi_attribute 20
232 ; V6M-FAST-NOT: .eabi_attribute 21
233 ; V6M-FAST-NOT: .eabi_attribute 22
234 ; V6M-FAST: .eabi_attribute 23, 1
236 ; ARM1156T2F-S: .cpu arm1156t2f-s
237 ; ARM1156T2F-S: .eabi_attribute 6, 8
238 ; ARM1156T2F-S: .eabi_attribute 8, 1
239 ; ARM1156T2F-S: .eabi_attribute 9, 2
240 ; ARM1156T2F-S: .fpu vfpv2
241 ; ARM1156T2F-S-NOT: .eabi_attribute 19
242 ;; We default to IEEE 754 compliance
243 ; ARM1156T2F-S: .eabi_attribute 20, 1
244 ; ARM1156T2F-S: .eabi_attribute 21, 1
245 ; ARM1156T2F-S-NOT: .eabi_attribute 22
246 ; ARM1156T2F-S: .eabi_attribute 23, 3
247 ; ARM1156T2F-S: .eabi_attribute 24, 1
248 ; ARM1156T2F-S: .eabi_attribute 25, 1
249 ; ARM1156T2F-S-NOT: .eabi_attribute 27
250 ; ARM1156T2F-S-NOT: .eabi_attribute 28
251 ; ARM1156T2F-S-NOT: .eabi_attribute 36
252 ; ARM1156T2F-S: .eabi_attribute 38, 1
253 ; ARM1156T2F-S-NOT: .eabi_attribute 42
254 ; ARM1156T2F-S-NOT: .eabi_attribute 44
255 ; ARM1156T2F-S-NOT: .eabi_attribute 68
257 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19
258 ;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
259 ;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
260 ;; select. LLVM historically picks 0.
261 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
262 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21
263 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22
264 ; ARM1156T2F-S-FAST: .eabi_attribute 23, 1
266 ; V7M: .eabi_attribute 6, 10
267 ; V7M: .eabi_attribute 7, 77
268 ; V7M: .eabi_attribute 8, 0
269 ; V7M: .eabi_attribute 9, 2
270 ; V7M-NOT: .eabi_attribute 19
271 ;; The default choice made by llc is for a V7M CPU without an FPU.
272 ;; This is not an interesting detail, but for such CPUs, the default intention is to use
273 ;; software floating-point support. The choice is not important for targets without
275 ; V7M: .eabi_attribute 20, 1
276 ; V7M: .eabi_attribute 21, 1
277 ; V7M-NOT: .eabi_attribute 22
278 ; V7M: .eabi_attribute 23, 3
279 ; V7M: .eabi_attribute 24, 1
280 ; V7M: .eabi_attribute 25, 1
281 ; V7M-NOT: .eabi_attribute 27
282 ; V7M-NOT: .eabi_attribute 28
283 ; V7M-NOT: .eabi_attribute 36
284 ; V7M: .eabi_attribute 38, 1
285 ; V7M-NOT: .eabi_attribute 42
286 ; V7M-NOT: .eabi_attribute 44
287 ; V7M-NOT: .eabi_attribute 68
289 ; V7M-FAST-NOT: .eabi_attribute 19
290 ;; Despite the V7M CPU having no FPU by default, we chose to flush
291 ;; preserving sign. This matches what the hardware would do in the
292 ;; architecture revision were to exist on the current target.
293 ; V7M-FAST: .eabi_attribute 20, 2
294 ; V7M-FAST-NOT: .eabi_attribute 21
295 ; V7M-FAST-NOT: .eabi_attribute 22
296 ; V7M-FAST: .eabi_attribute 23, 1
298 ; V7: .syntax unified
299 ; V7: .eabi_attribute 6, 10
300 ; V7-NOT: .eabi_attribute 19
301 ;; In safe-maths mode we default to an IEEE 754 compliant choice.
302 ; V7: .eabi_attribute 20, 1
303 ; V7: .eabi_attribute 21, 1
304 ; V7-NOT: .eabi_attribute 22
305 ; V7: .eabi_attribute 23, 3
306 ; V7: .eabi_attribute 24, 1
307 ; V7: .eabi_attribute 25, 1
308 ; V7-NOT: .eabi_attribute 27
309 ; V7-NOT: .eabi_attribute 28
310 ; V7-NOT: .eabi_attribute 36
311 ; V7: .eabi_attribute 38, 1
312 ; V7-NOT: .eabi_attribute 42
313 ; V7-NOT: .eabi_attribute 44
314 ; V7-NOT: .eabi_attribute 68
316 ; V7-FAST-NOT: .eabi_attribute 19
317 ;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
318 ;; denormals to zero preserving the sign.
319 ; V7-FAST: .eabi_attribute 20, 2
320 ; V7-FAST-NOT: .eabi_attribute 21
321 ; V7-FAST-NOT: .eabi_attribute 22
322 ; V7-FAST: .eabi_attribute 23, 1
324 ; V8: .syntax unified
325 ; V8: .eabi_attribute 67, "2.09"
326 ; V8: .eabi_attribute 6, 14
327 ; V8-NOT: .eabi_attribute 19
328 ; V8: .eabi_attribute 20, 1
329 ; V8: .eabi_attribute 21, 1
330 ; V8-NOT: .eabi_attribute 22
331 ; V8: .eabi_attribute 23, 3
332 ; V8-NOT: .eabi_attribute 44
334 ; V8-FAST-NOT: .eabi_attribute 19
335 ;; The default does have an FPU, and for V8-A, it flushes preserving sign.
336 ; V8-FAST: .eabi_attribute 20, 2
337 ; V8-FAST-NOT: .eabi_attribute 21
338 ; V8-FAST-NOT: .eabi_attribute 22
339 ; V8-FAST: .eabi_attribute 23, 1
341 ; Vt8: .syntax unified
342 ; Vt8: .eabi_attribute 6, 14
343 ; Vt8-NOT: .eabi_attribute 19
344 ; Vt8: .eabi_attribute 20, 1
345 ; Vt8: .eabi_attribute 21, 1
346 ; Vt8-NOT: .eabi_attribute 22
347 ; Vt8: .eabi_attribute 23, 3
349 ; V8-FPARMv8: .syntax unified
350 ; V8-FPARMv8: .eabi_attribute 6, 14
351 ; V8-FPARMv8: .fpu fp-armv8
353 ; V8-NEON: .syntax unified
354 ; V8-NEON: .eabi_attribute 6, 14
356 ; V8-NEON: .eabi_attribute 12, 3
358 ; V8-FPARMv8-NEON: .syntax unified
359 ; V8-FPARMv8-NEON: .eabi_attribute 6, 14
360 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8
361 ; V8-FPARMv8-NEON: .eabi_attribute 12, 3
363 ; V8-FPARMv8-NEON-CRYPTO: .syntax unified
364 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
365 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
366 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
368 ; Tag_CPU_unaligned_access
369 ; NO-STRICT-ALIGN: .eabi_attribute 34, 1
370 ; STRICT-ALIGN: .eabi_attribute 34, 0
372 ; Tag_CPU_arch 'ARMv7'
373 ; CORTEX-A7-CHECK: .eabi_attribute 6, 10
374 ; CORTEX-A7-NOFPU: .eabi_attribute 6, 10
376 ; CORTEX-A7-FPUV4: .eabi_attribute 6, 10
378 ; Tag_CPU_arch_profile 'A'
379 ; CORTEX-A7-CHECK: .eabi_attribute 7, 65
380 ; CORTEX-A7-NOFPU: .eabi_attribute 7, 65
381 ; CORTEX-A7-FPUV4: .eabi_attribute 7, 65
384 ; CORTEX-A7-CHECK: .eabi_attribute 8, 1
385 ; CORTEX-A7-NOFPU: .eabi_attribute 8, 1
386 ; CORTEX-A7-FPUV4: .eabi_attribute 8, 1
389 ; CORTEX-A7-CHECK: .eabi_attribute 9, 2
390 ; CORTEX-A7-NOFPU: .eabi_attribute 9, 2
391 ; CORTEX-A7-FPUV4: .eabi_attribute 9, 2
393 ; CORTEX-A7-CHECK: .fpu neon-vfpv4
394 ; CORTEX-A7-NOFPU-NOT: .fpu
395 ; CORTEX-A7-FPUV4: .fpu vfpv4
397 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 19
398 ; Tag_ABI_FP_denormal
399 ;; We default to IEEE 754 compliance
400 ; CORTEX-A7-CHECK: .eabi_attribute 20, 1
401 ;; The A7 has VFPv3 support by default, so flush preserving sign.
402 ; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
403 ; CORTEX-A7-NOFPU: .eabi_attribute 20, 1
404 ;; Despite there being no FPU, we chose to flush to zero preserving
405 ;; sign. This matches what the hardware would do for this architecture
407 ; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
408 ; CORTEX-A7-FPUV4: .eabi_attribute 20, 1
409 ;; The VFPv4 FPU flushes preserving sign.
410 ; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
412 ; Tag_ABI_FP_exceptions
413 ; CORTEX-A7-CHECK: .eabi_attribute 21, 1
414 ; CORTEX-A7-NOFPU: .eabi_attribute 21, 1
415 ; CORTEX-A7-FPUV4: .eabi_attribute 21, 1
417 ; Tag_ABI_FP_user_exceptions
418 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 22
419 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22
420 ; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22
422 ; Tag_ABI_FP_number_model
423 ; CORTEX-A7-CHECK: .eabi_attribute 23, 3
424 ; CORTEX-A7-NOFPU: .eabi_attribute 23, 3
425 ; CORTEX-A7-FPUV4: .eabi_attribute 23, 3
427 ; Tag_ABI_align_needed
428 ; CORTEX-A7-CHECK: .eabi_attribute 24, 1
429 ; CORTEX-A7-NOFPU: .eabi_attribute 24, 1
430 ; CORTEX-A7-FPUV4: .eabi_attribute 24, 1
432 ; Tag_ABI_align_preserved
433 ; CORTEX-A7-CHECK: .eabi_attribute 25, 1
434 ; CORTEX-A7-NOFPU: .eabi_attribute 25, 1
435 ; CORTEX-A7-FPUV4: .eabi_attribute 25, 1
437 ; Tag_FP_HP_extension
438 ; CORTEX-A7-CHECK: .eabi_attribute 36, 1
439 ; CORTEX-A7-NOFPU: .eabi_attribute 36, 1
440 ; CORTEX-A7-FPUV4: .eabi_attribute 36, 1
442 ; Tag_FP_16bit_format
443 ; CORTEX-A7-CHECK: .eabi_attribute 38, 1
444 ; CORTEX-A7-NOFPU: .eabi_attribute 38, 1
445 ; CORTEX-A7-FPUV4: .eabi_attribute 38, 1
447 ; Tag_MPextension_use
448 ; CORTEX-A7-CHECK: .eabi_attribute 42, 1
449 ; CORTEX-A7-NOFPU: .eabi_attribute 42, 1
450 ; CORTEX-A7-FPUV4: .eabi_attribute 42, 1
453 ; CORTEX-A7-CHECK: .eabi_attribute 44, 2
454 ; CORTEX-A7-NOFPU: .eabi_attribute 44, 2
455 ; CORTEX-A7-FPUV4: .eabi_attribute 44, 2
457 ; Tag_Virtualization_use
458 ; CORTEX-A7-CHECK: .eabi_attribute 68, 3
459 ; CORTEX-A7-NOFPU: .eabi_attribute 68, 3
460 ; CORTEX-A7-FPUV4: .eabi_attribute 68, 3
462 ; CORTEX-A5-DEFAULT: .cpu cortex-a5
463 ; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10
464 ; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65
465 ; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1
466 ; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2
467 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4
468 ; CORTEX-A5-NOT: .eabi_attribute 19
469 ;; We default to IEEE 754 compliance
470 ; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1
471 ; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1
472 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22
473 ; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3
474 ; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1
475 ; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1
476 ; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1
477 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44
478 ; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1
480 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19
481 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
483 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2
484 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
485 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
486 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
488 ; CORTEX-A5-NONEON: .cpu cortex-a5
489 ; CORTEX-A5-NONEON: .eabi_attribute 6, 10
490 ; CORTEX-A5-NONEON: .eabi_attribute 7, 65
491 ; CORTEX-A5-NONEON: .eabi_attribute 8, 1
492 ; CORTEX-A5-NONEON: .eabi_attribute 9, 2
493 ; CORTEX-A5-NONEON: .fpu vfpv4-d16
494 ;; We default to IEEE 754 compliance
495 ; CORTEX-A5-NONEON: .eabi_attribute 20, 1
496 ; CORTEX-A5-NONEON: .eabi_attribute 21, 1
497 ; CORTEX-A5-NONEON-NOT: .eabi_attribute 22
498 ; CORTEX-A5-NONEON: .eabi_attribute 23, 3
499 ; CORTEX-A5-NONEON: .eabi_attribute 24, 1
500 ; CORTEX-A5-NONEON: .eabi_attribute 25, 1
501 ; CORTEX-A5-NONEON: .eabi_attribute 42, 1
502 ; CORTEX-A5-NONEON: .eabi_attribute 68, 1
504 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19
505 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
507 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2
508 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
509 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
510 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
512 ; CORTEX-A5-NOFPU: .cpu cortex-a5
513 ; CORTEX-A5-NOFPU: .eabi_attribute 6, 10
514 ; CORTEX-A5-NOFPU: .eabi_attribute 7, 65
515 ; CORTEX-A5-NOFPU: .eabi_attribute 8, 1
516 ; CORTEX-A5-NOFPU: .eabi_attribute 9, 2
517 ; CORTEX-A5-NOFPU-NOT: .fpu
518 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19
519 ;; We default to IEEE 754 compliance
520 ; CORTEX-A5-NOFPU: .eabi_attribute 20, 1
521 ; CORTEX-A5-NOFPU: .eabi_attribute 21, 1
522 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22
523 ; CORTEX-A5-NOFPU: .eabi_attribute 23, 3
524 ; CORTEX-A5-NOFPU: .eabi_attribute 24, 1
525 ; CORTEX-A5-NOFPU: .eabi_attribute 25, 1
526 ; CORTEX-A5-NOFPU: .eabi_attribute 42, 1
527 ; CORTEX-A5-NOFPU: .eabi_attribute 68, 1
529 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19
530 ;; Despite there being no FPU, we chose to flush to zero preserving
531 ;; sign. This matches what the hardware would do for this architecture
533 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
534 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
535 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
536 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
538 ; CORTEX-A9-SOFT: .cpu cortex-a9
539 ; CORTEX-A9-SOFT: .eabi_attribute 6, 10
540 ; CORTEX-A9-SOFT: .eabi_attribute 7, 65
541 ; CORTEX-A9-SOFT: .eabi_attribute 8, 1
542 ; CORTEX-A9-SOFT: .eabi_attribute 9, 2
543 ; CORTEX-A9-SOFT: .fpu neon
544 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 19
545 ;; We default to IEEE 754 compliance
546 ; CORTEX-A9-SOFT: .eabi_attribute 20, 1
547 ; CORTEX-A9-SOFT: .eabi_attribute 21, 1
548 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 22
549 ; CORTEX-A9-SOFT: .eabi_attribute 23, 3
550 ; CORTEX-A9-SOFT: .eabi_attribute 24, 1
551 ; CORTEX-A9-SOFT: .eabi_attribute 25, 1
552 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 27
553 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 28
554 ; CORTEX-A9-SOFT: .eabi_attribute 36, 1
555 ; CORTEX-A9-SOFT: .eabi_attribute 38, 1
556 ; CORTEX-A9-SOFT: .eabi_attribute 42, 1
557 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 44
558 ; CORTEX-A9-SOFT: .eabi_attribute 68, 1
560 ; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19
561 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
562 ;; -ffast-math is specified.
563 ; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2
564 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
565 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
566 ; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
568 ; CORTEX-A9-HARD: .cpu cortex-a9
569 ; CORTEX-A9-HARD: .eabi_attribute 6, 10
570 ; CORTEX-A9-HARD: .eabi_attribute 7, 65
571 ; CORTEX-A9-HARD: .eabi_attribute 8, 1
572 ; CORTEX-A9-HARD: .eabi_attribute 9, 2
573 ; CORTEX-A9-HARD: .fpu neon
574 ; CORTEX-A9-HARD-NOT: .eabi_attribute 19
575 ;; We default to IEEE 754 compliance
576 ; CORTEX-A9-HARD: .eabi_attribute 20, 1
577 ; CORTEX-A9-HARD: .eabi_attribute 21, 1
578 ; CORTEX-A9-HARD-NOT: .eabi_attribute 22
579 ; CORTEX-A9-HARD: .eabi_attribute 23, 3
580 ; CORTEX-A9-HARD: .eabi_attribute 24, 1
581 ; CORTEX-A9-HARD: .eabi_attribute 25, 1
582 ; CORTEX-A9-HARD-NOT: .eabi_attribute 27
583 ; CORTEX-A9-HARD: .eabi_attribute 28, 1
584 ; CORTEX-A9-HARD: .eabi_attribute 36, 1
585 ; CORTEX-A9-HARD: .eabi_attribute 38, 1
586 ; CORTEX-A9-HARD: .eabi_attribute 42, 1
587 ; CORTEX-A9-HARD: .eabi_attribute 68, 1
589 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19
590 ;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
591 ;; -ffast-math is specified.
592 ; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2
593 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21
594 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22
595 ; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1
597 ; CORTEX-A12-DEFAULT: .cpu cortex-a12
598 ; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10
599 ; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65
600 ; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1
601 ; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2
602 ; CORTEX-A12-DEFAULT: .fpu neon-vfpv4
603 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19
604 ;; We default to IEEE 754 compliance
605 ; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1
606 ; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1
607 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22
608 ; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3
609 ; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1
610 ; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1
611 ; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1
612 ; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2
613 ; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3
615 ; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19
616 ;; The A12 defaults to a VFPv3 FPU, so it flushes preseving sign when
617 ;; -ffast-math is specified.
618 ; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2
619 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21
620 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22
621 ; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1
623 ; CORTEX-A12-NOFPU: .cpu cortex-a12
624 ; CORTEX-A12-NOFPU: .eabi_attribute 6, 10
625 ; CORTEX-A12-NOFPU: .eabi_attribute 7, 65
626 ; CORTEX-A12-NOFPU: .eabi_attribute 8, 1
627 ; CORTEX-A12-NOFPU: .eabi_attribute 9, 2
628 ; CORTEX-A12-NOFPU-NOT: .fpu
629 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19
630 ;; We default to IEEE 754 compliance
631 ; CORTEX-A12-NOFPU: .eabi_attribute 20, 1
632 ; CORTEX-A12-NOFPU: .eabi_attribute 21, 1
633 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22
634 ; CORTEX-A12-NOFPU: .eabi_attribute 23, 3
635 ; CORTEX-A12-NOFPU: .eabi_attribute 24, 1
636 ; CORTEX-A12-NOFPU: .eabi_attribute 25, 1
637 ; CORTEX-A12-NOFPU: .eabi_attribute 42, 1
638 ; CORTEX-A12-NOFPU: .eabi_attribute 44, 2
639 ; CORTEX-A12-NOFPU: .eabi_attribute 68, 3
641 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19
642 ;; Despite there being no FPU, we chose to flush to zero preserving
643 ;; sign. This matches what the hardware would do for this architecture
645 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2
646 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21
647 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22
648 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1
650 ; CORTEX-A15: .cpu cortex-a15
651 ; CORTEX-A15: .eabi_attribute 6, 10
652 ; CORTEX-A15: .eabi_attribute 7, 65
653 ; CORTEX-A15: .eabi_attribute 8, 1
654 ; CORTEX-A15: .eabi_attribute 9, 2
655 ; CORTEX-A15: .fpu neon-vfpv4
656 ; CORTEX-A15-NOT: .eabi_attribute 19
657 ;; We default to IEEE 754 compliance
658 ; CORTEX-A15: .eabi_attribute 20, 1
659 ; CORTEX-A15: .eabi_attribute 21, 1
660 ; CORTEX-A15-NOT: .eabi_attribute 22
661 ; CORTEX-A15: .eabi_attribute 23, 3
662 ; CORTEX-A15: .eabi_attribute 24, 1
663 ; CORTEX-A15: .eabi_attribute 25, 1
664 ; CORTEX-A15-NOT: .eabi_attribute 27
665 ; CORTEX-A15-NOT: .eabi_attribute 28
666 ; CORTEX-A15: .eabi_attribute 36, 1
667 ; CORTEX-A15: .eabi_attribute 38, 1
668 ; CORTEX-A15: .eabi_attribute 42, 1
669 ; CORTEX-A15: .eabi_attribute 44, 2
670 ; CORTEX-A15: .eabi_attribute 68, 3
672 ; CORTEX-A15-FAST-NOT: .eabi_attribute 19
673 ;; The A15 defaults to a VFPv3 FPU, so it flushes preseving sign when
674 ;; -ffast-math is specified.
675 ; CORTEX-A15-FAST: .eabi_attribute 20, 2
676 ; CORTEX-A15-FAST-NOT: .eabi_attribute 21
677 ; CORTEX-A15-FAST-NOT: .eabi_attribute 22
678 ; CORTEX-A15-FAST: .eabi_attribute 23, 1
680 ; CORTEX-A17-DEFAULT: .cpu cortex-a17
681 ; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10
682 ; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65
683 ; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1
684 ; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2
685 ; CORTEX-A17-DEFAULT: .fpu neon-vfpv4
686 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19
687 ;; We default to IEEE 754 compliance
688 ; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1
689 ; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1
690 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22
691 ; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3
692 ; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1
693 ; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1
694 ; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1
695 ; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2
696 ; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3
698 ; CORTEX-A17-FAST-NOT: .eabi_attribute 19
699 ;; The A17 defaults to a VFPv3 FPU, so it flushes preseving sign when
700 ;; -ffast-math is specified.
701 ; CORTEX-A17-FAST: .eabi_attribute 20, 2
702 ; CORTEX-A17-FAST-NOT: .eabi_attribute 21
703 ; CORTEX-A17-FAST-NOT: .eabi_attribute 22
704 ; CORTEX-A17-FAST: .eabi_attribute 23, 1
706 ; CORTEX-A17-NOFPU: .cpu cortex-a17
707 ; CORTEX-A17-NOFPU: .eabi_attribute 6, 10
708 ; CORTEX-A17-NOFPU: .eabi_attribute 7, 65
709 ; CORTEX-A17-NOFPU: .eabi_attribute 8, 1
710 ; CORTEX-A17-NOFPU: .eabi_attribute 9, 2
711 ; CORTEX-A17-NOFPU-NOT: .fpu
712 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19
713 ;; We default to IEEE 754 compliance
714 ; CORTEX-A17-NOFPU: .eabi_attribute 20, 1
715 ; CORTEX-A17-NOFPU: .eabi_attribute 21, 1
716 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22
717 ; CORTEX-A17-NOFPU: .eabi_attribute 23, 3
718 ; CORTEX-A17-NOFPU: .eabi_attribute 24, 1
719 ; CORTEX-A17-NOFPU: .eabi_attribute 25, 1
720 ; CORTEX-A17-NOFPU: .eabi_attribute 42, 1
721 ; CORTEX-A17-NOFPU: .eabi_attribute 44, 2
722 ; CORTEX-A17-NOFPU: .eabi_attribute 68, 3
724 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19
725 ;; Despite there being no FPU, we chose to flush to zero preserving
726 ;; sign. This matches what the hardware would do for this architecture
728 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2
729 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21
730 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22
731 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1
733 ; CORTEX-M0: .cpu cortex-m0
734 ; CORTEX-M0: .eabi_attribute 6, 12
735 ; CORTEX-M0-NOT: .eabi_attribute 7
736 ; CORTEX-M0: .eabi_attribute 8, 0
737 ; CORTEX-M0: .eabi_attribute 9, 1
738 ; CORTEX-M0-NOT: .eabi_attribute 19
739 ;; We default to IEEE 754 compliance
740 ; CORTEX-M0: .eabi_attribute 20, 1
741 ; CORTEX-M0: .eabi_attribute 21, 1
742 ; CORTEX-M0-NOT: .eabi_attribute 22
743 ; CORTEX-M0: .eabi_attribute 23, 3
744 ; CORTEX-M0: .eabi_attribute 24, 1
745 ; CORTEX-M0: .eabi_attribute 25, 1
746 ; CORTEX-M0-NOT: .eabi_attribute 27
747 ; CORTEX-M0-NOT: .eabi_attribute 28
748 ; CORTEX-M0-NOT: .eabi_attribute 36
749 ; CORTEX-M0: .eabi_attribute 38, 1
750 ; CORTEX-M0-NOT: .eabi_attribute 42
751 ; CORTEX-M0-NOT: .eabi_attribute 44
752 ; CORTEX-M0-NOT: .eabi_attribute 68
754 ; CORTEX-M0-FAST-NOT: .eabi_attribute 19
755 ;; Despite the M0 CPU having no FPU in this scenario, we chose to
756 ;; flush to positive zero here. There's no hardware support doing
757 ;; this, but the fast maths software library might and such behaviour
758 ;; would match hardware support on this architecture revision if it
760 ; CORTEX-M0-FAST-NOT: .eabi_attribute 20
761 ; CORTEX-M0-FAST-NOT: .eabi_attribute 21
762 ; CORTEX-M0-FAST-NOT: .eabi_attribute 22
763 ; CORTEX-M0-FAST: .eabi_attribute 23, 1
765 ; CORTEX-M0PLUS: .cpu cortex-m0plus
766 ; CORTEX-M0PLUS: .eabi_attribute 6, 12
767 ; CORTEX-M0PLUS-NOT: .eabi_attribute 7
768 ; CORTEX-M0PLUS: .eabi_attribute 8, 0
769 ; CORTEX-M0PLUS: .eabi_attribute 9, 1
770 ; CORTEX-M0PLUS-NOT: .eabi_attribute 19
771 ;; We default to IEEE 754 compliance
772 ; CORTEX-M0PLUS: .eabi_attribute 20, 1
773 ; CORTEX-M0PLUS: .eabi_attribute 21, 1
774 ; CORTEX-M0PLUS-NOT: .eabi_attribute 22
775 ; CORTEX-M0PLUS: .eabi_attribute 23, 3
776 ; CORTEX-M0PLUS: .eabi_attribute 24, 1
777 ; CORTEX-M0PLUS: .eabi_attribute 25, 1
778 ; CORTEX-M0PLUS-NOT: .eabi_attribute 27
779 ; CORTEX-M0PLUS-NOT: .eabi_attribute 28
780 ; CORTEX-M0PLUS-NOT: .eabi_attribute 36
781 ; CORTEX-M0PLUS: .eabi_attribute 38, 1
782 ; CORTEX-M0PLUS-NOT: .eabi_attribute 42
783 ; CORTEX-M0PLUS-NOT: .eabi_attribute 44
784 ; CORTEX-M0PLUS-NOT: .eabi_attribute 68
786 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19
787 ;; Despite the M0+ CPU having no FPU in this scenario, we chose to
788 ;; flush to positive zero here. There's no hardware support doing
789 ;; this, but the fast maths software library might and such behaviour
790 ;; would match hardware support on this architecture revision if it
792 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20
793 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21
794 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22
795 ; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1
797 ; CORTEX-M1: .cpu cortex-m1
798 ; CORTEX-M1: .eabi_attribute 6, 12
799 ; CORTEX-M1-NOT: .eabi_attribute 7
800 ; CORTEX-M1: .eabi_attribute 8, 0
801 ; CORTEX-M1: .eabi_attribute 9, 1
802 ; CORTEX-M1-NOT: .eabi_attribute 19
803 ;; We default to IEEE 754 compliance
804 ; CORTEX-M1: .eabi_attribute 20, 1
805 ; CORTEX-M1: .eabi_attribute 21, 1
806 ; CORTEX-M1-NOT: .eabi_attribute 22
807 ; CORTEX-M1: .eabi_attribute 23, 3
808 ; CORTEX-M1: .eabi_attribute 24, 1
809 ; CORTEX-M1: .eabi_attribute 25, 1
810 ; CORTEX-M1-NOT: .eabi_attribute 27
811 ; CORTEX-M1-NOT: .eabi_attribute 28
812 ; CORTEX-M1-NOT: .eabi_attribute 36
813 ; CORTEX-M1: .eabi_attribute 38, 1
814 ; CORTEX-M1-NOT: .eabi_attribute 42
815 ; CORTEX-M1-NOT: .eabi_attribute 44
816 ; CORTEX-M1-NOT: .eabi_attribute 68
818 ; CORTEX-M1-FAST-NOT: .eabi_attribute 19
819 ;; Despite the M1 CPU having no FPU in this scenario, we chose to
820 ;; flush to positive zero here. There's no hardware support doing
821 ;; this, but the fast maths software library might and such behaviour
822 ;; would match hardware support on this architecture revision if it
824 ; CORTEX-M1-FAST-NOT: .eabi_attribute 20
825 ; CORTEX-M1-FAST-NOT: .eabi_attribute 21
826 ; CORTEX-M1-FAST-NOT: .eabi_attribute 22
827 ; CORTEX-M1-FAST: .eabi_attribute 23, 1
830 ; SC000: .eabi_attribute 6, 12
831 ; SC000-NOT: .eabi_attribute 7
832 ; SC000: .eabi_attribute 8, 0
833 ; SC000: .eabi_attribute 9, 1
834 ; SC000-NOT: .eabi_attribute 19
835 ;; We default to IEEE 754 compliance
836 ; SC000: .eabi_attribute 20, 1
837 ; SC000: .eabi_attribute 21, 1
838 ; SC000-NOT: .eabi_attribute 22
839 ; SC000: .eabi_attribute 23, 3
840 ; SC000: .eabi_attribute 24, 1
841 ; SC000: .eabi_attribute 25, 1
842 ; SC000-NOT: .eabi_attribute 27
843 ; SC000-NOT: .eabi_attribute 28
844 ; SC000-NOT: .eabi_attribute 36
845 ; SC000: .eabi_attribute 38, 1
846 ; SC000-NOT: .eabi_attribute 42
847 ; SC000-NOT: .eabi_attribute 44
848 ; SC000-NOT: .eabi_attribute 68
850 ; SC000-FAST-NOT: .eabi_attribute 19
851 ;; Despite the SC000 CPU having no FPU in this scenario, we chose to
852 ;; flush to positive zero here. There's no hardware support doing
853 ;; this, but the fast maths software library might and such behaviour
854 ;; would match hardware support on this architecture revision if it
856 ; SC000-FAST-NOT: .eabi_attribute 20
857 ; SC000-FAST-NOT: .eabi_attribute 21
858 ; SC000-FAST-NOT: .eabi_attribute 22
859 ; SC000-FAST: .eabi_attribute 23, 1
861 ; CORTEX-M3: .cpu cortex-m3
862 ; CORTEX-M3: .eabi_attribute 6, 10
863 ; CORTEX-M3: .eabi_attribute 7, 77
864 ; CORTEX-M3: .eabi_attribute 8, 0
865 ; CORTEX-M3: .eabi_attribute 9, 2
866 ; CORTEX-M3-NOT: .eabi_attribute 19
867 ;; We default to IEEE 754 compliance
868 ; CORTEX-M3: .eabi_attribute 20, 1
869 ; CORTEX-M3: .eabi_attribute 21, 1
870 ; CORTEX-M3-NOT: .eabi_attribute 22
871 ; CORTEX-M3: .eabi_attribute 23, 3
872 ; CORTEX-M3: .eabi_attribute 24, 1
873 ; CORTEX-M3: .eabi_attribute 25, 1
874 ; CORTEX-M3-NOT: .eabi_attribute 27
875 ; CORTEX-M3-NOT: .eabi_attribute 28
876 ; CORTEX-M3-NOT: .eabi_attribute 36
877 ; CORTEX-M3: .eabi_attribute 38, 1
878 ; CORTEX-M3-NOT: .eabi_attribute 42
879 ; CORTEX-M3-NOT: .eabi_attribute 44
880 ; CORTEX-M3-NOT: .eabi_attribute 68
882 ; CORTEX-M3-FAST-NOT: .eabi_attribute 19
883 ;; Despite there being no FPU, we chose to flush to zero preserving
884 ;; sign. This matches what the hardware would do for this architecture
886 ; CORTEX-M3-FAST: .eabi_attribute 20, 2
887 ; CORTEX-M3-FAST-NOT: .eabi_attribute 21
888 ; CORTEX-M3-FAST-NOT: .eabi_attribute 22
889 ; CORTEX-M3-FAST: .eabi_attribute 23, 1
892 ; SC300: .eabi_attribute 6, 10
893 ; SC300: .eabi_attribute 7, 77
894 ; SC300: .eabi_attribute 8, 0
895 ; SC300: .eabi_attribute 9, 2
896 ; SC300-NOT: .eabi_attribute 19
897 ;; We default to IEEE 754 compliance
898 ; SC300: .eabi_attribute 20, 1
899 ; SC300: .eabi_attribute 21, 1
900 ; SC300-NOT: .eabi_attribute 22
901 ; SC300: .eabi_attribute 23, 3
902 ; SC300: .eabi_attribute 24, 1
903 ; SC300: .eabi_attribute 25, 1
904 ; SC300-NOT: .eabi_attribute 27
905 ; SC300-NOT: .eabi_attribute 28
906 ; SC300-NOT: .eabi_attribute 36
907 ; SC300: .eabi_attribute 38, 1
908 ; SC300-NOT: .eabi_attribute 42
909 ; SC300-NOT: .eabi_attribute 44
910 ; SC300-NOT: .eabi_attribute 68
912 ; SC300-FAST-NOT: .eabi_attribute 19
913 ;; Despite there being no FPU, we chose to flush to zero preserving
914 ;; sign. This matches what the hardware would do for this architecture
916 ; SC300-FAST: .eabi_attribute 20, 2
917 ; SC300-FAST-NOT: .eabi_attribute 21
918 ; SC300-FAST-NOT: .eabi_attribute 22
919 ; SC300-FAST: .eabi_attribute 23, 1
921 ; CORTEX-M4-SOFT: .cpu cortex-m4
922 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13
923 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77
924 ; CORTEX-M4-SOFT: .eabi_attribute 8, 0
925 ; CORTEX-M4-SOFT: .eabi_attribute 9, 2
926 ; CORTEX-M4-SOFT: .fpu fpv4-sp-d16
927 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 19
928 ;; We default to IEEE 754 compliance
929 ; CORTEX-M4-SOFT: .eabi_attribute 20, 1
930 ; CORTEX-M4-SOFT: .eabi_attribute 21, 1
931 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 22
932 ; CORTEX-M4-SOFT: .eabi_attribute 23, 3
933 ; CORTEX-M4-SOFT: .eabi_attribute 24, 1
934 ; CORTEX-M4-SOFT: .eabi_attribute 25, 1
935 ; CORTEX-M4-SOFT: .eabi_attribute 27, 1
936 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 28
937 ; CORTEX-M4-SOFT: .eabi_attribute 36, 1
938 ; CORTEX-M4-SOFT: .eabi_attribute 38, 1
939 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 42
940 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 44
941 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 68
943 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19
944 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
945 ;; -ffast-math is specified.
946 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2
947 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21
948 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22
949 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1
951 ; CORTEX-M4-HARD: .cpu cortex-m4
952 ; CORTEX-M4-HARD: .eabi_attribute 6, 13
953 ; CORTEX-M4-HARD: .eabi_attribute 7, 77
954 ; CORTEX-M4-HARD: .eabi_attribute 8, 0
955 ; CORTEX-M4-HARD: .eabi_attribute 9, 2
956 ; CORTEX-M4-HARD: .fpu fpv4-sp-d16
957 ; CORTEX-M4-HARD-NOT: .eabi_attribute 19
958 ;; We default to IEEE 754 compliance
959 ; CORTEX-M4-HARD: .eabi_attribute 20, 1
960 ; CORTEX-M4-HARD: .eabi_attribute 21, 1
961 ; CORTEX-M4-HARD-NOT: .eabi_attribute 22
962 ; CORTEX-M4-HARD: .eabi_attribute 23, 3
963 ; CORTEX-M4-HARD: .eabi_attribute 24, 1
964 ; CORTEX-M4-HARD: .eabi_attribute 25, 1
965 ; CORTEX-M4-HARD: .eabi_attribute 27, 1
966 ; CORTEX-M4-HARD: .eabi_attribute 28, 1
967 ; CORTEX-M4-HARD: .eabi_attribute 36, 1
968 ; CORTEX-M4-HARD: .eabi_attribute 38, 1
969 ; CORTEX-M4-HARD-NOT: .eabi_attribute 42
970 ; CORTEX-M4-HARD-NOT: .eabi_attribute 44
971 ; CORTEX-M4-HARD-NOT: .eabi_attribute 68
973 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19
974 ;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
975 ;; -ffast-math is specified.
976 ; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2
977 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21
978 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22
979 ; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1
981 ; CORTEX-M7: .cpu cortex-m7
982 ; CORTEX-M7: .eabi_attribute 6, 13
983 ; CORTEX-M7: .eabi_attribute 7, 77
984 ; CORTEX-M7: .eabi_attribute 8, 0
985 ; CORTEX-M7: .eabi_attribute 9, 2
986 ; CORTEX-M7-SOFT-NOT: .fpu
987 ; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16
988 ; CORTEX-M7-DOUBLE: .fpu fpv5-d16
989 ; CORTEX-M7: .eabi_attribute 17, 1
990 ; CORTEX-M7-NOT: .eabi_attribute 19
991 ;; We default to IEEE 754 compliance
992 ; CORTEX-M7: .eabi_attribute 20, 1
993 ; CORTEX-M7: .eabi_attribute 21, 1
994 ; CORTEX-M7-NOT: .eabi_attribute 22
995 ; CORTEX-M7: .eabi_attribute 23, 3
996 ; CORTEX-M7: .eabi_attribute 24, 1
997 ; CORTEX-M7: .eabi_attribute 25, 1
998 ; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
999 ; CORTEX-M7-SINGLE: .eabi_attribute 27, 1
1000 ; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1001 ; CORTEX-M7: .eabi_attribute 36, 1
1002 ; CORTEX-M7: .eabi_attribute 38, 1
1003 ; CORTEX-M7-NOT: .eabi_attribute 44
1004 ; CORTEX-M7: .eabi_attribute 14, 0
1006 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19
1007 ;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1008 ; CORTEX-M7-FAST: .eabi_attribute 20, 2
1009 ;; Despite there being no FPU, we chose to flush to zero preserving
1010 ;; sign. This matches what the hardware would do for this architecture
1012 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1013 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21
1014 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22
1015 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1
1017 ; CORTEX-R4: .cpu cortex-r4
1018 ; CORTEX-R4: .eabi_attribute 6, 10
1019 ; CORTEX-R4: .eabi_attribute 7, 82
1020 ; CORTEX-R4: .eabi_attribute 8, 1
1021 ; CORTEX-R4: .eabi_attribute 9, 2
1022 ; CORTEX-R4-NOT: .fpu vfpv3-d16
1023 ; CORTEX-R4-NOT: .eabi_attribute 19
1024 ;; We default to IEEE 754 compliance
1025 ; CORTEX-R4: .eabi_attribute 20, 1
1026 ; CORTEX-R4: .eabi_attribute 21, 1
1027 ; CORTEX-R4-NOT: .eabi_attribute 22
1028 ; CORTEX-R4: .eabi_attribute 23, 3
1029 ; CORTEX-R4: .eabi_attribute 24, 1
1030 ; CORTEX-R4: .eabi_attribute 25, 1
1031 ; CORTEX-R4-NOT: .eabi_attribute 28
1032 ; CORTEX-R4-NOT: .eabi_attribute 36
1033 ; CORTEX-R4: .eabi_attribute 38, 1
1034 ; CORTEX-R4-NOT: .eabi_attribute 42
1035 ; CORTEX-R4-NOT: .eabi_attribute 44
1036 ; CORTEX-R4-NOT: .eabi_attribute 68
1038 ; CORTEX-R4F: .cpu cortex-r4f
1039 ; CORTEX-R4F: .eabi_attribute 6, 10
1040 ; CORTEX-R4F: .eabi_attribute 7, 82
1041 ; CORTEX-R4F: .eabi_attribute 8, 1
1042 ; CORTEX-R4F: .eabi_attribute 9, 2
1043 ; CORTEX-R4F: .fpu vfpv3-d16
1044 ; CORTEX-R4F-NOT: .eabi_attribute 19
1045 ;; We default to IEEE 754 compliance
1046 ; CORTEX-R4F: .eabi_attribute 20, 1
1047 ; CORTEX-R4F: .eabi_attribute 21, 1
1048 ; CORTEX-R4F-NOT: .eabi_attribute 22
1049 ; CORTEX-R4F: .eabi_attribute 23, 3
1050 ; CORTEX-R4F: .eabi_attribute 24, 1
1051 ; CORTEX-R4F: .eabi_attribute 25, 1
1052 ; CORTEX-R4F: .eabi_attribute 27, 1
1053 ; CORTEX-R4F-NOT: .eabi_attribute 28
1054 ; CORTEX-R4F-NOT: .eabi_attribute 36
1055 ; CORTEX-R4F: .eabi_attribute 38, 1
1056 ; CORTEX-R4F-NOT: .eabi_attribute 42
1057 ; CORTEX-R4F-NOT: .eabi_attribute 44
1058 ; CORTEX-R4F-NOT: .eabi_attribute 68
1060 ; CORTEX-R5: .cpu cortex-r5
1061 ; CORTEX-R5: .eabi_attribute 6, 10
1062 ; CORTEX-R5: .eabi_attribute 7, 82
1063 ; CORTEX-R5: .eabi_attribute 8, 1
1064 ; CORTEX-R5: .eabi_attribute 9, 2
1065 ; CORTEX-R5: .fpu vfpv3-d16
1066 ; CORTEX-R5-NOT: .eabi_attribute 19
1067 ;; We default to IEEE 754 compliance
1068 ; CORTEX-R5: .eabi_attribute 20, 1
1069 ; CORTEX-R5: .eabi_attribute 21, 1
1070 ; CORTEX-R5-NOT: .eabi_attribute 22
1071 ; CORTEX-R5: .eabi_attribute 23, 3
1072 ; CORTEX-R5: .eabi_attribute 24, 1
1073 ; CORTEX-R5: .eabi_attribute 25, 1
1074 ; CORTEX-R5: .eabi_attribute 27, 1
1075 ; CORTEX-R5-NOT: .eabi_attribute 28
1076 ; CORTEX-R5-NOT: .eabi_attribute 36
1077 ; CORTEX-R5: .eabi_attribute 38, 1
1078 ; CORTEX-R5-NOT: .eabi_attribute 42
1079 ; CORTEX-R5: .eabi_attribute 44, 2
1080 ; CORTEX-R5-NOT: .eabi_attribute 68
1082 ; CORTEX-R5-FAST-NOT: .eabi_attribute 19
1083 ;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1084 ; CORTEX-R5-FAST: .eabi_attribute 20, 2
1085 ; CORTEX-R5-FAST-NOT: .eabi_attribute 21
1086 ; CORTEX-R5-FAST-NOT: .eabi_attribute 22
1087 ; CORTEX-R5-FAST: .eabi_attribute 23, 1
1089 ; CORTEX-R7: .cpu cortex-r7
1090 ; CORTEX-R7: .eabi_attribute 6, 10
1091 ; CORTEX-R7: .eabi_attribute 7, 82
1092 ; CORTEX-R7: .eabi_attribute 8, 1
1093 ; CORTEX-R7: .eabi_attribute 9, 2
1094 ; CORTEX-R7: .fpu vfpv3-d16
1095 ; CORTEX-R7-NOT: .eabi_attribute 19
1096 ;; We default to IEEE 754 compliance
1097 ; CORTEX-R7: .eabi_attribute 20, 1
1098 ; CORTEX-R7: .eabi_attribute 21, 1
1099 ; CORTEX-R7-NOT: .eabi_attribute 22
1100 ; CORTEX-R7: .eabi_attribute 23, 3
1101 ; CORTEX-R7: .eabi_attribute 24, 1
1102 ; CORTEX-R7: .eabi_attribute 25, 1
1103 ; CORTEX-R7: .eabi_attribute 27, 1
1104 ; CORTEX-R7-NOT: .eabi_attribute 28
1105 ; CORTEX-R7-NOT: .eabi_attribute 36
1106 ; CORTEX-R7: .eabi_attribute 38, 1
1107 ; CORTEX-R7: .eabi_attribute 42, 1
1108 ; CORTEX-R7: .eabi_attribute 44, 2
1109 ; CORTEX-R7-NOT: .eabi_attribute 68
1111 ; CORTEX-R7-FAST-NOT: .eabi_attribute 19
1112 ;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1113 ; CORTEX-R7-FAST: .eabi_attribute 20, 2
1114 ; CORTEX-R7-FAST-NOT: .eabi_attribute 21
1115 ; CORTEX-R7-FAST-NOT: .eabi_attribute 22
1116 ; CORTEX-R7-FAST: .eabi_attribute 23, 1
1118 ; CORTEX-A53: .cpu cortex-a53
1119 ; CORTEX-A53: .eabi_attribute 6, 14
1120 ; CORTEX-A53: .eabi_attribute 7, 65
1121 ; CORTEX-A53: .eabi_attribute 8, 1
1122 ; CORTEX-A53: .eabi_attribute 9, 2
1123 ; CORTEX-A53: .fpu crypto-neon-fp-armv8
1124 ; CORTEX-A53: .eabi_attribute 12, 3
1125 ; CORTEX-A53-NOT: .eabi_attribute 19
1126 ;; We default to IEEE 754 compliance
1127 ; CORTEX-A53: .eabi_attribute 20, 1
1128 ; CORTEX-A53: .eabi_attribute 21, 1
1129 ; CORTEX-A53-NOT: .eabi_attribute 22
1130 ; CORTEX-A53: .eabi_attribute 23, 3
1131 ; CORTEX-A53: .eabi_attribute 24, 1
1132 ; CORTEX-A53: .eabi_attribute 25, 1
1133 ; CORTEX-A53-NOT: .eabi_attribute 27
1134 ; CORTEX-A53-NOT: .eabi_attribute 28
1135 ; CORTEX-A53: .eabi_attribute 36, 1
1136 ; CORTEX-A53: .eabi_attribute 38, 1
1137 ; CORTEX-A53: .eabi_attribute 42, 1
1138 ; CORTEX-A53-NOT: .eabi_attribute 44
1139 ; CORTEX-A53: .eabi_attribute 68, 3
1141 ; CORTEX-A53-FAST-NOT: .eabi_attribute 19
1142 ;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1143 ; CORTEX-A53-FAST: .eabi_attribute 20, 2
1144 ; CORTEX-A53-FAST-NOT: .eabi_attribute 21
1145 ; CORTEX-A53-FAST-NOT: .eabi_attribute 22
1146 ; CORTEX-A53-FAST: .eabi_attribute 23, 1
1148 ; CORTEX-A57: .cpu cortex-a57
1149 ; CORTEX-A57: .eabi_attribute 6, 14
1150 ; CORTEX-A57: .eabi_attribute 7, 65
1151 ; CORTEX-A57: .eabi_attribute 8, 1
1152 ; CORTEX-A57: .eabi_attribute 9, 2
1153 ; CORTEX-A57: .fpu crypto-neon-fp-armv8
1154 ; CORTEX-A57: .eabi_attribute 12, 3
1155 ; CORTEX-A57-NOT: .eabi_attribute 19
1156 ;; We default to IEEE 754 compliance
1157 ; CORTEX-A57: .eabi_attribute 20, 1
1158 ; CORTEX-A57: .eabi_attribute 21, 1
1159 ; CORTEX-A57-NOT: .eabi_attribute 22
1160 ; CORTEX-A57: .eabi_attribute 23, 3
1161 ; CORTEX-A57: .eabi_attribute 24, 1
1162 ; CORTEX-A57: .eabi_attribute 25, 1
1163 ; CORTEX-A57-NOT: .eabi_attribute 27
1164 ; CORTEX-A57-NOT: .eabi_attribute 28
1165 ; CORTEX-A57: .eabi_attribute 36, 1
1166 ; CORTEX-A57: .eabi_attribute 38, 1
1167 ; CORTEX-A57: .eabi_attribute 42, 1
1168 ; CORTEX-A57-NOT: .eabi_attribute 44
1169 ; CORTEX-A57: .eabi_attribute 68, 3
1171 ; CORTEX-A57-FAST-NOT: .eabi_attribute 19
1172 ;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1173 ; CORTEX-A57-FAST: .eabi_attribute 20, 2
1174 ; CORTEX-A57-FAST-NOT: .eabi_attribute 21
1175 ; CORTEX-A57-FAST-NOT: .eabi_attribute 22
1176 ; CORTEX-A57-FAST: .eabi_attribute 23, 1
1178 ; CORTEX-A72: .cpu cortex-a72
1179 ; CORTEX-A72: .eabi_attribute 6, 14
1180 ; CORTEX-A72: .eabi_attribute 7, 65
1181 ; CORTEX-A72: .eabi_attribute 8, 1
1182 ; CORTEX-A72: .eabi_attribute 9, 2
1183 ; CORTEX-A72: .fpu crypto-neon-fp-armv8
1184 ; CORTEX-A72: .eabi_attribute 12, 3
1185 ; CORTEX-A72-NOT: .eabi_attribute 19
1186 ;; We default to IEEE 754 compliance
1187 ; CORTEX-A72: .eabi_attribute 20, 1
1188 ; CORTEX-A72: .eabi_attribute 21, 1
1189 ; CORTEX-A72-NOT: .eabi_attribute 22
1190 ; CORTEX-A72: .eabi_attribute 23, 3
1191 ; CORTEX-A72: .eabi_attribute 24, 1
1192 ; CORTEX-A72: .eabi_attribute 25, 1
1193 ; CORTEX-A72-NOT: .eabi_attribute 27
1194 ; CORTEX-A72-NOT: .eabi_attribute 28
1195 ; CORTEX-A72: .eabi_attribute 36, 1
1196 ; CORTEX-A72: .eabi_attribute 38, 1
1197 ; CORTEX-A72: .eabi_attribute 42, 1
1198 ; CORTEX-A72-NOT: .eabi_attribute 44
1199 ; CORTEX-A72: .eabi_attribute 68, 3
1201 ; CORTEX-A72-FAST-NOT: .eabi_attribute 19
1202 ;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1203 ; CORTEX-A72-FAST: .eabi_attribute 20, 2
1204 ; CORTEX-A72-FAST-NOT: .eabi_attribute 21
1205 ; CORTEX-A72-FAST-NOT: .eabi_attribute 22
1206 ; CORTEX-A72-FAST: .eabi_attribute 23, 1
1208 ; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14
1209 ; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65
1210 ; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1
1211 ; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2
1212 ; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8
1213 ; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4
1214 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19
1215 ;; We default to IEEE 754 compliance
1216 ; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1
1217 ; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1
1218 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22
1219 ; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3
1220 ; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1
1221 ; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1
1222 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27
1223 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28
1224 ; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1
1225 ; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1
1226 ; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1
1227 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44
1228 ; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3
1230 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19
1231 ;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1232 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2
1233 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21
1234 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22
1235 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1
1237 ; RELOC-PIC: .eabi_attribute 15, 1
1238 ; RELOC-PIC: .eabi_attribute 16, 1
1239 ; RELOC-PIC: .eabi_attribute 17, 2
1240 ; RELOC-OTHER: .eabi_attribute 17, 1
1242 ; PCS-R9-USE: .eabi_attribute 14, 0
1243 ; PCS-R9-RESERVE: .eabi_attribute 14, 3
1245 define i32 @f(i64 %z) {