ARM: fix folding stack adjustment (again again again...)
[oota-llvm.git] / test / CodeGen / ARM / cmpxchg-weak.ll
1 ; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s
2
3 define void @test_cmpxchg_weak(i32 *%addr, i32 %desired, i32 %new) {
4 ; CHECK-LABEL: test_cmpxchg_weak:
5
6   %pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
7   %oldval = extractvalue { i32, i1 } %pair, 0
8 ; CHECK-NEXT: BB#0:
9 ; CHECK-NEXT:     dmb ish
10 ; CHECK-NEXT:     ldrex   [[LOADED:r[0-9]+]], [r0]
11 ; CHECK-NEXT:     cmp     [[LOADED]], r1
12 ; CHECK-NEXT:     bne     [[LDFAILBB:LBB[0-9]+_[0-9]+]]
13 ; CHECK-NEXT: BB#1:
14 ; CHECK-NEXT:     strex   [[SUCCESS:r[0-9]+]], r2, [r0]
15 ; CHECK-NEXT:     cmp     [[SUCCESS]], #0
16 ; CHECK-NEXT:     bne     [[FAILBB:LBB[0-9]+_[0-9]+]]
17 ; CHECK-NEXT: BB#2:
18 ; CHECK-NEXT:     dmb     ish
19 ; CHECK-NEXT:     str     r3, [r0]
20 ; CHECK-NEXT:     bx      lr
21 ; CHECK-NEXT: [[LDFAILBB]]:
22 ; CHECK-NEXT:     clrex
23 ; CHECK-NEXT: [[FAILBB]]:
24 ; CHECK-NEXT:     str     r3, [r0]
25 ; CHECK-NEXT:     bx      lr
26
27   store i32 %oldval, i32* %addr
28   ret void
29 }
30
31
32 define i1 @test_cmpxchg_weak_to_bool(i32, i32 *%addr, i32 %desired, i32 %new) {
33 ; CHECK-LABEL: test_cmpxchg_weak_to_bool:
34
35   %pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
36   %success = extractvalue { i32, i1 } %pair, 1
37
38 ; CHECK-NEXT: BB#0:
39 ; CHECK-NEXT:     dmb ish
40 ; CHECK-NEXT:     ldrex   [[LOADED:r[0-9]+]], [r1]
41 ; CHECK-NEXT:     cmp     [[LOADED]], r2
42 ; CHECK-NEXT:     bne     [[LDFAILBB:LBB[0-9]+_[0-9]+]]
43 ; CHECK-NEXT: BB#1:
44 ; CHECK-NEXT:     strex   [[SUCCESS:r[0-9]+]], r3, [r1]
45 ; CHECK-NEXT:     mov     r0, #0
46 ; CHECK-NEXT:     cmp     [[SUCCESS]], #0
47 ; CHECK-NEXT:     bxne    lr
48 ; CHECK-NEXT:     dmb     ish
49 ; CHECK-NEXT:     mov     r0, #1
50 ; CHECK-NEXT:     bx      lr
51 ; CHECK-NEXT: [[LDFAILBB]]:
52 ; CHECK-NEXT:     clrex
53 ; CHECK-NEXT:     mov     r0, #0
54 ; CHECK-NEXT:     bx      lr
55
56   ret i1 %success
57 }