1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -verify-arm-pseudo-expand
3 ; <rdar://problem/8529919>
4 %struct.foo = type { i32, i32 }
6 define void @func() nounwind {
8 %tmp = load i32* undef, align 4
12 %tmp1 = and i32 %tmp, 16
13 %tmp2 = icmp eq i32 %tmp1, 0
14 %invok.1.i = select i1 %tmp2, i32 undef, i32 0
15 %tmp119 = add i32 %invok.1.i, 0
16 br i1 undef, label %bb2, label %exit
19 %tmp120 = add i32 %tmp119, 0
20 %scevgep810.i = getelementptr %struct.foo, %struct.foo* null, i32 %tmp120, i32 1
21 store i32 undef, i32* %scevgep810.i, align 4
22 br i1 undef, label %bb2, label %bb3
25 br i1 %tmp2, label %bb2, label %bb2
31 ; PR10520 - REG_SEQUENCE with implicit-def operands.
32 define arm_aapcs_vfpcc void @foo() nounwind align 2 {
34 %tmp = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> <i32 1>
35 %tmp8 = bitcast <1 x i64> %tmp to <2 x float>
36 %tmp9 = shufflevector <2 x float> %tmp8, <2 x float> %tmp8, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
37 %tmp10 = fmul <4 x float> undef, %tmp9
38 %tmp11 = fadd <4 x float> %tmp10, undef
39 %tmp12 = fadd <4 x float> undef, %tmp11
40 %tmp13 = bitcast <4 x float> %tmp12 to i128
41 %tmp14 = bitcast i128 %tmp13 to <4 x float>
42 %tmp15 = bitcast <4 x float> %tmp14 to i128
43 %tmp16 = bitcast i128 %tmp15 to <4 x float>
44 %tmp17 = bitcast <4 x float> %tmp16 to i128
45 %tmp18 = bitcast i128 %tmp17 to <4 x float>
46 %tmp19 = bitcast <4 x float> %tmp18 to i128
47 %tmp20 = bitcast i128 %tmp19 to <4 x float>
48 store <4 x float> %tmp20, <4 x float>* undef, align 16
52 ; PR10520, second bug. NEONMoveFixPass needs to preserve implicit operands.
53 define arm_aapcs_vfpcc void @pr10520_2() nounwind align 2 {
55 %tmp76 = shufflevector <2 x i64> zeroinitializer, <2 x i64> zeroinitializer, <1 x i32> <i32 1>
56 %tmp77 = bitcast <1 x i64> %tmp76 to <2 x float>
57 %tmp78 = shufflevector <2 x float> %tmp77, <2 x float> %tmp77, <4 x i32> zeroinitializer
58 %tmp81 = fmul <4 x float> undef, %tmp78
59 %tmp82 = fadd <4 x float> %tmp81, undef
60 %tmp85 = fadd <4 x float> %tmp82, undef
61 %tmp86 = bitcast <4 x float> %tmp85 to i128
62 %tmp136 = bitcast i128 %tmp86 to <4 x float>
63 %tmp137 = bitcast <4 x float> %tmp136 to i128
64 %tmp138 = bitcast i128 %tmp137 to <4 x float>
65 %tmp139 = bitcast <4 x float> %tmp138 to i128
66 %tmp152 = bitcast i128 %tmp139 to <4 x float>
67 %tmp153 = bitcast <4 x float> %tmp152 to i128
68 %tmp154 = bitcast i128 %tmp153 to <4 x float>
69 store <4 x float> %tmp154, <4 x float>* undef, align 16
73 ; <rdar://problem/12721258>
77 define void @_Z3Foov() ssp {
79 br i1 true, label %exit, label %false
82 invoke void undef(%A* undef)
83 to label %exit unwind label %lpad
86 %0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*)
94 declare i32 @__gxx_personality_sj0(...)